AD5122

AD5122/AD5142 (Rev.D)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 27

Technical content

Dual-Channel, 128-/256-Position, SPI, Nonvolatile Digital Potentiometer Rev. D DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

FEATURES

►10 kΩ and 100 kΩ resistance options ►Resistor tolerance: ±8% maximum ►Wiper current: ±6 mA ►Low temperature coefficient: 35 ppm/°C ►Wide bandwidth: 3 MHz ►Fast start-up time <75 µs ►Linear gain setting mode ►Single- and dual-supply operation ►Independent logic supply: 1.8 V to 5.5 V ►Wide operating temperature: −40°C to +125°C ►3 mm × 3 mm package option ►AEC-Q100 qualified for automotive applications

APPLICATIONS

►Portable electronics level adjustment ►LCD panel brightness and contrast controls ►Programmable filters, delays, and time constants ►Programmable power supplies FUNCTIONAL BLOCK DIAGRAM Figure 1. GENERAL DESCRIPTION The AD5122/AD5142 potentiometers provide a nonvolatile solution for 128-/256-position adjustment applications, offering guaranteed low resistor tolerance errors of ±8% and up to ±6 mA current density in the Ax, Bx, and Wx pins. The low resistor tolerance and low nominal temperature coefficient simplify open-loop applications as well as applications requiring tolerance matching. The linear gain setting mode allows independent programming of the resistance between the digital potentiometer terminals through the RAW and RWB string resistors, allowing accurate resistor match- ing. The high bandwidth and low total harmonic distortion (THD) ensure optimal performance for ac signals, making these devices suitable for filter design. The low wiper resistance of only 40 Ω at the ends of the resistor array allows pin to pin connection. The wiper values can be set through an SPI-compatible digital interface that also reads back the wiper register and EEPROM contents. The AD5122/AD5142 are available in a compact, 16-lead, 3 mm × 3 mm LFCSP and a 16-lead TSSOP. The devices are guaranteed to operate over the extended industrial temperature range of −40°C to +125°C. Table 1. Family Models 1 Two potentiometers and two rheostats.

analog.com Rev. D | 2 of 27 RAB (kΩ), Resolution, and Interface Options....26

REVISION HISTORY

6/2024—Rev. C to Rev. D

analog.com Rev. D | 3 of 27 ELECTRICAL CHARACTERISTICS—AD5122 otherwise noted. Table 2. Parameter Symbol Test Conditions/CommentsMin Typ1 Max Unit DC CHARACTERISTICS—RHEOSTATMODE (ALL RDACs) Resolution N 7 Bits Resistor Integral Nonlinearity2 R-INL RAB = 10 kΩ VDD ≥ 2.7 V −1 ±0.1 +1 LSB VDD < 2.7 V −2.5 ±1 +2.5 LSB RAB = 100 kΩ VDD < 2.7 V −1 ±0.25 +1 LSB Resistor Differential Nonlinearity2 R-DNL −0.5 ±0.1 +0.5 LSB Nominal Resistor Tolerance ΔRAB/RAB −8 ±1 +8 % Resistance Temperature Coefficient3 (ΔRAB/RAB)/ΔT × 106 Code = full scale 35 ppm/°C Wiper Resistance3 RW Code = zero scale RAB = 10 kΩ 55 125 Ω RAB = 100 kΩ 130 400 Ω Bottom Scale or Top Scale RBS or RTS RAB = 10 kΩ 40 80 Ω RAB = 100 kΩ 60 230 Ω Nominal Resistance Match RAB1/RAB2 Code = 0xFF −1 ±0.2 +1 % DC CHARACTERISTICS— POTENTIOMETERDIVIDER MODE (ALL RDACs) Integral Nonlinearity4 INL RAB = 10 kΩ −0.5 ±0.1 +0.5 LSB RAB = 100 kΩ −0.25 ±0.1 +0.25 LSB Differential Nonlinearity4 DNL −0.25 ±0.1 +0.25 LSB Full-Scale Error VWFSE RAB = 10 kΩ −1.5 −0.1 LSB RAB = 100 kΩ −0.5 ±0.1 +0.5 LSB Zero-Scale Error VWZSE RAB = 10 kΩ 1 1.5 LSB RAB = 100 kΩ 0.25 0.5 LSB Voltage Divider Temperature Coefficient3 (ΔVW/VW)/ΔT × 106 Code = half scale ±5 ppm/°C RESISTOR TERMINALS Maximum Continuous Current IA, IB, and IW RAB = 10 kΩ −6 +6 mA RAB = 100 kΩ −1.5 +1.5 mA Terminal Voltage Range5 VSS VDD V Capacitance A, Capacitance B3 CA, CB f = 1 MHz, measured to GND, code = half scale RAB = 10 kΩ 25 pF RAB = 100 kΩ 12 pF Capacitance W3 CW f = 1 MHz, measured to GND, code = half scale RAB = 10 kΩ 12 pF

Table 2. (Continued)

1 Typical values represent average readings at 25°C, VDD = 5 V, VSS = 0 V, and VLOGIC = 5 V. 2 Resistor integral nonlinearity (R-INL) error is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. The maximum wiper current is limited to (0.7 × VDD)/RAB. 3 Guaranteed by design and characterization, not subject to production test. ±1 LSB maximum are guaranteed monotonic operating conditions. referenced bipolar signal adjustment. 6 Different from operating current; supply current for EEPROM program lasts approximately 30 ms. 7 Different from operating current; supply current for EEPROM read lasts approximately 20 µs. 8 PDISS is calculated from (IDD × VDD) + (ILOGIC × VLOGIC). 9 All dynamic characteristics use VDD/VSS = ±2.5 V, and VLOGIC = 2.5 V. 10 Endurance is qualified to 100,000 cycles per JEDEC Standard 22, Method A117 and measured at −40°C to +125°C. with junction temperature in the Flash/EE memory. 12 50 years applies to an endurance of 1k cycles. An endurance of 100k cycles has an equivalent retention lifetime of 5 years.

Table 3. (Continued)

1 Typical values represent average readings at 25°C, VDD = 5 V, VSS = 0 V, and VLOGIC = 5 V. 2 Resistor integral nonlinearity (R-INL) error is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. The maximum wiper current is limited to (0.7 × VDD)/RAB. 3 Guaranteed by design and characterization, not subject to production test. ±1 LSB maximum are guaranteed monotonic operating conditions. referenced bipolar signal adjustment. 6 Different from operating current; supply current for EEPROM program lasts approximately 30 ms. 7 Different from operating current; supply current for EEPROM read lasts approximately 20 µs. 8 PDISS is calculated from (IDD × VDD) + (ILOGIC × VLOGIC). 9 All dynamic characteristics use VDD/VSS = ±2.5 V, and VLOGIC = 2.5 V. 10 Endurance is qualified to 100,000 cycles per JEDEC Standard 22, Method A117 and measured at −40°C to +125°C. with junction temperature in the Flash/EE memory. 12 50 years applies to an endurance of 1k cycles. An endurance of 100k cycles has an equivalent retention lifetime of 5 years.

VLOGIC = 1.8 V to 5.5 V; all specifications TMIN to TMAX, unless otherwise noted. Table 4. SPI Interface1 1 Refer to the AN-1248 for additional information about the serial peripheral interface. 2 All input signals are specified with tr = tf = 1 ns/V (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. 3 Refer to tEEPROM_PROGRAM and tEEPROM_READBACK for memory commands operations (see Table 5). 4 RPULL_UP = 2.2 kΩ to VDD with a capacitance load of 168 pF. Table 5. Control Pins 1 EEPROM program time depends on the temperature and EEPROM write cycles. Higher timing is expected at lower temperatures and higher write cycles. 2 Maximum time after VDD − VSS is equal to 2.3 V. Figure 2. Input Shift Register Contents

TA = 25°C, unless otherwise noted.

1 Maximum terminal current is bounded by the maximum current handling of the

voltage across any two of the A, B, and W terminals at a given resistance. 3 Includes programming of EEPROM memory. ing conditions for extended periods may affect product reliability. JEDEC natural convection environment. centerline, measured in a JEDEC θJB environment. Table 7. Thermal Resistance

1 Thermal impedance simulated values are based on a JEDEC 2S2P thermal

test board. See JEDEC JESD-51. damage may occur on devices subjected to high energy ESD. performance degradation or loss of functionality.

Table 9. 16-Lead TSSOP, SPI Interface Pin Function Descriptions (Continued) 4 A1 Terminal A of RDAC1. VSS ≤ VA ≤ VDD. 5 W1 Wiper Terminal of RDAC1. VSS ≤ VW ≤ VDD. 6 B1 Terminal B of RDAC1. VSS ≤ VB ≤ VDD. 7 VSS Negative Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors. 8 A2 Terminal A of RDAC2. VSS ≤ VA ≤ VDD. 9 W2 Wiper Terminal of RDAC2. VSS ≤ VW ≤ VDD. 10 B2 Terminal B of RDAC2. VSS ≤ VB ≤ VDD. 11 VDD Positive Power Supply. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors. 12 VLOGIC Logic Power Supply; 1.8 V to VDD. Decouple this pin with 0.1 µF ceramic capacitors and 10 µF capacitors. 13 SCLK Serial Clock Line. Data is clocked in at the logic low transition. 15 SDO Serial Data Output. This is an open-drain output pin, and it needs an external pull-up resistor. 16 SYNC Synchronization Input, Active Low. When SYNC returns high, data is loaded into the input shift register.

Figure 40. Daisy-Chain Configuration Figure 41. Daisy-Chain Diagram Table 10. Reduced Commands Operation Truth Table 0 0 0 0 0 X X X X X X X X X X X X NOP: do nothing.

0 Normal mode

1 Shutdown mode

Table 11. Reduced Address Bits Table

1 X1 X1 X1 All channels Not applicable

for these universal adjustment devices (see Table 16 and Table 18). The AD5122/AD5142 include one input register per RDAC register. and read back from using Command 3 (see Table 16). synchronously by Command 8 (see Table 16). automatically overwrites the associated input register. control register (see Table 18). ter mode and linear gain setting mode. the devices cannot operate in potentiometer mode. potentiometer or linear gain setting mode is enabled. Table 12. Top Scale Truth Table Table 13. Bottom Scale Truth Table executed in a single channel or multiple channels.

large adjustments than to small adjustments. Table 14. Detailed Left Shift and Right Shift Functions for the ±6 dB Step with the contents of the EEPROM and takes approximately 30 µs. Table 16) and set the LSB (D0) to 0 to exit shutdown mode. Table 15. Truth Table for Shutdown Mode

0 N/A1 Open Open RBS

1 Open N/A1 N/A1 N/A1

any update to these registers. This can be done by using software. EEPROM into the RDAC register. pin is pulled low, the device powers up in potentiometer mode. potentiometer mode (see Table 18). Table 16. Advance Command Operation Truth Table

Table 16. Advance Command Operation Truth Table (Continued) Table 17. Address Bits

1 X1 X1 X1 All channels All channels All channels All channels Not applicable

Table 18. Control Register Bit Descriptions

analog.com Rev. D | 26 of 27 Package Drawing (Option) Package Type Package Description CP-16-22 LFCSP 16-Lead Lead Frame Chip Scale Package RU-16 TSSOP 16-Lead Thin Shrink Small Outline Package For the latest package outline information and land patterns (footprints), go to Package Index. ORDERING GUIDE Model1, 2 Temperature Range Package Description Package OptionBranding AD5122BCPZ10-RL7 −40°C to +125°C 16-Lead LFCSP CP-16-22 DH8 AD5122BCPZ100-RL7 −40°C to +125°C 16-Lead LFCSP CP-16-22 DH9 AD5122WBCPZ10-RL7 −40°C to +125°C 16-Lead LFCSP CP-16-22 DMY AD5122BRUZ10 −40°C to +125°C 16-Lead TSSOP RU-16 AD5122BRUZ100 −40°C to +125°C 16-Lead TSSOP RU-16 AD5122BRUZ10-RL7 −40°C to +125°C 16-Lead TSSOP RU-16 AD5122WBRUZ10-RL7 −40°C to +125°C 16-Lead TSSOP RU-16 AD5122BRUZ100-RL7 −40°C to +125°C 16-Lead TSSOP RU-16 AD5142BCPZ10-RL7 −40°C to +125°C 16-Lead LFCSP CP-16-22 DH5 AD5142BCPZ100-RL7 −40°C to +125°C 16-Lead LFCSP CP-16-22 DH6 AD5142WBCPZ10-RL7 −40°C to +125°C 16-Lead LFCSP CP-16-22 DN0 AD5142BRUZ10 −40°C to +125°C 16-Lead TSSOP RU-16 AD5142BRUZ100 −40°C to +125°C 16-Lead TSSOP RU-16 AD5142BRUZ10-RL7 −40°C to +125°C 16-Lead TSSOP RU-16 AD5142WBRUZ10-RL7 −40°C to +125°C 16-Lead TSSOP RU-16 AD5142BRUZ100-RL7 −40°C to +125°C 16-Lead TSSOP RU-16 1 Z = RoHS Compliant Part. 2 W = Qualified for Automotive Applications. RAB (KΩ), RESOLUTION, AND INTERFACE OPTIONS Model1, 2 RAB (kΩ) Resolution Interface AD5122BCPZ10-RL7 10 128 SPI AD5122BCPZ100-RL7 100 128 SPI AD5122WBCPZ10-RL7 10 128 SPI AD5122BRUZ10 10 128 SPI AD5122BRUZ100 100 128 SPI AD5122BRUZ10-RL7 10 128 SPI AD5122WBRUZ10-RL7 10 128 SPI AD5122BRUZ100-RL7 100 128 SPI AD5142BCPZ10-RL7 10 256 SPI AD5142BCPZ100-RL7 100 256 SPI AD5142WBCPZ10-RL7 10 256 SPI AD5142BRUZ10 10 256 SPI AD5142BRUZ100 100 256 SPI AD5142BRUZ10-RL7 10 256 SPI AD5142WBRUZ10-RL7 10 256 SPI AD5142BRUZ100-RL7 100 256 SPI 1 Z = RoHS Compliant Part. 2 W = Qualified for Automotive Applications.

©2012-2024 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. One Analog Way, Wilmington, MA 01887-2356, U.S.A. Rev. D | 27 of 27 EVALUATION BOARDS Model1, 2 Description EVAL-AD5142DBZ Evaluation Board 1 Z = RoHS Compliant Part. 2 The evaluation board is shipped with the 10 kΩ RAB resistor option; however, the board is compatible with all of the available resistor value options. AUTOMOTIVE PRODUCTS The AD5122W and AD5142W models are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.