AD420AN-32

AD420 AD | Alldatasheet

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1.25kV REFERENCE CLOCK 16-BIT DAC DATA I/P REGISTER SWITCHED CURRENT SOURCES AND FILTERING CAP 2 REV. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a Serial Input 16-Bit 4 mA–20 mA, 0 mA–20 mA DAC

FEATURES

4 mA–20 mA, 0 mA–20 mA or 0 mA–24 mA Current Output 16-Bit Resolution and Monotonicity 60.012% Max Integral Nonlinearity 60.05% Max Offset (Trimmable) 60.15% Max Total Output Error (Trimmable) Flexible Serial Digital Interface (3.3 MBPS) On-Chip Loop Fault Detection On-Chip 5 V Reference (25 ppm/ 8C Max) Asynchronous CLEAR Function Maximum Power Supply Range of 32 V Output Loop Compliance of 0 V to V CC – 2.5 V 24-Lead SOIC and PDIP Packages PRODUCT DESCRIPTION The AD420 is a complete digital to current loop output con- verter, designed to meet the needs of the industrial control market. It provides a high precision, fully integrated, low cost single-chip solution for generating current loop signals in a compact 24-lead SOIC or PDIP package. The output current range can be programmed to 4 mA–20 mA, 0 mA–20 mA or an overrange function of 0 mA–24 mA. The AD420 can alternatively provide a voltage output from a sepa- rate pin that can be configured to provide 0 V–5 V, 0 V–10 V, – 5 V or – 10 V with the addition of a single external buffer amplifier. The 3.3M Baud serial input logic design minimizes the cost of galvanic isolation and allows for simple connection to com- monly used microprocessors. It can be used in three-wire or asynchronous mode and a serial-out pin is provided to allow daisy chaining of multiple DACs on the current loop side of the isolation barrier. The AD420 uses sigma-delta ( SD ) DAC technology to achieve 16-bit monotonicity at very low cost. Full-scale settling to 0.1% occurs within 3 ms. The only external components that are re- quired (in addition to normal transient protection circuitry) are two low cost capacitors which are used in the DAC output filter. If the AD420 is going to be used at extreme temperatures and supply voltages, an external output transistor can be used to minimize power dissipation on the chip via the “BOOST” pin. The FAULT DETECT pin signals when an open circuit occurs in the loop. The on-chip voltage reference can be used to supply a precision +5 V to external components in addition to the AD420 or, if the user desires temperature stability exceeding 25 ppm/°C, an external precision reference such as the AD586 can be used as the reference. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 AD420 The AD420 is available in a 24-lead SOIC and PDIP over the industrial temperature range of –40 °C to +85°C. PRODUCT HIGHLIGHTS 1. The AD420 is a single chip solution for generating 4 mA– 20 mA or 0 mA–20 mA signals at the “controller end” of the current loop. 2. The AD420 is specified with a power supply range from 12 V to 32 V. Output loop compliance is 0 V to V CC – 2.5 V. 3. The flexible serial input can be used in three-wire mode with SPI® or MICROWIRE® microcontrollers, or in asyn- chronous mode which minimizes the number of control signals required. 4. The serial data out pin can be used to daisy chain any num- ber of AD420s together in three-wire mode. 5. At power-up the AD420 initializes its output to the low end of the selected range. 6. The AD420 has an asynchronous CLEAR pin which sends the output to the low end of the selected range (0 mA, 4 mA, or 0 V). 7. The AD420 BOOST pin accommodates an external transis- tor to off-load power dissipation from the chip. 8. The offset of – 0.05% and total output error of – 0.15% can be trimmed if desired, using two external potentiometers. SPI is a registered trademark of Motorola. MICROWIRE is a registered trademark of National Semiconductor.

REV. F–2– AD420–SPECIFICATIONS(TA = TMIN–TMAX, VCC = +24 V, unless otherwise noted) AX-32 Version 1 Parameter Min Typ Max Units Comments RESOLUTION 16 Bits IOUT CHARACTERISTICS RL = 500 W Operating Current Ranges 4 20 mA 02 0 m A 02 4 m A Current Loop Voltage Compliance 0 V CC – 2.5 V V Settling Time (to 0.1% of FS) 2 2.5 3 ms Output Impedance (Current Mode) 25 M W Accuracy3 Monotonicity 16 Bits Integral Nonlinearity – 0.002 – 0.012 % Offset (0 mA or 4 mA) (T Offset Drift 20 50 ppm/ °C Total Output Error (20 mA or 24 mA) (TA = +25°C) – 0.15 % Total Output Error Drift 20 50 ppm/ °C PSRR4 51 0 mA/V VOUT CHARACTERISTICS FS Output Voltage Range (Pin 17) 0 5 V VOLTAGE REFERENCE REF OUT Output Voltage (T A = +25°C) 4.995 5.0 5.005 V Drift – 25 ppm/ °C Externally Available Current 5 mA Short Circuit Current 7 mA REF IN Resistance 30 k W VLL Output Voltage 4.5 V Externally Available Current 5 mA Short Circuit Current 20 mA DIGITAL INPUTS VIH (Logic 1) 2.4 V VIL (Logic 0) 0.8 V IIH (VIN = 5.0 V) – 10 mA IIL (VIN = 0 V) – 10 mA Data Input Rate (“3-Wire” Mode) No Minimum 3.3 MBPS Data Input Rate (“Asynchronous” Mode) No Minimum 150 kBPS DIGITAL OUTPUTS FAULT DEFECT VOH (10 kW Pull-Up Resistor to V LL) 3.6 4.5 V VOL (10 kW Pull-Up Resistor to V LL)0 . 2 0 . 4 V VOL @ 2.5 mA 0.6 V DATA OUT VOH (IOH = –0.8 mA) 3.6 4.3 V VOL (IOL = 1.6 mA) 0.3 0.4 V POWER SUPPLY Operating Range V CC 12 32 V Quiescent Current 4.2 5.5 mA Quiescent Current (External V LL)3 m A TEMPERATURE RANGE Specified Performance –40 +85 °C NOTES 1X refers to package designator, R or N. 2External capacitor selection must be as described in Figure 5. 3Total Output Error includes Offset and Gain Error. Total Output Error and Offset Error are with respect to the Full-Scale Outpu t and are measured with an ideal +5 V reference. If the internal reference is used, the reference errors must be added to the Offset and Total Output Errors. 4PSRR is measured by varying V CC from 12 V to its maximum 32 V. Specifications subject to change without notice.

conditions for extended periods may affect device reliability. *N = Plastic DIP, R = Plastic SOIC. accumulate on the human body and test equipment and can discharge without detection. precautions are recommended to avoid performance degradation or loss of functionality. Figure 1. Functional Block Diagram

0 X X Normal Operation

1 X X Output at Bottom of Span

REV. F –5– AD420 PIN DESCRIPTION Pin # Symbol Function 1, 12, 13, 24 NC No Connection. No internal connections inside device. 2V LL Auxiliary buffered +4.5 V digital logic voltage. This pin is the internal supply voltage for the digital circuitry and can be used as a termination for pull-up resistors. An external +5 V power supply can be connected to V LL. It will override this buffered voltage, thus reducing the internal power dissipation. The VLL pin should be decoupled to GND with a 0.1 mF capacitor. See Power Supplies and Decoupling section.

3 FAULT DETECT FAULT DETECT, connected to a pull-up resistor, is asserted low when the

output current does not match the DAC’s programmed value, for example, in case the current loop is broken. 4 RANGE SELECT 2 Selects the converter’s output operating range. One output voltage range and three 5 RANGE SELECT 1 output current ranges are available.

6 CLEAR Valid V

IH will unconditionally force the output to go to the minimum of its programmed range. After CLEAR is removed the DAC output will remain at this value. The data in the input register is unaffected.

7 LATCH In the three-wire interface mode a rising edge parallel loads the serial input register

data into the DAC. To use the asynchronous mode connect LATCH through a current limiting resistor to V CC. 8 CLOCK Data Clock Input. The clock period is equal to the input data bit rate in the three- wire interface mode and is 16 times the bit rate in asynchronous mode. 9 DATA IN Serial Data Input. 10 DATA OUT Serial Data Output. In the three-wire interface mode, this output can be used for daisy-chaining multiple AD420s. In the asynchronous mode a positive pulse will indicate a framing error after the stop-bit is received. 11 GND Ground (Common). 14 REF OUT +5 V Reference Output. 15 REF IN Reference Input. 16 OFFSET TRIM Offset Adjust. 17 V OUT Voltage Output. 18 I OUT Current Output.

19 BOOST Connect to an external transistor to reduce the power dissipated in the AD420

output transistor, if desired. 20 CAP 1 These pins are used for internal filtering. Connect capacitors between each of these 21 CAP 2 pins and V CC. Refer to the description of current output operation. 22 NC No Connection. Do not connect anything to this pin. 23 V CC Power Supply Input. The V CC pin should always be decoupled to GND with a 0.1 mF capacitor. See Power Supplies and Decoupling section. DEFINITIONS OF SPECIFICATIONS RESOLUTION: For 16-bit resolution, 1 LSB = 0.0015% of the FSR. In the 4 mA–20 mA range 1 LSB = 244 nA. INTEGRAL NONLINEARITY: Analog Devices defines inte- gral nonlinearity as the maximum deviation of the actual, ad- justed DAC output from the ideal analog output (a straight line drawn from 0 to FS – 1 LSB) for any bit combination. This is also referred to as relative accuracy. DIFFERENTIAL NONLINEARITY: Differential nonlinearity is the measure of the change in the analog output, normalized to full scale, associated with an LSB change in the digital input code. Monotonic behavior requires that the differential linearity error be greater than –1 LSB over the temperature range of interest. MONOTONICITY: A DAC is monotonic if the output either increases or remains constant for increasing digital inputs with the result that the output will always be a single-valued function of the input. GAIN ERROR: Gain error is a measure of the output error between an ideal DAC and the actual device output with all 1s loaded after offset error has been adjusted out. OFFSET ERROR: Offset error is the deviation of the output current from its ideal value expressed as a percentage of the full- scale output with all 0s loaded in the DAC. DRIFT: Drift is the change in a parameter (such as gain and offset) over a specified temperature range. The drift temperature coefficient, specified in ppm/ °C, is calculated by measuring the parameter at T MIN, 25°C, and TMAX and dividing the change in the parameter by the corresponding temperature change. CURRENT LOOP VOLTAGE COMPLIANCE: The voltage compliance is the maximum voltage at the I OUT pin for which the output current will be equal to the programmed value.

high voltage analog circuitry. LL pin, or an external +5 V logic supply. before the fault detect output becomes active. mation and trigger the internal LATCH signal. Figure 4. Functional Block Diagram

Figure 14. Output Transient Voltage Protection system. High frequency ceramic capacitors are recommended.

REV. F –11– AD420 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 24-Lead Plastic DIP (N-24) 11 2 1.275 (32.30) 1.125 (28.60) 0.280 (7.11) 0.240 (6.10) PIN 1 SEATING PLANE 0.022 (0.558) 0.014 (0.356) 0.060 (1.52) 0.015 (0.38) 0.150 (3.81) MIN 0.070 (1.77) 0.045 (1.15) 0.200 (5.05) 0.125 (3.18) 0.210 (5.33) MAX 0.100 (2.54) BSC 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) 24-Lead Small Outline (SOIC) (R-24) 24 13 121 0.6141 (15.60) 0.5985 (15.20) 0.4193 (10.65) 0.3937 (10.00) 0.2992 (7.60) 0.2914 (7.40) PIN 1 SEATING PLANE 0.0118 (0.30) 0.0040 (0.10) 0.0192 (0.49) 0.0138 (0.35) 0.1043 (2.65) 0.0926 (2.35) 0.0500 (1.27) BSC 0.0125 (0.32) 0.0091 (0.23) 0.0500 (1.27) 0.0157 (0.40) 0.0291 (0.74) 0.0098 (0.25)x 45° PRINTED IN U.S.A. C1870e–0–9/99