AD420

AD420 (Rev. I)

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• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 16

Technical content

4 mA–20 mA, 0 mA–20 mA DAC Data Sheet AD420 Rev. I Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 ©2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES

4 mA–20 mA, 0 mA–20 mA or 0 mA–24 mA current output 16-bit resolution and monotonicity ±0.012% max integral nonlinearity ±0.05% max offset (trimmable) ±0.15% max total output error (trimmable) Flexible serial digital interface (3.3 MBPS) On-Chip loop fault detection On-chip 5 V reference (25 ppm/°C max) Asynchronous CLEAR function Maximum power supply range of 32 V Output loop compliance of 0 V to V CC − 2.75 V 24-Lead SOIC and PDIP packages FUNCTIONAL BLOCK DIAGRAM FAULT DETECT IOUT BOOST 40Ω 1.25kΩ 4kΩ VOUT OFFSET TRIM CAP 1 CAP 2 GND VLL VCC REF OUT REF IN DATA OUT CLEAR LATCH CLOCK DATA IN RANGE SELECT 1 RANGE SELECT 2 AD420 REFERENCE DATA I/P REGISTER SWITCHED CURRENT SOURCES AND FILTERING CLOCK 16-BIT DAC 00494-001 Figure 1. GENERAL DESCRIPTION The AD420 is a complete digital to current loop output converter, designed to meet the needs of the industrial control market. It provides a high precision, fully integrated, low cost single-chip solution for generating current loop signals in a compact 24-lead SOIC or PDIP package. The output current range can be programmed to 4 mA to 20 mA, 0 mA to 20 mA or to an overrange function of 0 mA to 24 mA. The AD420 can alternatively provide a voltage output from a separate pin that can be configured to provide 0 V to 5 V ,

0 V to 10 V , ±5 V , or ±10 V with the addition of a single external

buffer amplifier. The 3.3 M Baud serial input logic design minimizes the cost of galvanic isolation and allows for simple connection to commonly used microprocessors. It can be used in 3-wire or asynchronous mode and a serial-out pin is provided to allow daisy chaining of multiple DACs on the current loop side of the isolation barrier. The AD420 uses sigma-delta (Σ-Δ) DAC technology to achieve 16-bit monotonicity at very low cost. Full-scale settling to 0.1% occurs within 3 ms. The only external components that are required (in addition to normal transient protection circuitry) are two low cost capacitors which are used in the DAC out- put filter. If the AD420 is used at extreme temperatures and supply voltages, an external output transistor can be used to minimize power dissipation on the chip via the BOOST pin. The FAULT DETECT pin signals when an open circuit occurs in the loop. The on-chip voltage reference can be used to supply a precision +5 V to external components in addition to the AD420 or, if the user desires temperature stability exceeding 25 ppm/°C, an external precision reference such as the AD586 can be used as the reference. The AD420 is available in a 24-lead SOIC and PDIP over the industrial temperature range of −40°C to +85°C. PRODUCT HIGHLIGHTS 1. The AD420 is a single chip solution for generating 4 mA to 20 mA or 0 mA to 20 mA signals at the controller end of the current loop. 2. The AD420 is specified with a power supply range from 12 V to 32 V . Output loop compliance is 0 V to VCC − 2.75 V . 3. The flexible serial input can be used in 3-wire mode with SPI® or MICROWIRE® microcontrollers, or in asynchronous mode, which minimizes the number of control signals required. 4. The serial data out pin can be used to daisy chain any number of AD420s together in 3-wire mode. 5. At power-up, the AD420 initializes its output to the low end of the selected range. 6. The AD420 has an asynchronous CLEAR pin, which sends the output to the low end of the selected range (0 mA, 4 mA, or 0 V). 7. The AD420 BOOST pin accommodates an external transistor to off-load power dissipation from the chip. 8. The offset of ±0.05% and total output error of ±0.15% can be trimmed if desired, using two external potentiometers.

REVISION HISTORY

3/15—Rev. H to Rev. I Changes to Three-Wire Interface Fast Edges on Digital Input 1/11—Rev. G to Rev. H 11/09—Rev. F to Rev. G 9/99—Rev. E to Rev. F Rev. I | Page 2 of 16

TA = TMIN − TMAX, VCC = +24 V , unless otherwise noted. Table 1. AD420-32 Version Parameter Min Typ Max Units Comments RESOLUTION 16 Bits IOUT CHARACTERISTICS RL = 500 Ω Operating Current Ranges 4 20 mA 0 20 mA 0 24 mA Current Loop Voltage Compliance 0 VCC − 2.75 V V Settling Time (to 0.1% of FS)1 2.5 3 ms Output Impedance (Current Mode) 25 MΩ Accuracy2 Monotonicity 16 Bits Integral Nonlinearity ±0.002 ±0.012 % Offset (0 mA or 4 mA) (TA = +25°C) ±0.05 % Offset Drift 20 50 ppm/° C Total Output Error (20 mA or 24 mA) (TA = +25°C) ±0.15 % Total Output Error Drift 20 50 ppm/° C PSRR3 5 10 µA/V VOUT CHARACTERISTICS FS Output Voltage Range (Pin 17) 0 5 V VOLTAGE REFERENCE REF OUT Output Voltage (TA = +25° C) 4.995 5.0 5.005 V Drift ±25 ppm/° C Externally Available Current 5 mA Short Circuit Current 7 mA REF IN Resistance 30 kΩ VLL Output Voltage 4.5 V Externally Available Current 5 mA Short Circuit Current 20 mA DIGITAL INPUTS VIH (Logic 1) 2.4 V VIL (Logic 0) 0.8 V IIH (VIN = 5.0 V) ±10 µA IIL (VIN = 0 V) ±10 µA Data Input Rate (3-Wire Mode) No Minimum 3.3 MBPS Data Input Rate (Asynchronous Mode) No Minimum 150 kBPS DIGITAL OUTPUTS FAULT DEFECT VOH (10 kΩ Pull-Up Resistor to VLL) 3.6 4.5 V VOL (10 kΩ Pull-Up Resistor to VLL) 0.2 0.4 V VOL @ 2.5 mA 0.6 V DATA OUT VOH (IOH = −0.8 mA) 3.6 4.3 V VOL (IOL = 1.6 mA) 0.3 0.4 V Rev. I | Page 3 of 16

Parameter Min Typ Max Units Comments POWER SUPPLY Operating Range VCC 12 32 V Quiescent Current 4.2 5.5 mA Quiescent Current (External VLL) 3 mA TEMPERATURE RANGE Specified Performance −40 +85 °C 1 External capacitor selection must be as described in Figure 6. 2 Total Output Error includes Offset and Gain Error. Total Output Error and Offset Error are with respect to the Full-Scale Output and are measured with an ideal +5 V reference. If the internal reference is used, the reference errors must be added to the Offset and Total Output Errors. 3 PSRR is measured by varying VCC from 12 V to its maximum 32 V. Rev. I | Page 4 of 16

Table 3. Truth Table

0 X X Normal operation

1 X X Output at bottom of

Figure 2. Pin Configuration Table 4. Pin Function Descriptions NC No Connection. No internal connections inside device. the DAC’s programmed value, for example, in case the current loop is broken. 5 RANGE SELECT 1 output current ranges are available. is removed the DAC output will remain at this value. The data in the input register is unaffected. use the asynchronous mode connect LATCH through a current limiting resistor to VCC. 16 times the bit rate in asynchronous mode. 9 DATA IN Serial Data Input. 14 REF OUT +5 V Reference Output. 16 OFFSET TRIM Offset Adjust. 21 CAP 2 pins and VCC. Refer to the description of current output operation. 22 NC No Connection. Do not connect anything to this pin. Power Supplies and Decoupling section.

For 16-bit resolution, 1 LSB = 0.0015% of the FSR. In the 4 mA–20 mA range 1 LSB = 244 nA. Integral Nonlinearity Analog Devices defines integral nonlinearity as the maximum deviation of the actual, adjusted DAC output from the ideal analog output (a straight line drawn from 0 to FS – 1 LSB) for any bit combination. This is also referred to as relative accuracy. Differential Nonlinearity Differential nonlinearity is the measure of the change in the analog output, normalized to full scale, associated with an LSB change in the digital input code. Monotonic behavior requires that the differential linearity error be greater than –1 LSB over the temperature range of interest. Monotonicity A DAC is monotonic if the output either increases or remains constant for increasing digital inputs with the result that the output will always be a single-valued function of the input. Gain Error Gain error is a measure of the output error between an ideal DAC and the actual device output with all 1s loaded after offset error has been adjusted out. Offset Error Offset error is the deviation of the output current from its ideal value expressed as a percentage of the fullscale output with all 0s loaded in the DAC. Drift Drift is the change in a parameter (such as gain and offset) over a specified temperature range. The drift temperature coefficient, specified in ppm/°C, is calculated by measuring the parameter at T MIN, 25°C, and TMAX and dividing the change in the parameter by the corresponding temperature change. Current Loop Voltage Compliance The voltage compliance is the maximum voltage at the IOUT pin for which the output current will be equal to the programmed value. Rev. I | Page 8 of 16

monotonicity at high resolution. filtered by two, continuous time resistor-capacitor sections. and high voltage analog circuitry. allows the user to obtain 0 V–5 V , 0 V–10 V , ±5 V , or ±10 V . LL pin, or an external +5 V logic supply. internal amplifier as shown in the functional block diagram. the gate of the output PMOS transistor nearly reaches ground). error occurs before the fault detect output becomes active. information and trigger the internal LATCH signal. Figure 5. Functional Block Diagram

the various SPI data and control registers.

8 BITS

The SPI data port is configured to process data in 8-bit bytes. automatically transferred to the AD420 internal shift resister. Figure 11. AD420-to-68HC11 (SPI) Interface Figure 12. AD420-to-MICROWIRE Interface

Figure 15. Output Transient Voltage Protection system. High frequency ceramic capacitors are recommended. achieved by using a larger value capacitor on the VLL pin.

Rev. I | Page 16 of 16 NOTES ©2015 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the prop erty of their respective owners. D00494-0-3/15(I)