AD2S75

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ANALOG Universal Synchro/Resolver DEVICES Transformer Isolated Interface FEATURES BLOCK DIAGRAM Universal Transformer Isolated Synchro/Resolver qeer Interface INPUT, o> Supports All the Standard Synchro/Resolver Voltages sews fT cy" High Accuracy over Full Military Temperature Range wv mol ‘a E } sin Wideband Performance: 56 Hz to 20,000 Hz Pepe | Not Achievable with Conventional Transformers st 4 HGH | § i d sitio Wide Power Supply Range: +5 to +15 V dc 11.8 RMS| 3 ] PRECISION |

1000 V de Transformer Isolation 84 1 NETWORKS precision

Dimensions: 1.37 x 1.1 x 0.3 inch st 4 euzcrnomic [7 °° (35 x 27.7 x 7.6 mm) wv ‘| CONDITIONING | % © COs, APPLICATIONS “ ° Universal Synchro/Resolver Interface REF D REF L Military Systems/Equipment REFERENCE | | eso | Avionics 11.8- 115V RMS NETWORK S oveno Factory Automation REF ip © ] Interfaces to Most R/DCs Including AD2S80A/81A/82A, bv, AD2S83, AD2S90 Transformer Isolator, Signal Buffer, Signal Conditioning GENERAL DESCRIPTION The AD2S75AM operates over the industrial temperature range The AD2875 is a functionally complete, analog signal condition- of ~40°C to +85°C. The AD2S75SMB is designed to operate ing transformer interface for all the standard synchro/resolver over the full military temperature range of —55°C to +125°C. format signals. PRODUCT HIGHLIGHTS The AD2S75 performs synchro-to-resolver and resolver-to~ Complete Synchro/Resolver Interface. The AD2S75 is a uni- resolver signal transformations. The device features signal inputs _yersal synchro/resolver interface for resolver-to-digital converters for 90 V rms, 26 V rms and 11.8 V rms, and outputs 2 V rms that accept 2 V rms resolver format signals. All the standard resolver format signals (sine and cosine). The reference fre- synchro/resolver voltages are catered for, thus eliminating the quency input accepts sinusoidal signals in the range 11.8 V rms eed for different voltage option devices to be ordered and to be to 115 V rms and outputs a nominal voltage of 2 V rms with held in stock. enhanced zero crossing definition, ; 1000 V de Transformer Isolation. The AD2S75 continues the _ __ All inputs are isolated from the outputs and power supply lines transformer isolated SDC/RDC tradition from Analog Devices. by use of patent design miniature transformers thus providing The internal miniature transformers present a balanced input true galvanic isolation. On the secondary (low side) of the isola- regardless of other equipment that may be connected to the tion transformers, analog signal conditioning circuits are used to synchro, ot resolver. sustain the performance and stabilize the device over the wide ‘True Galvanic Isolation. 1000 V de input to output isolation telerence freqeency.. range as well as over the broad range of regardless of input voltage amplitude level. The galvanic isola- . . . tion completely eliminates ground loops between the transducer ‘The AD2S75 is a wide bandwidth device which operates over @ and the converter, thus minimizing errors. reference frequency range of 56 Hz to 20,000 Hz. This covers igh Co Mode V. : , the majority of commercially available synchros and resolvers for High Common-Mode Voltage consistent across all input voltage military and industrial use, thus providing the isolated interface ranges. Electronic solid state conditioning circuits are input volt- for these types of transducers. The AD2S75 operates over the age amplitude dependent. wide range of +5 V dc to +15 V de nominal power supplies Ratiometric Inputs. Eliminate errors due to parasitic capaci- without degradation in accuracy or a reduction in the range of tance effects and enhance the accuracy performance of synchros reference frequency. and resolvers. — — REV.A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties otherwise under any patent or patent rights of Analog Devices. Tel: 617/329-4700 Fax: 617/326-8703

AD2S75 SPECIFI C ATIONS (typical at +25°C, +¥, = +15 V and nominal input voltages unless specified — otherwise) Paneer [Mia Typ Mar [Unis | mate Contos ACCURACY ~ 60 Hz, 400 Hz 0.33 1.32.| arcmin | Reference Frequency, Accuracy Tested at 60, 2600 Hz 0.66 1.98 | arcmin | 400, and 2600. ACCURACY Tyan 10 Tuax 2.5 | are min SIGNAL INPUT FORMAT! [__Ss*d~—__[ Bither Synchro or Resolver SIGNAL INPUTS"?

90 V Synchro S1, $2, $3 810 99 | Vims | Line to Line

90 V Synchro Input Impedance 200.0 Py Resistive, Tolerance +0.1% (including Transformer Winding Resistance) 11.8 V Synchro $1, $2, $3 10.6 18 13 [Vrms | Line to Line 11.8 V Synchro Input Impedance 26.25 ka Resistive, Tolerance +0.1% (Including Transformer Winding Resistance) 26 V Resolver $1, $2, $3, $4 234 26 28.6 | Vrms | Line to Line 26 V Resolver Input Impedance 57.8 ry Resistive, Tolerance 0.1% (including Transformer Winding Resistance) 11.8 V Resolver $1, $2, $3, $4 106 18 13. | Vrms __| Line to Line 11.8 V Resolver Input Impedance 26.25 ko Resistive Tolerance +0.1% (Including Transformer Winding Resistance) OUTPUT SIGNAL FORMAT Resolver Format 2 V rms ~ Output Signals 1.980 2 2.020 | Vrms | Tested with Nominal Input Voltage at (SIN to SIN; o, COS to COS,0) 400 Hz SIGNAL OUTPUT DRIVE CAPABILITY [0 ti‘(‘i CCK SIGNAL CURRENT OUTPUT DRIVE mA peak | Minimum Refers to Operation with Supplies Vy = #5 Vide SIGNAL OUTPUT OFFSET SIN, COS Measured across SIN, SINyo and COS, COSio OUTPUT SIGNAL PHASE SHIFT SIN, COS with Respect to Reference, ~ 60 Hz, 400 Hz 0.66 degrees | Measured at Zero Crossings, 2600 Hz 0.25 degrees | Average of Both Alignments. OUTPUT SIGNALS DIFFERENTIAL PHASE SHIFT SIN with Respect to COS, Measured at 60 Hz, 400 Hz 0.66 degrees | Zero Crossings, Average of Both 2600 Hz 0.25 degrees | Alignments. REFERENCE INPUT SIGNAL VOLTAGE ? 1s Vims _ | Reference Frequency = 60 Hz to 20000 Hz Reference Input Impedance 81 Ka Resistive, Tolerance 2% REFERENCE OUTPUT VOLTAGE SIGNAL Zero Crossing Transition Enhanced Waveform VP 11.8 V rms 08 12 14 — | Vims | Ourput Signal Consists of a 1.1 V Square Wave DP 26 V rms Ll o4 1.7 | Vrms __| (at Reference Frequency) on Which Is Super- ~ VP 115 V rms 20 © 23 2.6 | Vrms _| imposed a Sinusoid of Amplitude 1/50 of Reference Frequency. ERENCE OUTPUT iPEDANCE Yat] REFERENCE OUTPUT DRIVE CAPACITANCE | 100, pF._| See Load Considerations REFERENCE CURRENT OUTPUT DRIVE ‘Minimum Refers to Operation with Supplies £V, = 25 Vde ‘TRANSFORMER ISOLATION Input to Output £1000 Vde | With Respect to Grounded Secondary Common-Mode Range 600 Vrms | 400 Hz Input to Case (GND) +1000 Vide POWER SUPPLIES Voltage Levels +Vs 44.75 +15.75 | V de -Vs 4.75 =15.75 | V de -l B 18 | mA -V, = -5 Vde +s 15 200 «| mA +V5 = +15 V de ~ -Is 15 2 0 (| mA -V, = -15 V de Power Dissipation 190 |mW = | #V,=+5Vde 600 [mw | =V, = #15 Vde -2- REV. A

— Coumea Tet Contin POWER SUPPLY SENSITIVITY [005 0.2 [arcmin | +V, = +5 Vdeto +15 Vdc DIMENSIONS [I See Outine Dimension WEIGHT [em NOTES ‘Specified for: (a) 10% signal and reference amplitude variation; (b) 10% reference harmonic distortion; (c) +5% power supply variation; (4) +10% variation in reference frequency. 2For power supply voltages +V, less than +6 V dc, signal and reference input voltage overdrive should be constrained to +5% maximum. Boldface type indicates parameters which are 100% tested at nominal values of power supplies, input signal and reference voltage amplitude and operating frequency. All other parameters are guaranteed by design and are not tested. Specifications subject to change without notice. ABSOLUTE MAXIMUM RATINGS? PIN DESCRIPTION $Vgt0GND? 2... eee eee eee eee ee $17.25 V de - — “VitoGND? 1... ss ec esses sere s, =1725Vde Pin [Mnemonic | Description orage Hemperal Synchro input signals. Do not connect for Resolver NOTES signals. "Stresses above those listed under “Absolute Maximum Ratings” may cause — permanent damage to the device. This is a stress rating only and functional 5 11.8 V rms Synchro signal inputs operation of the device at these or any other conditions above those listed in the 6 to $3, SI, $2. (S4 not connected) operational sections of this specification is not implied. Exposure to absolute 7 11.8 V rms Resolver signal inputs (SINE) fasimum rng condone for extended prods may affect deviereailty g to $3, SI, (COSINE) to $2, $4. For Resolver, ly one ite Maximum Rating may be applied at any time. $3-S1 is the effective SINE signal, $2-S¢ is the ?Correct polarity voltages must be maintained on the +V, and —V, pins and a . Correct polarity vou $ s effective COSINE signal. 9 [3 26 V rms Resolver signal inputs (SINE) PIN CONFIGURATION 10 si to $3, S1, (COSINE), to S2, $4. un {sz For Resolver, $3-S1 is the effective i 3l® @| er 2 |s¢ SINE signal, $2-S4 is the effective COSINE signal. 26 V rms Synchro signal inputs (non me ® @} standard) to $3, S1, $2, do not connect $4. s2|® @| sw B Reference Input HI Synchro and Resolver. Te ‘SIN S § “0 4 Reference Input LO Synchro and Resolver.

33 GND

si|@ 402875 cos 15 [CASE | Connect to 0 V, GND Pin 20. tavAMs| 5. 1) (Not To Seale) ®@ 16 Reference output signal connect to R/DC. £08t0 Reference output measured with respect to 0 V, s1|® @| +s GND Pin 20. YL s3 |@ @| rer 17__[#Vs __| Positive power supply line +5 V de to +15 V de aevews| ®* case 8 Cosine ouput signal ern @ @| rv 19 Cosine output signal. Connect to COS Input 46 |@ @| Pw of RDC. 20 ‘Analog ground, 0 V power supplies common. ORDERING GUIDE = 21 Sine output signal return. Operating kage Model Option 22 [SIN __| Sine output signal. Connect to SIN input of R/DC. AD2S75AM | —40°C to +85°C | M-24 23 Negative power supply line ~5 V de to -15 V de. AD2S75SMB | —55°C to +125°C M-24 24 cT Center tap of primary windings. Synchro input signals only—connect to TC Pin 4. Resolver signals do not connect. See connection diagrams, YL REV.A -3-

‘The voltage induced in any stator winding, by the rotor, will be _ (Secondaries), spaced 90° apart. The voltage induced across any pair of stator terminals will be tive to the stator. A = amplitude of the excitation voltage signal. coherent signals. @ = the synchro shaft angle. cal output signals format for a resolver are shown in Figure 2. An equivalent electrical representation and diagram of the typi- the transducer shaft end. cal output signal formats for a synchro are shown in Figure 1. Figure 1. Electrical Representation and Typical Synchro Figure 2. Electrical Representation and Typical Resolver

AD2S75 USER BENEFITS The signals from the synchro should be connected to the appro- The AD2S75 is a user friendly interface device which minimizes _ priate inputs. Refer to pin configuration diagram. many potential sources of error. However errors can occur due 90 V: connect $3 to Pin 1, $1 to Pin 2, $2 to Pin 3. to the nonideal generation of the transducer signals and their 11.8: connect $3 to Pin 5: SI to Ping $2 win? subsequent distribution, limitations such as: Note: $4 (Pin 8) should be lef ° ed f bro si _ . Jote: shot left unconnected for synchro signals © Finite output impedance of the transducer. . : @ Imbalance between transducer impedances. and ected for use with 11.8 V resolver signals only. © Imbalance in chassis wiring impedances. TC, Pin 4 should be connected to CT, Pin 24. These errors are minimized by the use of the AD2S75 which The reference input signal, either 115 V or 26 V, should be con- employs balanced, high precision, high impedance, transformer _ nected to Ryx, and Ryo; Pins 13 and 14, respectively. isolated, input networks. This allows system accuracies to be After the synchro output signals have been connected and the maintained, even when long chassis wiring runs are required devices have been powered up, the synchro signals transformed between synchro/resolver transducer and the AD2S75. Accuracy to resolver signals should be as shown in Figures 1 and 2, is maintained by the simple control of resistive balance of the respectively. transducer signals. This overall balance requirement is domi- . . nated by the precision input resistor network; which greatly Note that the standard notation for the rotation of a synchro, for reduces the balance requirements placed on the transducer and increasing angle is counter clockwise (CCW) as viewed from the associated chassis wiring. When using the AD2S75, the sensitiv. _ Tansducer’s shaft end. ities to signal distribution imbalance (mismatch) are of the order: Resolver ~ Synchro. 90V 87.3 Marc min or 28.8 Mbit in 16 Resolvers are available in a variety of voltages. The three stan- 11.8V_ 11.4 O/are min or 3.8 O/bit in 16 dard voltage ranges (most common) are: Resolver 26V 16.8 /are min or 5.5 /bit in 16 (@) 11.8 V mms, line-to-line signals, 11.8 V rms reference, vari- 11.8V 7.6 Q/arc min or 2.5 M/bit in 16 ous frequencies between 400 Hz to 10,000 Hz. Thus 22 AWG wire at 17 mQ per foot and PCB tracking using b) 26 V rms, line-to-line signals, 26 V fi ‘ 0.012 inch 1 oz. Cu at 400 mf? per foot will not introduce sig- frequencize bere toe ree tO Oe eR ence various nificant errors provided simple control of resistive balance is . a > . maintained, (©) 11.8 V mms, line-to-line signals, 26 V rms reference, various fi ies betw Hz to 10,000 Hz. The use of the AD2S75 eliminates errors due to ill defined meavencies berween 400 Hz t0 10,000 Hz, ~ ground loop currents. This is achieved by the galvanic isolation For nonstandard voltages, please refer to section “Resistive Scal- of the internal transformers and strict adherence to analog star ing of Inputa. point sensing internal to the AD2S75, and between the AD2S75 The signals from the resolver should be connected to appropri- and the RDC as shown in the following connection diagrams. ate inputs. Refer to pin configuration diagram. Errors due to signal loading effects on the SIN and COS outputs _11.8 V: Connect the Sine signal to $3, SI, Pins 5 and 6, SI are minimized by providing balanced, low output impedances, being the voltage measurement reference point. Connect the together with distinct and separate four wire transmission for Cosine signal to $2, S4, Pins 7 and 8, $4 being the voltage mea- SIN, SIN; o and COS, COS, 9. Full angular accuracy is main- surement reference point. ined fi i dri bility. ine si is tained rom Zero to maximum output current drive capability 26 V: Connect the Sine signal to $3, $1, Pins 9 and 10, S1 v Capacitive loading considerations (100 pF maximum) indicate being the voltage measurement reference point. Connect the that the AD2S75 should be sited close to its load, often a Cosine signal to $2, $4, Pins 11 and 12, $4 being the voltage AD2S80A. Provided the capacitive loading limits are met, then measurement reference point. the AD2S75 can be sited in accordance with user preference. ‘TTC Pin 4 and CT Pin 24 should not be connected. CONNECTING THE TRANSDUCERS TO THE AD2S75 The reference input signal should be connected to Ryyy and INTERFACE Ryo; Pins 13 and 14, respectively. yn - “able i . After the connections have been completed and the devices have Synchros are availabl tandard volt 2 ‘ynchros are available in two s voltage ranges: been powered up, the output signals from the AS2S75 should be (a) 90 V rms line-to-line signals, 115 V rms reference, nominal as shown in Figure 2. frequency 400 Hz or 60 Hz. Note that the standard notation for th son of a resolver, f . a . A ote it the stan notation for the rotation a resolver, for @) 118 V ims vine ne signals, 26 V rms reference, nomi- creasing angle is clockwise (CW), as viewed from the trans. equency 2 ducer’s shaft end. For nonstandard voltages, please see section “Resistive Scaling of Inputs.” v REV.A —5-

GENERAL GOOD ENGINEERING PRACTICE CONNECTING THE AD2S75 TO A RESOLVER-TO- ‘The AD2S75 offers the user numerous benefits. This section DIGITAL CONVERTER ~~ describes techniques which will enable the user to achieve the ‘The power supply voltages connected to +V, and —Vs, Pins 17 specified performance of the device. and 23, should be within the range of +5 V de to +15 V dc and Wiring Practice =5 V de to ~15 V de, respectively, with respect to 0 V, (GND The recommended cable for interconnecting synchros to equip Pit 20), and must not be reversed. ment is a three-way twisted cable. Such a cable will eliminate It is recommended that a 100 nF (ceramic) decoupling capacitor any radiated electromagnetic interference, and will have mini- should be connected between each of the supply pins and GND. mum capacitance as there is no need for an earthed screen. This The decoupling capacitors should be placed as near to the device will also present a balanced load to the transducer. as possible. The recommended cable for interconnecting resolvers to The metal package CASE, Pin 15, should be connected to 0 V, equipment would be three separate screened twisted pair cables GND, Pin 20, to screen the internal circuits from any external for the sine, cosine and reference signals. Further information noise and aid the operation of the magnetic circuits within the should be obtained by consulting with the synchro and resolver device. suppliers. The AD2S75 is a universal synchro/resolver interface for Layout Considerations resolver-to-digital converters that accept 2 V rms input signals. The high voltage input signals, including reference, should be The following converters from the Analog Devices range can be kept physically remote from the precision low voltage output used directly with the AD2S75 and benefit from the transformer signals. isolated interface: ~ Input signal track pairs, i.e., $3, $1 should be routed using par- AD2S80A series—monolithic, variable resolution RDC all allel, physically adjacent PCB tracks that employ the same PCB accuracy grades, including the AD2S81A, AD2S82A, layer. This minimizes external radiation that could corrupt low AD2S83 and AD2$90. For connections, please see Figure 3. level precision analog signals. Distinct signal track pairs, i.c., General Rur-Ryo and $3-S1 should be routed physically separate. This The Sine signal output from the AD2S75 is from SIN and minimizes mutual interference coupling whereby large amplitude SIN» Pins 22 and 21, respectively. signals can corrupt low level signals. This is angle dependent as _ | shown in Figures 1 and 2, e.g., Cosine or Reference coupling to The Cosine signal output from the AD2S75 is from COS and Sine at 0° (Figure 2). COS;o, Pins 19 and 18, respectively. A ground/power plane should not be sited underneath these The Reference signal output from the AD2S75 is from REF and ~ high voltage input signal tracks as these signals can corrupt the GND, Pins 16 and 20 respectively. noise integrity of the plane. The above signals should be connected to the appropriate input Errors due to ill defined ground loop currents should be pins of the RDC. avoided. The use of the AD2S75 enables the complete elimina- The following should be noted: tion of these errors using galvanic isolation within the internal ace the AD2S75 near to the RDC to minimize any external transformers while retaining rigid adherence to analog star point noise pickup sensing internal to the AD2S75 and between the AD2S75 and ; the RDC, as shown in the following connection diagrams. Note Connect the signals from the AD2S75 to the RDC using equal that the signal grounds have been connected to 0 V at the source _engths of pcb track so as to minimize differential phase shifts. ~ of the signal. The tracks should be routed in close proximity, parallel to each other on the same side of the pcb. Avoid the use of ground/ power planes near the route of the ac signals so to avoid ac cou- pling and phase shifts caused by parasitic capacitance. -6- REV.A

to a “star” point at SIGNAL GND, Pin 6 of the RDC. This unconnected. 14- to 16-bit resolution, medium to high accuracy applications. unconnected. — —_Note: The accuracy of the interface and subsequently the accu- S2 Pin 7, $3 Pin 5 and $4 Pin 8. racy of an R/DC, will be affected by the matching accuracies of The current into the reference input is controlled to 1.42 mA. 2.222 kA per extra volt of signal. To calculate the values of the ‘8 the highest standard internal voltage input available.

830 TO = Ey TOP aay [7] REFERENCE vP DEMOD O/P Ogee

Figure 3. Using the AD2S75 to Interface a 90 V Signal, 115 V Reference, 60 Hz~400 Hz, Synchro to AD2S80A

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Figure 4. AD2S75 Closed-Loop Frequency Response 1570 (429) Figure 5. AD2S75 Reference Output Waveform ~ conditions, calculated in accordance with MIL-HDBK-217E. Figure 6. 2575 vs. Temperature