AD260

AD260 Data Sheet

Document overview

• Manufacturer or author: Marie
• PDF pages: 8

Technical content

REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD260 Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1998 High Speed, Logic Isolator with Power Transformer FUNCTIONAL BLOCK DIAGRAM S01 F3 21 SYSTEMFIELD +5Vdc 5Vdc RTN DRIVE +5Vdc 5Vdc RTN 17V p-p OUT CT OUT 17V p-p OUT S12 S23 DRVA AD260 +5V DRVCT DRIVE DRVB TRISTATE LATCH E DLINE 2 TRISTATE LATCH E DLINE 1 TRISTATE LATCH E TRISTATE DLINE 0 14 9 LATCH D E LINE 4 TRISTATE LATCH D E LINE 3 TRISTATE +5Vdc FLD 5V RTN FLD ENABLE FLD PWRA FLD PWRCT FLD PWRB FLD 5V RTN SYS +5Vdc SYS ENABLE SYS17

FEATURES

IsoLogic™ Circuit Architecture Isolation Test Voltage: To 3.5 kV rms Five Isolated Logic Lines: Available in Six I/O Configurations Logic Signal Bandwidth: 20 MHz (Min), 40 mbps (NRZ) Isolated Power Transformer: 37 V p-p, 1.5 W Max CMV Transient Immunity: 10 kV/ ms Min Waveform Edge Transmission Symmetry: 61 ns Field and System Output Enable/Three-State Functions Performance Rated Over –25 8C to +85 8C UL1950, IEC950, EN60950 Certification, Pending

APPLICATIONS

PLC/DCS Analog Input and Output Cards Communications Bus Isolation General Data Acquisition Applications IGBT Motor Drive Controls High Speed Digital I/O Ports GENERAL DESCRIPTION The AD260 is designed using Analog Devices new IsoLogic circuit architecture to isolate five digital control signals to/ from a m icrocontroller and its related field I/O components. Six models allow all I/O combinations from five input lines to five output lines, including combinations in between. Every AD260 effectively replaces up to five opto-isolators while also providing the 1.5 W transformer for a 3.5 kV isolated dc-dc power supply circuit. Each line of the AD260 has a bandwidth of 20 MHz (min) with a propagation delay of only 14 ns, which allows for extremely fast data transmission. Output waveform symmetry is maintained to within – 1 ns of the input so the AD260 can be used to accu- rately isolate time-based PWM signals. All field or system output pins of the AD260 can be set to a high resistance three-state level by use of the two enable pins. A field output three-stated offers a convenient method of presetting logic l evels at power-up by use of pull-up/down resistors. Sys- tem side outputs being three-stated allows for easy multiplexing of multiple AD260s. The isolation barrier of the AD260 B Grade is 100% tested at 3.5 kV rms (system to field). The barrier design also p rovides excellent common-mode transient immunity from 10 kV/ ms common-mode voltage excursions of field side terminals relative to the system side, with no false output triggering on either side. Each output is updated within nanoseconds by input logic tran- sitions, the AD260 also has a continuous output update feature that automatically updates each output based on the dc level of the input. This guarantees the output is always valid 10 ms after a fault condition or after the power-up reset interval. The AD260 also has an integral center tap transformer for gen- erating isolated power. Typically driven by a 5 V push-pull drive at the primary, it will generate a 37 V p-p output capable of supplying up to 1.5 W. This can then be regulated to the de- sired voltage, including – 5 V dc for circuit components and 24 V for a 20 mA loop supply when needed. PRODUCT HIGHLIGHTS Six Isolated Logic Line I/O Configurations Available: The AD260 is available in six pin-compatible versions of I/O con- figurations to meet a wide variety of requirements . Wide Bandwidth with Minimal Edge Error: The AD260 with IsoLogic affords extremely fast isolation of logic signals due to its 20 MHz bandwidth and 14 ns propagation delay. It maintains a waveform input-to-output edge transition error of typically less than – 1 ns (total) for positive vs. negative transition. 3.5 kV rms Test Voltage Isolation Rating : The AD260 B Grade is rated to operate at 1.25 kV rms and is 100% pro- duction tested at 3.5 kV rms, using a standard ADI test method. High Transient Immunity : The AD260 rejects common- mode transients slewing at up to 10 kV/ ms without false trigger- ing or damage to the device. (Continued on pag e 6) IsoLogic is a trademark of Analog Devices, Inc.

–2– REV. 0 AD260–SPECIFICATIONS(Typical at TA = +258C, +5 V dcSYS, +5 V dcFLD, tRR = 50 ns max unless otherwise noted) Parameter Conditions Min Typ Max Units INPUT CHARACTERISTICS Threshold Voltage Positive Transition (V T+) +5 V dc SYS = 4.5 V 2.0 2.7 3.15 V +5 V dcSYS = 5.5 V 3.0 3.2 4.2 V Negative Transition (V T–) +5 V dc SYS = 4.5 V 0.9 1.8 2.2 V +5 V dcSYS = 5.5 V 1.2 2.2 3.0 V Hysteresis Voltage (V H) +5 V dc SYS = 4.5 V 0.4 0.9 1.4 V +5 V dcSYS = 5.5 V 0.5 1.0 1.5 V Input Capacitance (C IN) 5p F Input Bias Current (I IN) Per Input 0.5 mA OUTPUT CHARACTERISTICS Output Voltage 1 High Level (VOH) +5 V dc SYS = 4.5 V, |IO| = 0.02 mA 4.4 V +5 V dcSYS = 4.5 V, |IO| = 4 mA 3.7 V Low Level (VOL) +5 V dc SYS = 4.5 V, |IO| = 0.02 mA 0.1 V +5 V dcSYS = 4.5 V, |IO| = 4 mA 0.4 V Output Three-State Leakage Current ENABLESYS/FLD @ Logic Low/High Level Respectively 0.5 mA DYNAMIC RESPONSE 1 (Refer to Figure 2) Max Logic Signal Frequency (f MIN) 50% Duty Cycle, +5 V dc SYS = 5 V 20 MHz Waveform Edge Symmetry Error (tERROR)t PHL vs. tPLH – 1n s Logic Edge Propagation Delay (t PHL, tPLH)1 4 2 5 n s Minimum Pulsewidth (t PWMIN) 25 ns Max Output Update Delay on Fault or After Power-Up Reset Interval ( » 30 ms)2 12 ms ISOLATION BARRIER RATING 3 Operating Isolation Voltage (V CMV) AD260A 375 V rms AD260B 1250 V rms Isolation Rating Test Volt age (VCMV TEST)4 AD260A 1750 V rms AD260B 3500 V rms Transient Immunity (VTRANSIENT) 10,000 V/ ms Isolation Mode Capacitance (CISO) Total Capacitance, All Lines and Transformer 14 18 pF Capacitive Leakage Current (ILEAD) 240 V rms @ 60 Hz 2 mA rms POWER TRANSFORMER Primary Winding Bifilar Wound, Center-Tapped Inductance (LP) Each Half 1 mH Number of Turns (NP) Each Half 26 Turns Resistance Each Half 0.6 W Max Volt-Seconds (E · t) Each Half 27 V · ms Recommended Operating Frequency –25 °C to +85°C, Push-Pull Drive 150 200 300 kHz Absolute Min Operating Frequency –25 °C to +85°C, Push-Pull Drive 75 kHz Secondary Winding Bifilar Wound, Center-Tapped Number of Turns (NS) Each Half 48 Turns Resistance Each Half 2.3 W Insulation Withstand (VCMV TEST) Primary to Secondary 3,500 V rms Capacitance Primary to Secondary 5 pF Recommended Max Power Rated Performance 1.0 1.5 W POWER SUPPLY Supply Voltage (+5 V dcSYS and +5 V dcFLD) Rated Performance 4.5 5.5 V dc Operating 4.0 5.75 V dc Power Dissipation Capacitance Effective, per Input, Either Side 8 pF Effective per Output, Either Side—No Load 28 pF Quiescent Supply Current Each, +5 V dc SYS & FLD 4m A Supply Current All Lines @ 10 MHz (Sum of +5 V dc SYS & FLD)1 8 m A TEMPERATURE RANGE Rated Performance (TA)5 –25 +85 °C Storage (TSTG) –40 +85 °C NOTES 2As the supply voltage is applied to either side of the AD260, the internal circuitry will go into a power-up reset mode (all li nes disabled) for about 30 ms after the point where +5 V dcSYS & FLD passes above 3.3 V. 3“Operating” isolation voltage is derived from the Isolation Test Voltage in accordance with such methods as found in VDE-0883 w herein a device will be “hi-pot” tested at twice the operating voltage, plus one thousand volts. Partial discharge testing, with an acceptance threshold of 80 pC of discharge m ay be considered the same as a hi-pot test (but nondestructive). 4Partial Discharge at 80 pC THLD. 5Supply Current will increase slightly, but otherwise the unit will function within specification to –40 °C. Specifications are subject to change without notice.

–3–REV. 0 WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD260 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ABSOLUTE MAXIMUM RATINGS* Parameter Conditions Min Typ Max Units Supply Voltage (+5 V dc SYS & FLD) –0.5 +6.0 V DC Input Voltage (V IN MAX) Referred to +5 V dc SYS & FLD and 5 V RTNSYS & FLD Respectively –0.5 +0.5 V DC Output Voltage (V OUT MAX) Referred to +5 V RTN SYS & FLD and 5 V dcSYS & FLD Respectively –0.5 +0.5 V Clamp Diode Input Current (I IK) For V I < –0.5 V or VI > 5 V RTNSYS & FLD +0.5 V –25 +25 mA Clamp Diode Output Current (I OK) For V O < –0.5 V or VO > 5 V RTNSYS & FLD +0.5 V –25 +25 mA Output DC Current, per Pin (I OUT) –25 +25 mA DC Current, VCC or GND (ICC or IGND) –50 +50 mA Storage Temperature (T STG) –40 +85 °C Lead Temperature (Soldering, 10 sec) +300 °C Electrostatic Protection (V ESD) Per MIL-STD-883, Method 3015 4.5 5 kV *Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating o nly; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposu re to absolute maximum ratings for extended periods may effect device reliability. I/O CONFIGURATIONS AVAILABLE The AD260 is available in several configurations. The choice of model is determined by the desired number of input vs. output lines. All models have identical footprints with the power and enable pins always being in the same locations. PIN CONFIGURATION SYSTEM FIELD BOTTOM VIEW ENABLE SYS +5Vdc SYS 5V RTN SYS DRVA DRVCT DRVB PWRB FLD PWRCT FLD PWRA FLD 5V RTN FLD +5Vdc FLD ENABLE FLD ORDERING GUIDE Model Number Description Isolation Test Voltage Package Description Package Option AD260AND-0 0 Inputs, 5 Outputs 1.75 kV rms Plastic DIP ND-22 AD260AND-1 1 Input, 4 Outputs 1.75 kV rms Plastic DIP ND-22 AD260AND-2 2 Inputs, 3 Outputs 1.75 kV rms Plastic DIP ND-22 AD260AND-3 3 Inputs, 2 Outputs 1.75 kV rms Plastic DIP ND-22 AD260AND-4 4 Inputs, 1 Output 1.75 kV rms Plastic DIP ND-22 AD260AND-5 5 Inputs, 0 Outputs 1.75 kV rms Plastic DIP ND-22 AD260BND-0 0 Inputs, 5 Outputs 3.5 kV rms Plastic DIP ND-22 AD260BND-1 1 Input, 4 Outputs 3.5 kV rms Plastic DIP ND-22 AD260BND-2 2 Inputs, 3 Outputs 3.5 kV rms Plastic DIP ND-22 AD260BND-3 3 Inputs, 2 Outputs 3.5 kV rms Plastic DIP ND-22 AD260BND-4 4 Inputs, 1 Output 3.5 kV rms Plastic DIP ND-22 AD260BND-5 5 Inputs, 0 Outputs 3.5 kV rms Plastic DIP ND-22 PIN FUNCTION DESCRIPTIONS Pin Mnemonic Function 1–5* S0 Through S4 Digital Xmt or Rcv from F0 Through F4

6 ENABLE SYS System Output Enable/Three-State

7 +5 V dc SYS System Power Supply (+5 V dc Input) 8 5 V RTN SYS System Power Supply Common 9–14 Not Present On Unit 15 5 V RTN FLD Field Power Supply Common 16 +5 V dc FLD Field Power Supply (+5 V Input)

17 ENABLE FLD Field Output Enable/Three-State

18–22* F0 Through F4 Digital Xmt or Rcv from S0 Through S4 *Function of pin determined by model. Refer to Table I. Caution: Use care in handling unit as contaminants on the bot- tom side of the unit or the circuit card to which it is mounted will lead to reduced breakdown voltage across the isolation barrier.

–4– REV. 0 AD260BND-0 S01 F3 21 SYSTEMFIELD +5Vdc 5Vdc RTN DRIVE +5Vdc 5Vdc RTN 17V p-p OUT CT OUT 17V p-p OUT S12 S23 DRVA AD260-0 +5V DRVCT DRIVE DRVB TRISTATE LATCH E DLINE 2 – OUT TRISTATE LATCH E DLINE 1 – OUT TRISTATE LATCH E TRISTATE DLINE 0 – OUT 14 9 +5Vdc FLD 5V RTN FLD ENABLE FLD PWRA FLD PWRCT FLD PWRB FLD 5V RTN SYS +5Vdc SYS ENABLE SYS17 TRISTATE LATCH E DLINE 4 – OUT TRISTATE LATCH E DLINE 3 – OUT AD260BND-1 S01 F3 21 SYSTEMFIELD +5Vdc 5Vdc RTN DRIVE +5Vdc 5Vdc RTN 17V p-p OUT CT OUT 17V p-p OUT S12 S23 DRVA AD260-1 +5V DRVCT DRIVE DRVB TRISTATE LATCH E D TRISTATE LATCH E D TRISTATE LATCH E TRISTATE DLINE 0 – OUT 14 9 LATCH D E TRISTATE +5Vdc FLD 5V RTN FLD ENABLE FLD PWRA FLD PWRCT FLD PWRB FLD 5V RTN SYS +5Vdc SYS ENABLE SYS17 TRISTATE LATCH E D LINE 1 – OUT LINE 2 – OUT LINE 3 – OUT LINE 4 – IN PIN CONFIGURATIONS AD260BND-2 S01 F3 21 SYSTEMFIELD +5Vdc 5Vdc RTN DRIVE +5Vdc 5Vdc RTN 17V p-p OUT CT OUT 17V p-p OUT S12 S23 DRVA AD260-2 +5V DRVCT DRIVE DRVB TRISTATE LATCH E DLINE 2 – OUT TRISTATE LATCH E DLINE 1 – OUT TRIS TATE LATCH E TRISTA TE DLINE 0 – OUT 14 9 LATCH D E LINE 4 – IN TRISTA TE LATCH D E LINE 3 – IN TRISTATE +5Vdc FLD 5V RTN FLD ENABLE FLD PWRA FLD PWRCT FLD PWRB FLD 5V RTN SYS +5Vdc SYS ENABLE SYS17 AD260BND-3 S01 F3 21 SYSTEMFIELD +5Vdc 5Vdc RTN DRIVE +5Vdc 5Vdc RTN 17V p-p OUT CT OUT 17V p-p OUT S12 DRVA AD260-3 +5V DRVCT DRIVE DRVB TRISTATE LATCH E D TRISTATE LATCH E TRISTATE DLINE 0 – OUT 14 9 LATCH D E TRISTATE LATCH D E TRISTATE +5Vdc FLD 5V RTN FLD ENABLE FLD PWRA FLD PWRCT FLD PWRB FLD 5V RTN SYS +5Vdc SYS ENABLE SYS17 LATCH D E TRISTATE LINE 1 – OUT LINE 2 – IN LINE 3 – IN LINE 4 – IN

–5–REV. 0 PIN CONFIGURATIONS Table I. Pin AD260BND-0 AD260BND-1 AD260BND-2 AD260BND-3 AD260BND-4 AD260BND-5

1 S0 (Xmt) S0 (Xmt) S0 (Xmt) S0 (Xmt) S0 (Xmt) S0 (Rcv)

2 S1 (Xmt) S1 (Xmt) S1 (Xmt) S1 (Xmt) S1 (Rcv) S1 (Rcv)

3 S2 (Xmt) S2 (Xmt) S2 (Xmt) S2 (Rcv) S2 (Rcv) S2 (Rcv)

4 S3 (Xmt) S3 (Xmt) S3 (Rcv) S3 (Rcv) S3 (Rcv) S3 (Rcv)

5 S4 (Xmt) S4 (Rcv) S4 (Rcv) S4 (Rcv) S4 (Rcv) S4 (Rcv)

6 ENABLE

12 PWRB

18 F0 (Rcv) F0 (Rcv) F0 (Rcv) F0 (Rcv) F0 (Rcv) F0 (Xmt)

19 F1 (Rcv) F1 (Rcv) F1 (Rcv) F1 (Rcv) F1 (Xmt) F1 (Xmt)

20 F2 (Rcv) F2 (Rcv) F2 (Rcv) F2 (Xmt) F2 (Xmt) F2 (Xmt)

21 F3 (Rcv) F3 (Rcv) F3 (Xmt) F3 (Xmt) F3 (Xmt) F3 (Xmt)

22 F4 (Rcv) F4 (Xmt) F4 (Xmt) F4 (Xmt) F4 (Xmt) F4 (Xmt)

*Pin function is the same on all models, as shown in the AD260BND-0 column. AD260BND-4 S01 F3 21 SYSTEMFIELD +5Vdc 5Vdc RTN DRIVE +5Vdc 5Vdc RTN 17V p-p OUT CT OUT 17V p-p OUT S12 S23 DRVA AD260-4 +5V DRVCT DRIVE DRVB TRISTATE LATCH E TRISTATE DLINE 0 – OUT 14 9 LATCH D E TRISTATE LATCH D E TRISTATE +5Vdc FLD 5V RTN FLD ENABLE FLD PWRA FLD PWRCT FLD PWRB FLD 5V RTN SYS +5Vdc SYS ENABLE SYS17 LATCH D E TRISTATE LATCH D E TRISTATELINE 1 – IN LINE 2 – IN LINE 3 – IN LINE 4 – IN AD260BND-5 S01 F3 21 SYSTEMFIELD +5Vdc 5Vdc RTN DRIVE +5Vdc 5Vdc RTN 17V p-p OUT CT OUT 17V p-p OUT DRVA AD260-5 +5V DRVCT DRIVE DRVB 14 9 LATCH D E TRISTATE LATCH D E TRISTATE +5Vdc FLD 5V RTN FLD ENABLE FLD PWRA FLD PWRCT FLD PWRB FLD 5V RTN SYS +5Vdc SYS ENABLE SYS17 LATCH D E TRISTATE LATCH D E TRISTATE LATCH D E LINE 0 – IN TRISTATE LINE 1 – IN LINE 2 – IN LINE 3 – IN LINE 4 – IN

–8– REV. 0 C3031–8–9/98PRINTED IN U.S.A. 22-Lead Plastic DIP (ND-22) BOTTOM VIEWSYSTEM FIELD 0.250 (6.35) 0.050 (1.27) PIN 1 0.075 (1.91) * CREEPAGE PATH (SUBTRACT APPROXIMATELY 0.079 (2mm) FOR SOLDER PAD RADII ON PC BOARD. THIS SPACING SUPPORTS THE INTRINSICALLY SAFE RATING OF 750V. WAVE SOLDERING IS NOT RECOMMENDED. 0.350 (8.89) 0.5* (12.2) SIDE VIEW 11 12 1.500 (38.1) MAX 0.140 (3.56) 0.020 3 0.010 (0.508 3 0.254)

22 PLACES

0.100 (2.54) 0.550 (13.97) MAX 0.440 (11.18) MAX END VIEW 0.350 (8.89) OUTLINE DIMENSIONS Dimensions shown in inches and (mm).