AD1376JD

AD1376 AD | Alldatasheet

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REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. a AD1376/AD1377 Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 Complete, High Speed 16-Bit A/D Converters FUNCTIONAL BLOCK DIAGRAM PRODUCT DESCRIPTION The AD1376/AD1377 are high resolution, 16-bit analog-to- digital converters with internal reference, clock and laser-trim- med thin-film applications resistors. They are packaged in a compact 32-pin, ceramic scam sealed (hermetic) dual-in-line packages (DIP). Thin-film scaling resistors provide bipolar input ranges of ± 2.5 V, ± 5 V, ± 10 V and unipolar input ranges of 0 V to +5 V, 0 V to +10 V and 0 V to +20 V. Digital output data is provided in parallel and serial form with corresponding clock and status outputs. All digital inputs and outputs are TTL compatible.

APPLICATIONS

The AD1376/AD1377 are excellent for use in high resolution applications requiring moderate speed and high accuracy or

FEATURES

Complete 16-Bit Converters with Reference and Clock 60.003% Maximum Nonlinearity No Missing Codes to 14 Bits over Temperature Fast Conversion 17 ms to 16 Bits (AD1376) 10 ms to 16 Bits (AD1377) Short Cycle Capability Adjustable Clock Rate Parallel and Serial Outputs Low Power: 645 mW Typical (AD1376) 585 mW Typical (AD1377) Industry Standard Pinout stability over commercial (0 °C to +70°C) temperature ranges (for extended temperature ranges, the pin compatible AD1378 is recommended.) Typical applications include medical and analytic instrumentation, precision measurement for industrial robotics, automatic test equipment (ATE), and multichannel data acquisition systems, servo control systems or anywhere wide dynamic range is required A proprietary monolithic DAC and laser-trimmed thin-film resistors guarantee a maximum nonlinearity of ± 0 003% (1/2 LSB 14.) The converters may be short cycled to achieve faster conversion times – 15 µs to 14 bits for the AD1376, or 8 µs to 14 bits for the AD1377. PRODUCT HIGHLIGHTS 1. The AD1376/AD1377 provides 16-bit resolution with a maxi- mum linearity error of ± 0.003% (1/2 LSB14) at +25°C. 2. AD1376 conversion time is 14 µs (typical) short cycled to 14 bits, and 16 µs to 16 bits. 3. AD1377 conversion time is 8 µs (typical) short cycled to 14 bits, and 9 µs to 16 bits. 4. Two binary codes are available on the digital output. They are CSB (Complementary Straight Binary) for unipolar input voltage ranges and COB (Complementary Offset Binary) for bipolar input ranges. Complementary Twos Complement (CTC) coding may be obtained by inverting Pin 1 (MSB). 5. The AD1376 and AD1377 include internal reference and clock, with external clock rate adjust pin, and serial and paral- lel digital outputs.

–2– REV. B AD1376/AD1377–SPECIFICATIONS Model AD1376JD/AD1377JD AD1376KD/AD1377KD Units RESOLUTION 16 (max) 16 (max) Bits ANALOG INPUTS Voltage Ranges Bipolar ± 2.5, ± 5, ± 10 ± 2.5, ± 5, ± 10 Volts Unipolar 0 to +5, 0 to +10, 0 to +20 0 to +5, 0 to +10, 0 to +20 Volts Impedance (Direct Input) 0 V to +5 V, ± 2.5 V 1.88 1.88 k Ω 0 V to +10 V, ± 5.0 V 3.75 3.75 k Ω 0 V to +20 V, ± 10 V 7.50 7.50 k Ω DIGITAL INPUTS1 Convert command Positive Pulse 50 ns Wide (min) Trailing Edge Initiates Conversion Logic Loading 1 1 LS TTL Load TRANSFER CHARACTERISTICS 2 ACCURACY Gain Error ± 0.053 (± 0.2 max) ± 0.053 (± 0.2 max) % Offset Error Unipolar ± 0.053 (± 0.1 max) ± 0.053 (± 0.1 max) % of FSR 4 Bipolar ± 0.053 (± 0.2 max) ± 0.053 (± 0.2 max) % of FSR Linearity Error (max) ± 0.006 ± 0.003 % of FSR Inherent Quantization Error ± 1/2 ± 1/2 LSB Differential Linearity Error ± 0.003 ± 0.003 % of FSR POWER SUPPLY SENSITIVITY ± 15 V dc (± 0.75 V) 0.0015 0.0015 % of FSR/% ΔVS +5 V dc (± 0.25 V) 0.001 0.001 % of FSR/% ΔVS CONVERSION TIME5 12 Bits (AD1376) 11.5 (13 max) 11.5 (13 max) µs 14 Bits (AD1376) 13.5 (15 max) 13.5 (15 max) µs 16 Bits (AD1376) 15.5 (17 max) 15.5 (17 max) µs 14 Bits (AD1377) 8.75 max 8.75 max µs

16 Bits (AD1377) 10 max 10 max µs

Rated Voltage, Analog ± 15, ± 0.5 (max) ± 15, ± 0.5 (max) V dc Rated Voltage, Digital +5, ± 0.25 (max) +5, ± 0.25 (max) V dc AD1376 Power Consumption 645 (850 max) 645 (850 max) mW +15 V Supply Drain +16 +16 mA –15 V Supply Drain –21 –21 mA +5 V Supply Drain +18 +18 mA AD1377 Power Consumption 600 (800 max) 600 (800 max) mW +15 V Supply Drain +10 +10 mA –15 V Supply Drain –23 –23 mA +5 V Supply Drain +18 +18 mA WARM-UP TIME 1 1 minutes DRIFT6 Gain ± 15 (max) ± 5 (± 15 max) ppm/ °C Offset Unipolar ± 2 (± 4 max) ± 2 (± 4 max) ppm of FSR/ °C Bipolar ± 10 (max) ± 3 (± 10 max) ppm of FSR/ °C Linearity ± 2 (± 3 max) ± 0.3 (± 2 max) ppm of FSR/ °C Guaranteed No Missing Code Temperature Range 0 to 70 (13 Bits) 0 to 70 (14 Bits) °C DIGITAL OUTPUT1 (All Codes Complementary) Parallel & Serial Output Codes7 Unipolar CSB CSB Bipolar COB, CTC

8 COB, CTC8

Output Drive 5 5 LSTTL Loads (typical at TA = +258C, VS = 615, +5 V unless otherwise noted)

ter, which is shifted out on the last negative-going clock edge. Figure 9. Clock High to Serial Out Valid flag resets after the Bit 10 decision (timing diagram of Figure 7). signal as shown in Table II. See Figure 10 for circuit details.

0 V to +5 V CSB 22 Pin 27 25

0 V to +10 V CSB 22 Open 25

0 V to +20 V CSB 22 Input 24

Pin 27 is extremely sensitive to noise and should be guarded by Analog Common. Figure 10. Input Scaling Circuit

0 V to + 10 V Range

plementary offset binary) code should be 01111111111111. Figure 11. Analog and Power Connections for Unipolar

0 V to +10 V Input Range

*Voltages given are the nominal value for Transition to the code specified. Note: For LSB value for range and resolution used, see Table IV. ***COB = Complementary Offset Binary. ***CSB = Complementary Straight Binary.