1154_1.PDF
Document overview
- Manufacturer or author: Joyce Arivella
- PDF pages: 6
Technical content
P| ANALOG Low Cost, 16-Bit Accurate DEVICES -and-Hold Amplifi . Sample-and-Hold Amplifier FEATURES FUNCTIONAL BLOCK DIAGRAM Low Nonlinearity: +7.6 ppm max (1/2 LSB @ 16-Bit Accuracy) AGND/ OFFSET Fast Acquisition Time to +0.00076%: 3.5 ns DACOMP ADJ Low Droop Rate: 0.02 »V/ps O—-O-® Aperture Jitter: 150 ps +10 V Input Range Hold Mode Feedthrough Rejection of —106 dB input ‘SWITCHING ourur Hermetic 14-Pin Ceramic DIP 2 => > © Gain of +1 V/V ev @ Low Cost cnn (8) APPLICATIONS sv® Medical and Analytical Instrumentation Pano (@) cncut - Automatic Test Equipment Pp / Data Acquisition for Signal Processing (1) Simultaneous Sample-and-Hold SHA Peak Measurement Detection CONTROL Event Analysis GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The AD1154 is a high accuracy, low cost sample-and-hold 1. Fast acquisition and low jitter make it the right choice for amplifier (SHA) designed to be used in high resolution data high speed, high accuracy data acquisition. acquisition systems. It is complete with internal hold capacitor 2. Is Jow droop rate (0.02 V/s) allows it to be used in slower — _ and proprietary capacitor trimmed compensation circuitry. Tes systems without noticeable performance degradation. accuracy (0.00076% of full scale range) and dynamic perfor- _ en . mance allow it to be used with high speed 16-bit A/D convert- 3. The AD1154 is ideal for systems requiring wide dynamic ers. The AD1154’s low price enables users to upgrade the front range. end performance of 14-bit systems without increasing system 4. Low price reduces overall system cost. cost. Its gain accuracy and droop rate in “hold” mode also allow . q . accurate conversion by slower 16-bit A/D converters having con Umity gain buffer architecture allows ease of use, version times of up to 7.6 ms. The AD1154 is a hybrid noninverting sample-and-hold amplifier (SHA) with a gain of +1 V/V. It can be utilized in most invert- __. __ ing SHA applications by inverting the digital data. The AD1154 is packaged in a compact hermetic 14-pin ceramic DIP. Typical applications for the AD1154 include data acquisition systems, strobed measurement systems, peak hold circuits and simultaneous sample-and-hold functions. The AD1154 is avail- able in two grades, both operating over the —25°C to +85°C temperature range. The “A” grade is specified for 15-bit accu- rate systems, while the “B” grade offers superior performance for true 16-bit applications. - REV.B Information furnished by Analog Devices is believed tobe accurate and ere ey ante ct pnice One Technology Wey, .0 Box 8108, Norwood, MA 02082 9106, US.A which may result from its use. No license is granted by implication or ‘Tel: 617/329-4700 Fax: 617/326-8703 ‘Twx: 710/394-6577 otherwise under any patent or patent rights of Analog Devices. Telex: 924491 Cable: ANALOG NORWOODMASS
ADI 1 54 — SPECIFI CATIONS (typical @ 25°C and nominal power supply of +15 V unless otherwise noted) Model [apus4aD | ADIISABD | Units OUTLINE DIMENSIONS ANALOG INPUT Dimensions are shown in inches and (mm). Voltage Range £10 min v Overvoltage (No Damage) +Vs v ~ Input Impedance 10 a 14-Pin Bottom Brazed Ceramic DIP Input Capacitance 10 pF DIGITAL INPUT (TTL COMPATIBLE) Sample Mode Logic “1” 2.0 min v Hold Mode Logic “0” 0.8 max v Logic “1” Current 1 pA Logic “0” Current 3 HA ANALOG OUTPUT Pa Voltage (Rroap=2 k) +10 min v Nore 1 Tare Ga) Short Circuit Current 20 mA osm seein HS Impedance 0.1 Q@ikHz GB DC ACCURACY/STABILITY as AN Gain +1 * VN “iN a ae “un Gain Error 0.003 (+0.01 max) | * % ; Gain Temperature Coefficient +0.1 (+1 max) * ppmC ban meee PT Seana Nonlinearity 0n23 (0. 0.070 (1.78) PLANE Sample Mode" 0.0015 * % Seeeos ona Hold Mode +0.0015 max 0.00076 max | % asioas5 Per mV of Offset Adjust (Hold Mode) +03 * ppm/mV fr aaearrzse | ~ Offset Error (Sample Mode) Initial Error (Adjustable to Zero) +3 (+20 max) * mV Error @ Trains Tra? +0.6 * mV 2015 0.30) Tempco per mV of Offset Adjust +0.5 * nVPCimV 008 0.20) SAMPLE MODE DYNAMICS =| See ‘Small Signal Bandwidth (3 dB) MHz nores Full Power Bandwidth kHz 1. INDEX AREA; A NOTCH OR A LEAD ONE Slew Rate Vius IDENTIICATION MARK IS LOCATED ADJACENT TO Noise (de to 1 MHz) LV mms LEAD ONE. SAMPLE-TO-HOLD SWITCHING ~ Aperture Delay 80 ns Aperture Uncertainty (Jitter) 150 ps PIN DESIGNATIONS Offset Step (Pedestal) +8 mV Swnching Transient [re [oesomrnon [om |oescwrron | Amplitude 275 mV 1_| SHACONTROL ‘SHA OUTPUT Settling to +0.003% 0.4 us 2 | NOCONNECTION OFFSET ADJUST Settling to +0.00076% 1 as 3 | "0 consecon NO CONNECTION i i i 4 DIGITAL GROUND +15 Dielectric Absorption Error (Uncompensated) | 0.003 % + | oa TS oa HOLD MODE DYNAMICS 6 | ANALOG GROUND | 13 | SHA WPUT Droop Rate 0.2 (0.7 max) 0.1 (0.35 max) | »V/ps 7_| OFFSET ADJUST -15V Droop Rate @ Tmax 3 25 nVius ~ Feedthrough Rejection (20 V p-p @ 10 kHz) | 106 (-96 max) * 4B HOLD-TO-TRACK SWITCHING Acquisition Time to +0.00076% of 20 V? 5 (8 max) 3.5(S max) | ps POWER REQUIREMENTS Nominal Voltage for Rated Performance (Vs) | +15 (3%) v Power Supply Rejection 20 uviv Supply Current +Vs 10 mA -Vs 10 mA Power Dissipation 300 mW TEMPERATURE RANGE Rated Performance =25 10 +85 c Storage 40 to +125 *c PACKAGE [erinbi Te NOTE ‘The AD1154 was designed specifically for 16-bit accurate sample/hold applications (tailored for hold mode performance), but it may be used as a track-and-hold amplifier with 15-bit accurate tracking performance. Error at +25°C adjusted to zero. "Tested with 5 kM load. *Specification same as AD1154AD. Specifications subject to change without notice. -2- REV.B
Figure 3. Hold-to-Sample Acquisition Time Figure 4. Sample-to-Hold Settling Time