AD1147

AD1147_15 AD | Alldatasheet

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Differential::t0.000760/0max Integral::t0.000760/0max DifferentialTC: :t1ppmrc max FastSettling FullScale:20 to :t0.00076% LSB: 3 to :t0.00076% LoW Power: 375mW IncludingReference FunctionallyComplete InternalReference,Output Voltage Amplifier, InputLatches and 8-BitLatched Input DACs forOffsetand Gain Correction. FullFour Quadrant Multiplying Low Cost APPUCA TlONS Automatic Test Equipment ScientificInstrumentation Beam Positioners Robotics Graphics Displays GENERAL DESCRIPTION The AD1l47 and AD1l48 are16-bitresolution,hybrid,latched input,digital-to-analogconverters.TheirtWO 8-bitlatchedinput DACs allowdirectoffsetand gaincorrectionviamicroprocessor interface. The AD 1147and ADl148 areconstructedashybridsina compact 32-pin,triplewidedual~in-linepackage.PrecisionCMOS switches andalaser-trimmedthin-fllmresistor-networkareusedtoprovide 16-bitaccuracyand excellenttemperaturestability. The Main (l6-bit)DAC isloadedasa 16-bitword. The offset and gaincorrectionDACs areeachloadedas8-bitwords.The AD1l47 multiplexesbothcorrectionDACs' inputswiththe Main DAC's eightLSBs. This pinsharingallowsforadditional pinconnectionsproviding:exteri1alreferenceinput,a current outputand feedbackresistorsforvoltageoutputrangesof0 to + SV,0 to+ lOV,:tSV and :tlOV. - The ADl148 correctionDACs' inputsareseparatefrom the Main DAC's. The gaincorrectionDAC's inputsaremultiplexed withtheoffsetDAC's 8-bitinputs.This allowsfora separate8- bitbus interfacewiththecorrectionDACs -common inappli- cationssucha&AutomaticTestEquipment. MicroprocessorCompatible 16-BitOJA Converters AD1147/AD1148I AD1l47/ADll48 FUNCTIONAL BLOCK DIAGRAMS 10kU 10kU SkU 891 8181 CMS8 C88 R';:""--'" REF OUT IN WiilM MS8 88 +v PGND -v. SkU AD1148 WRiM MS8 816CMS8 C88 OBSOLETE

~t'tt;It-It;AIIUN~ (typical@ +25OC and nItedSUP. IllIessotherwisespecified) NOTES .Specific:atioaaI8IDCU A Dll4 7...AD 1148doesDOtprovidepinCOIIIIeCIiomto=t output,rdcreaa:input,rdcreaa:outputorthe intcmalfccdbockraiston.o..tputYoilaFnoaaeisfindIt~ 10V. 'FSRIDeIIIIFull-Scale1lIn8e. 'RatedperfCJr2lllDCeisapecifiodwith+ 10V rdcreaa:. Specifications1Ubja:ttoc:baDaewithoutDOtia:. 2-138 DIGITAL.TO.ANALOG CONVERTERS OurLlNE DIMENSIONS Dimensions shown ininches and (mm). 0.02510.61 MAX 0.01010.25) x 0.02010.51) RECTANGULAR 0.15 (3.8) L '-.1-\\.= ../ ~TTOM VIEW 0.1513.8) 0.H2.5IGRID "PIN 1 LOCATION IS IDENTIFIED BY A WHITE DOT ON THE TOP SURFACE. AD1l47 PIN DESIGNATIONS AD1l48 PIN DESIGNATIONS MODEL AD1l47 ADll48 RESOLUTION 16Bits . ACCURACY DifferentialNonlinearity :t0.00076%FSR 1(mu) :t0.00076% FSR1 (typ), :to.OO15%FSR1(mu) IntegralNonlinearity :t0.00076%FSR 1(mu) :t0.00076%FSR 1(typ), :to.OOI5%FSR1(mu) MoDOtonic(l6Bits) Guaranteed . Offset AdjustabletoZero . Gain AdjustabletoFullScale . STABILITY DifferentialNonlinearity :tIppml"C(mu) . Offset :t20jl.Vrc(mu) .. BipolarOffset :t6ppmf'C(mu) . Gain(IncludesInt.Ref.) :t10ppmf'C (mu) . STABILITY, Long-Term (ppml I000 hr.) DifferentialNonlinearity :tlppm . Offset :t3ppm .. BipolarOffset :t3ppm . Gain :t12ppm . REFERENCE VOLTAGE OutputVoltage + 10.OOV,:to.3%(mu) .. Output Current 2mA (mu) ** En. Ref V oltage .-12V to + 12V .* Input Resistance 12k!} ** DYNAMIC PERFORMANCE SettlingTime to :t0.00076% Voltage,Full-ScaleStep 20ILS * Voltage,LSB Step 3j.LS * Current 2j.LS DIGITAL INPUT CODES 5 VoltCMOSrrTL Compatible MainDAC Unipolar Binary (BIN) Bipolar OffsetBinary (OBN) * CorrectionDACs Binary (BIN) * ANALOG OUTPUT Voltage +5V,+IOV,:t5V,:tIOV :tIOV Current -2mA,:tlmA VoltageCompliance :t500mV Noise (lOOkHz BW) 6OfLVrms * POWER REQUIREMENTS Voltage (Rated Performance) :t15V (:t5%) * Voltage (Operating) :t12.5Vto:t 17V * Supply Current Drain :t15mA (mu) * TotalPower@Vs= :t15V 375mWtyp,500mWmu * POWER SUPPLY SENSITIVITY Offset :tIOppmN * Gain :tIOppmN * OFFSET ADJUSTMENT Range :to.05%FSR * Resolution(@:t 10V) 1/4LSB * GAIN ADJUSTMENT Range (UnipolarlBipolar) :to.2% FSR1/:t0.I%FSRI NA/* Resolution(U nipolarlBipolar) ILSB/I/2LSB NA/* TEMPERATURE RANGE Rated Performance -25"Cto +85"C * Storue T emoeratUre -4O"Cto + lOO"C * SIZE 2.00"x 1.17"x 0.225"(allmaximums) I.- 16 17 ISO. MA I 1. 32 T PIN FUNCTION PIN FUNCTION 1 +Vs 32 Vo

2 PGND 31 10k

4 AMP IN 29 10k

6 MGND 27 REF OUT

7 WR/M 26 MGND

8 WR/C 25 O/G

9 MSB 24 B16/CB8

10 B2 23 B15/CB7

11 B3 22 B14/CB6

12 B4 21 B13/CB5

13 B5 20 B121CB4

14 B6 19 811/CB3

15 B7 18 B10/CB2

16 B8 17 B9/CMSB

2 PGND 31 MGND

4 MSB 29 WR/C

5 B2 28 O/G

6 B3 27 CB8

7 B4 26 CB7

8 B5 25 CB6

9 B6 24 CBS

10 B7 23 CB4

11 B8 22 CB3

12 B9 21 CB2

13 B10 20 CMSB

mll48 isintemallyconnectedfor :t10 voltsoutput 01147 ispin programmable toprovidea varietyofanalog I,eithercurrentor voltage.A unipolaroutputcurrentof !mA isavailableatpin 5,and can be offsetby lmA (by inspin28 topin 29)fora bipolaroutputof :tlmA. voltageranges(+ SV, + lOV, :tSV and :tlOV) are atpin 32 by connectingthecurrentoutput(pin5)to :fierinput(pin4)and theappropriateinternalfeedback 0 theamplifieroutput(pin32)asshown inFigure1. It Sk 10k

0 TO +10V

:!:10V slog Output Range Pin Programming. s forthe models AD1147 and AD1148 Ie timing diagrams forthe MAIN l6-bit cUon DACs are shown in Figure 2. )C1'8teas follows: r themain DAC. The latchesare :lineislow,and latchedwhen the thecorrectionDACs. Operationis et correctionDAC and thegain 1 on thispin selectstheoffsetDAC. MC. SYMBOL PARAMETER MainDAC tDS tDH tWR DataSetupTime DataHold Time WritePulseWidth 1400 1200: 2SOns CorrectionDACs res 0/6 To WriteSetupTime tal OiG To WriteHold Time tDS DataValidTo Write SetupTime DataValidTo WriteHold WritePulseWidth 200ns. 2Onsm l1Onsn Onsmin lOOnsmi tDH tWR Table I.Timing Requirements I-t_-I'\\ I ~ too=:.j""1- )t~:DATA VAUD L : iNRiTEJMAIN IWRlMI DATA IN IMSB-B16J MAIN DAC WRITE CYCLE TIMING DIAGRAM I--tcs---t-tcH.J Voo OFFSET/Gi'iiNJO/GI\\ I r 0 r-t- 1 \\: '- 1 1 T...I--. )t~: D~N x=:oo Voo WRITE/CORRECT CWRlCI DATA IN fCMSB-CBaI CORRECTION DAC. WRITE CYCLE TIMING DIAGRAM NOTES: 1. ALL INPUT SIGNAL RISE AND FALL TIMES MEASURED FROM 10% to 90% 01Voo' Voo= +SV. ..= 2_. 2. TIMING MEASUREMENT REFERENCE lEVEL ISV"+2VL Figure2. AD1147 and AD 1148 Timing Diagrams OFFSET AND GAIN CALIBRATION Initialoffsetand gainerrorscan be adjustedtozerousingthe two internal8-bitcalibrationDAC's. There arethreecontrol linesused inthecalibrationsequence:WRlM isthewriteline fortheMain (l6-bit)DAC - thelatchesaretransparentwhen thewritelineislow,and latchedwhen thewritelinegoeshigh; WRlC isthewritelineforthecorrectionDACs and operatesthe same asWRlM; 0/6 selectsbetweentheoffsetcorrectionDAC and the gain correctionDAC -:a high levelon thispin selects theoffsetDAC and a low levelselects'thegainDAC. Offsetand Gain calibrationsareperformedasfollows: 1. With WRlM low,setthe.digitalinputsoftheMain DAC to "000 00" (inunipolarmode) or "100 00" (inbipolar mode). 2. SetWRlM hightolatchthedigitalinputintotheMain DAC. 3. With WRlC Iowan" ("\\1".. t),--- OBSOLETE

VUilage Will V 0) 18 as ClOse:LO U.VV\\MN \\'O!l:'d:'pu:':'Hm:. Note thatincrementingthedigitalinputproducesa more negativevoltageoutput. 4. SetWRiC hightolatchthedigitalinputintotheoffsetcorrection DAC. 5. With WRIM low,setthedigitalinputoftheMain DAC to "111 11". 6. SetWRIM hightolatchthedigitalinputintotheMain DAC. 7. With WRIC low and OIG low,adjustthedigitalinputsofthe gaincorrectionDAC untiltheMain DAC's outputvoltage (pinV 0)isasclose'aspossibletothepositivefull-scalevoltage shown below inTable ll.Note thatincrementingthedigital inputproducesa more negativevoltageoutput. 8. SetWRIC hightolatchthedigitalinputintothegaincorrection DAC. 9. Calibrationiscomplete.SetWRIM low and beginlresume normaldigital-ta-analogconversionviatheMain DAC. Output Voltage Range 0 to + 5 volts Oto + 10volts ~ 5 volts ~ 10volts PositiveFull-ScaleVoltage + 4.999924volts + 9.999847volts + 4.999847volts + 9.999695volts TableII.Gain'Calibration GROUNDING AND GUARDING The currentfrom themeasurementground pin (MGND) is constant,independentofdigitalinput,forcaseofmaking meas- urements.Thisisthehighqualityground fortheADl147 and AD1l48. Itshouldbe connectedtothehighqualityground in theapplication.Power ground (PGND) shouldbe connectedto measurementground (MGND) atthemeasurementpoint. The currentoutputpin (10)of theAD1147 issensitivetointer- ferencefrom thedigitalinputlines.Itshouldbe surroundedby a groundedguardatalltimes.When usingtheAD I147 inthe voltageoutputmode, both the"10" and "AMP IN" pinsshould be guarded(seeFigure3).. AD1147 AD1147 EXTERNAL AMPLIFIER I I <i> I <i> PIN 4IAMP IN I I I -IN ' . '.PIN SIlo I I. j <i> I .' .PIN6IMGND I I . I PIN4 , PI~.:5 PIN 6 WITH EXTERNAL OUTPUT AMPLIFIER WITH INTERNAL OUTPUT AMPLIRER Figure3. TypicalGuardingTechniques EXTERNAL AMPLIFIER FOR LOW DRIFT VOLTAGE OUTPUT OR 10GB OUTPUT CURRENT The internaloutputamplifieroftheAD1l47 isdesignedfor high-speedapplicationsthatrequirefastsettlingtimes.An external precisionoperationalamplifierliketheAD OP-O7C can be appliedwhen loweroffset(lessthan20J!.VI"C)isimportant(see Figure4).Simplyconnectthecurrentoutput(PinS)tothe invertinginputof theamplifierand connecttheproperfeedback resistorsasshown inFigureI.Be certaintokeep thecurrent 2-140 DIGITAL-TO-ANALOG CONVERTERS grounded guard.To avoiddegradingthegaindriftperformance oftheDAC, alwaysuse theinternalfeedbackresistors,since theyarematched totheinternalcurrentweightingresistorsof theDAC.lt isalsogood practicetoconnectthenegativeinput (Pin4,AMP IN) oftheunused internaloutputamplifiertoits output(Pin32,V 0)' The currentdriftoftheAD1l47 istypically35OpAf'Cfrom + ISOCto + 35OC.When usingtheAD OP-O7, thetotaloffset driftoftheoutputsignalwilltypicallybe lessthan2J!.V rc. As a secondexample,a highoutputcurrentamplifiercan be connectedtotheAD 1147tocreatea programmablepower supply. The configurationisthesame asshown fortheAD OP-O7C in Figure4. .v. -v.Wiiic olil 'Oldl .... Figure4. PrecisionDAC with:t:8.192VF.S.Output' Voltage - FULL FOUR-QUADRANT MULTIPLYING DAC The AD1l47 isa fullfour-quadrantmultiplyingDAC 1IDdcan be used withreferencesvaryingbetween + 12 and -12 volts. Typicallinearityvs.externalreferencevoltageisshown inFigure S. Output voltagerangesotherthan thoseprovidedcan be obtained by connectingtheappropriatereferencevoltageto"REF IN" (Pin28),(seeFigure4).The DAC outputvoltagecanbecalculated asfollows: UNIPOLAR V = DIGITAL INPUT x VREF X R 0 216 5k fb BIPO LAR V = DIGITAL INPUT VREF Rc VREF0 x-x --216 5k b IOk DIFFERENTIAL UNEARITY ERROR 1% OF RJLL.SCALE RANGEl 0._- 0._76% 0.00153% 0.00305% 0.0081% 0.0122% 0 2 6 10 124 8 POIiITIV£ 011 NECiATMi ftERRENCE VOLTAGE Figure5. TypicalDifferentialLinearityvs.ExternalRefer- ence Voltage - - "...,- -","" I OBSOLETE

G0c{ t: 1611)co 0Zc{ ~ 80 w c.> zwa:: w LL ~ 0 iij ~- 30LL ~Z:;) 0c.> :: 20 c{~ 6is 16(1) 32!2} IDEAL 12-BIT AID CONVERTER OUTPUT ~"~"ENC'D\\ TRANSmON EDGE 1 ADEAL CODE CENTER L INTEGRAL LINEARITY ERROR ACTUAL CODE WIDTH. IDEAL 1LSB ICODE WIDTH ~ DIFFERENTIAL LINEARITY ERROR 0 T 1.0 ,1.5 T2.00 0.5 VOLTAGE, IN lSBs (" 12-BITS Figure8. 12-BitADC LinearityTesting 2-142 DIGITAL-TO-ANALOG CONVERTERS 1>AC TESTING (refertoFigure9). To test12-bitDACs beginwithoffsetand gaincalibrationof theDAC under testperthemanufacturer'sinstructions.Setthe digitalinputsofthereferenceDAC and theD.U.T. tothe desiredcode.Latch thisdigitalinputintothereferencepAC. The DACs' outputsaredifferencedand amplifiedby an AD524A instrUmentationamplifier.The voltageerrorbetweentheDACs istheintegrallinearityerror. Now nullthemeter and thenincrementor decrementthe.digital inputtotheD.U.T. only,by one LSB. The meterreadingwill correspond.tothecodewidth ofthenew digitalinputword. The deviationofthisvoltagefrom theidealvalueofone LSB is thedifferentiallinearityerroroftheD.U .T . 7)WRIM 11-81TliPAND CONTROL AD1147 NUU DIGITAL OUT DIGITAL VOLTMETER 12-BITDAC (DEVICE UNDER TESTI ANALOG INPUT Figure9. DAC Testing OBSOLETE