ACT ABRACON | Alldatasheet
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Technical content
APPLICATIONS:
- Provide clock signals for microprocessors and digital circuits.
- TTL output for low EMI applications. S S T T A A N N D D A A R R D D S S P P E E C C I I F F I I C C A A T T I I O O N N S S AXT - Frequency - Temperature - Overall Frequency Stability - Duty Cycle - Tristate - Value Added - Packaging XX.XXXXXMHz -J for ± 20ppm max -R for ± 25ppm max -K for ± 30ppm max -H for ± 35ppm max -C for ± 50ppm max - A Tristate E/D -S for 45 /55% -T for 47.5 /52.5% -D for -10°C to + 60°C -E for -20°C to + 70°C -F for -30°C to + 70°C -N for -30°C to + 85°C -L for -40°C to + 85°C ORDERING OPTIONS PIN # PIN # FUNCTIONACT AHT 1 1 NC or Tristate E/D 7 4 GND / Case 8 5 Output 14 8 Vdd Package Type ACT (14 DIP) and AHT (8 DIP) Frequency Range (Fo) 500kHz - 70MHz Operating Temperature (TOPR) 0°C to +70°C (See Options) Storage Temperature (TSTO) -55°C to +125°C Frequency Stability (DF/ Fo) ±100ppm max. (See Options) Supply Voltage (Vdd) 5Vdc ±10% Input Current (Idd) 30mA max. Fo <_ 25MHz (Without Load) 70mA max. Fo ~ 25.01MHz - 70MHz Duty Cycle or Symmetry 45/ 55% max. for F <_ 8.0MHz (at 1.4 Vdc) 40/ 60% max. for F > 8.0MHz (See Options) Rise and Fall 10ns max. for F <_ 30MHz Times (TR / TF) 6ns max. for F> 30MHz (See Options) Output Load 10TTL max. Output Voltage (VOH) 2.4Vdc min. (VOL) 0.4Vdc max. Start-up Time (TOSC) 10ms max. Tristate Function (VIH) (Option “-A” ONLY) (VIL) Output Disable / Enable Time 100ns max. (for Option “- A” ONLY) “1” or Open: Oscillation >_ 2.2V “0”:Output disabled in high impedance (HiZ) < 0.8V PARAMETERS SPECIFICATIONS Dimensions: Inches (mm) ACT (14DIP) AH T (8 DIP) FEATURES:
- Hermetically sealed metal package. • TTL output.
- Case ground for EMI protection. • Tristate Enable /Disable options. -G Gull Wing* -G2 Gull Wing (AHT) -GHT Gull Wing reflow capable* -QXX (Trimmed Leads)* C or H -T Tape and reel -TY tray packing 5Vdc •TTL OUTPUT • FULL-SIZE AND HALF-SIZE DIP CRYSTAL CLOCK OSCILLATORS ACT and AHT 20.2 x 12.6 x 5.08 mm * Pin 1 has internal pull-up resistor which allows Pin 1 to be left floating (enable high) Option A Test circuit, waveforms, see appendix B. Recommended handling, see appendix F. Environmental and mechanical specifications, see appendix C. Group 1. Marking, see appendix G. Value added, see appendix D. Application notes, see appendix A. Reflow profile, see appendix E. Packaging, see appendix H.
29 Journey • Aliso Viejo, CA 92656 • USA
(949) 448-7070 • FAX: (949) 448-8484 E-MAIL: abinfo@ abracon.com • INTERNET ADDRESS: www.abracon.com ABRACON IS ISO 9001 / QS 9000 CERTIFIED NOTE: Left blank if standard • All specifications and markings subject to change without notice ABRACON C O R P O R A T I O N 55