ACSL-7210

ACSL-7210 BOARDCOM | Alldatasheet

Document overview

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• PDF pages: 10

Technical content

Features

 Dual-channel (opposite direction orientation)  High-speed: DC to 25 MBd  3.3V and 5V CMOS compatibility  CMOS input and output  25 kV/µs minimum common mode rejection (CMR) at VCM = 1000V  Guaranteed AC and DC performance over wide temperature: –40°C to +105°C  Safety and regulatory approvals: – UL 1577 – 3750 V rms for 1 minute – IEC/EN/DIN EN 60747-5-5 for reinforced insulation –

567 VPEAK

Applications

 Digital field bus isolation: PROFIBUS, CC-Link, DeviceNet, SDS  Multiplexed data transmission  General instrument and data acquisition  Computer peripheral interface  Microprocessor system interface CAUTION! Take normal static precautions in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. The components featured in this data sheet are not to be used in military or aerospace applications or environments. ACSL-7210 Dual-Channel (Bidirectional) 25-MBd CMOS Buffered Input Digital Optocoupler

ACSL-7210 Data Sheet Dual-Channel (Bidirectional) 25-MBd CMOS Buffered I nput Digital Optocoupler Functional Diagram NOTE: A 0.1-μF bypass capacitor must be connected as close as possible between the power supply pins, VDD1 and GND1, VDD2 and GND2. Truth Table (Positive Logic) ACSL-7210 VO A VDD2 GND 2 VOB Shield

1 VDD 1

7 VI A

Ordering Information

To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACSL-7210-50RE to order RoHS-compliant Surface Mount 8-pin package in Tape-and-Reel packaging. Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information. Part Number Option Package Surface Mount Tape and Reel IEC/EN/DIN EN 60747-5-5 QuantityRoHS Compliant ACSL-7210 -00RE SO-8 X 100 per tube -06RE X X 100 per tube -50RE X X 1500 per reel -56RE X X X 1500 per reel

ACSL-7210 Data Sheet Dual-Channel (Bidirectional) 25-MBd CMOS Buffered I nput Digital Optocoupler Package Outline Drawings Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-halide flux should be used. Regulatory Information The ACSL-7210 will be approved by the following organizations. UL Approval under UL 1577, component recognition program up to VISO = 3750 VRMS. CSA Approval under CSA Component Acceptance Notice #5. IEC/EN/DIN EN 60747-5-5 Option 06RE only 87 65 4321 0.228 (5.80) 0.244 (6.20) 0.189 (4.80) 0.197 (5.00) 0.150 (3.80) 0.157 (4.00) 0.013 (0.33) 0.020 (0.51) 0.040 (1.016) 0.060 (1.524) 0.004 (0.10) 0.010 (0.25) 0.054 (1.37) 0.069 (1.75) x 45q DIMENSIONS: INCHES (MILLIMETERS) MIN MAX 0.286 (7.27) 0.085 (2.16) 0.025 (0.64 ) LAND PATTERN RECOMMENDATION 0.010 (0.25) 0.010 (0.25) 8 q 0.016 (0.40) 0.050 (1.27) YYWW NNNN DEVICE PART NUMBER A EEE LOT ID LEAD FREE AVAGO DATE CODE V FOR OPTION x6xE

ACSL-7210 Data Sheet Dual-Channel (Bidirectional) 25-MBd CMOS Buffered I nput Digital Optocoupler Insulation and Safety Related Specifications IEC/EN/DIN EN 60747-5-5 Insulation Characteristics (Option 06RE) NOTE: This optocoupler is suitable for safe electrical isolation only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits. Parameter Symbol ACSL-7210 Units Conditions Minimum External Air Gap (Clearance) L(101) 4.3 mm Measured from input t erminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(102) 4.3 mm Measured from input t erminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. Tracking Resistance (Comparative Tracking Index) CTI 175 V DIN IEC 112/VDE 0303 Part 1 Isolation Group IIIa Material Gro up (DIN VDE 0110, 1/89, Table 1) Description Symbol Characteristic UnitsACSL-7210 Installation classification per DIN VDE 0110/39, Table 1 for rated mains voltage ≤ 150 Vrms I – IV for rated mains voltage ≤ 300 Vrms I – IV for rated mains voltage ≤ 600 Vrms I-III Climatic Classification 40/105/21 Pollution Degree (DIN VDE 0110/39) 2 Maximum Working Insulation Voltage V IORM 567 V peak Input to Output Test Voltage, Method ba VIORM × 1.875=VPR, 100% Production Test with tm=1s, Partial discharge < 5 pC a. Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN/DIN EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. VPR 1063 V peak Input to Output Test Voltage, Method aa VIORM × 1.6=VPR, Type and Sample Test, tm=10s, Partial discharge < 5 pC VPR 907 V peak Highest Allowable Overvoltage (Transient Overvoltage tini = 60s) V IOTM 6000 V peak Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature T S 175 °C Input Current I S, INPUT 75 mA Output Power P S, OUTPUT 600 mW Insulation Resistance at TS, VIO = 500 V R S 109 Ω

ACSL-7210 Data Sheet Dual-Channel (Bidirectional) 25-MBd CMOS Buffered I nput Digital Optocoupler Absolute Maximum Ratings Recommended Operating Conditions Electrical Specifications (DC) Over recommended temperature (TA = –40°C to 105°C) and supply voltage (4.5V ≤ VDD1 ≤ 5.5V, 4.5V ≤ VDD2 ≤ 5.5V), All typical specifications are at VDD1 = VDD2 = +3.3V, TA = 25°C, unless otherwise specified. Parameter Symbol Min. Max. Units Storage Temperature T S –55 125 °C Operating Temperature T A –40 105 °C Supply Voltage V DD1, VDD2 06 . 5V Input Voltage V IA, VIB –0.5 V DD + 0.5 V Output Voltage V OA, VOB –0.5 V DD + 0.5 V Average Output Current I O —1 0 m A Input Power Dissipationa a. Per channel. PI —7 2 m W Output Power Dissipationa PO —6 2 m W Lead Solder Temperature T LS 260°C for 10s, 1.6 mm below seating plane Parameter Symbol Min. Max. Units Operating Temperature T A -40 105 °C Supply Voltage (3.3V) V DD1, VDD2 3.0 3.6 V Supply Voltage (5V) V DD1, VDD2 4.5 5.5 V Logic High Input Voltage V IH 0.7 × VDD VDD V Logic Low Input Voltage V IL 0 0.3 × VDD V Input Signal Rise and Fall Times t r, tf —1 m s Parameter Symbol Min. Typ. Max. Units Test Conditions Logic Low Supply Currenta a. LED is ON when VI is low and OFF when VI is high. IDD1L, IDD2L —9 1 5 m A V I = 0V, Figure 1 Logic High Supply Currenta IDD1H, IDD2H —1 . 9 5 m A V I = VDD, Figure 2 Input Current I IA, IIB –10 — 10 µA Logic High Output Voltage V OH VDD – 0.1 3.3 — V I O = –20 μA, VI = VIH VDD – 1.0 3.1 — V I O = –4 mA, VI = VIH Logic Low Output Voltage V OL —0 0 . 1 V I O = 20 μA, VI = VIL —0 . 1 4 1 . 0 V I O = 4 mA, VI = VIL

ACSL-7210 Data Sheet Dual-Channel (Bidirectional) 25-MBd CMOS Buffered I nput Digital Optocoupler For the SPI interface, the ACSL-7210 is used for serial data in/out isolation (two channels bidirectional). The third channel – clock signal isolation is provided by ACPL-077L, 25-MBd CMOS digital optocoupler. Figure 9 shows the SPI isolated communication between master and slave devices using ACSL-7210 and ACPL-077L. Figure 9: Isolated SPI between Master and Slave Devices using ACSL-7210 and ACPL-077L ACPL-077L VDD1 VDD1 VDD2 NCV1 NC VO GND1 GND2 VDD2 100 nF 100 nF ACSL-7210 VDD1 VDD1 VDD2 VIAVOA VIB VOB GND1 GND2 VDD2 100 nF 100 nF To master device To slave device To master device To slave device

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