ACS253MS INTERSIL | Alldatasheet

Document overview

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Technical content

Features

  • QML Qualified Per MIL-PRF-38535 Requirements
  • 1.25Micron Radiation Hardened SOS CMOS
  • Radiation Environment - Latch-up Free Under any Conditions

5 RAD(Si)

  • Propagation Delay

Applications

  • Digital Channel Selection
  • Data Routing
  • High Frequency Switching

Description

The Radiation Hardened ACS253MS is a Dual 4-Channel Mul- tiplexer having two common binary control inputs for selecting 1 of 4 data channels. All inputs and outputs are buffered and are designed for balanced propagation delay and transition times. Separate Output Enable inputs are provided to ease system design. When OE1 or OE2 are set HIGH, the corresponding output is configured into a high impedance state. The ACS253MS is fabricated on a CMOS Silicon on Sapphire (SOS) process, which provides an immunity to Single Event Latch-up and the capability of highly reliable performance in any radiation environment. These devices offer significant power reduction and faster performance when compared to ALSTTL types. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the ACS253 are contained in SMD 5962-98007. A “hot-link” is provided on our homepage with instructions for downloading. http://www.intersil.com/data/sm/index.htm

Ordering Information

SMD PART NUMBER INTERSIL PART NUMBER TEMP. RANGE ( oC) PACKAGE CASE OUTLINE 5962F9800701VEC ACS253DMSR-02 -55 to 125 16 Ld SBDIP CDIP2-T16 N/A ACS253D/Sample-02 25 16 Ld SBDIP CDIP2-T16 5962F9800701VXC ACS253KMSR-02 -55 to 125 16 Ld Flatpack CDFP4-F16 N/A ACS253K/Sample-02 25 16 Ld Flatpack CDFP4-F16 N/A ACS253HMSR-02 25 Die N/A Pinouts ACS253 (SBDIP) TOP VIEW ACS253 (FLATPACK) TOP VIEW 1OE 1I3 1I2 1I1 1I0 GND VCC 2I3 2I2 2I1 2I0 2OE 1OE 1I3 1I2 1I1 1I0 GND 11 6 VCC 2OE S 2I3 2I2 2I1 2I0 File Number 4428CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

DIE DIMENSIONS: Size: 2390µm x 2390µm (94 mils x 94 mils) Thickness: 525µm ±25µm (20.6 mils±1 mil) Bond Pad: 110µm x 110µm (4.3 mils x 4.3 mils) METALLIZATION: Type: Al Metal 1 Thickness: 0.7µm ±0.1µm Metal 2 Thickness: 1.0µm ±0.1µm SUBSTRATE Silicon on Sapphire (SOS) SUBSTRATE POTENTIAL: Unbiased Insulator BACKSIDE FINISH: Sapphire PASSIVATION: Type: Phosphorous Silicon Glass (PSG) Thickness: 1.30µm ±0.15µm SPECIAL INSTRUCTIONS: Bond VCC First ADDITIONAL INFORMATION: Worst Case Density: <2.0 x 105 A/cm2 Transistor Count: 140 Metallization Mask Layout ACS253MS S1 10E V CC 20E 1I3 1I2 1I1 1T 0 S 0 2I3 2I2 2I1 1Y GND 2Y 2I 0 ACS253MS All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com