ACS245MS RENESAS | Alldatasheet

Document overview

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Technical content

Features

  • Devices QML Qualified in Accordance with MIL-PRF- 38535
  • Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96707 and Intersil’ QM Plan
  • 1.25 Micron Radiation Hardened SOS CMOS
  • Total Dose >300K RAD (Si)
  • Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/ Bit/Day (Typ)
  • SEU LET Threshold>100 MEV-cm2/mg
  • Dose Rate Upset>1011 RAD (Si)/s, 20ns Pulse
  • Dose Rate Survivability>1012 RAD (Si)/s, 20ns Pulse
  • Latch-Up Free Under Any Conditions
  • Military Temperature Range-55oC to +125oC
  • Significant Power Reduction Compared to ALSTTL Logic
  • DC Operating Voltage Range 4.5V to 5.5V
  • Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min
  • Input Current  1A at VOL, VOH
  • Fast Propagation Delay15ns (Max), 10ns (Typ)

Description

The Intersil ACS245MS is a Radiation Hardened octal non- inverting bidirectional bus transceiver intended for two-way asynchronous communication between data busses. The ACS245MS utilizes adv anced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The ACS245MS is supplied in a 20 lead Ceramic Flatpack (K suffix) or a Dual-In-Line Ceramic Package (D suffix). Pinouts

20 PIN CERAMIC DUAL-IN-LINE, MIL-STD-1835 DESIGNATOR

CDIP2-T20, LEAD FINISH C TOP VIEW

20 PIN CERAMIC FLATPACK, MIL-STD-1835 DESIGNATOR

CDFP4-F20, LEAD FINISH C TOP VIEW 1DIR GND VCC OE DIR GND VCC OE 12 0

Ordering Information

PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE 5962F9670701VRC -55 oC to +125oC MIL-PRF-38535 Class V 20 Lead SBDIP 5962F9670701VXC -55 oC to +125oC MIL-PRF-38535 Class V 20 Lead Ceramic Flatpack ACS245D/Sample 25 oC Sample 20 Lead SBDIP ACS245K/Sample 25 oC Sample 20 Lead Ceramic Flatpack ACS245HMSR 25 oCD i e D i e

FN3198 Rev.1.00 Page 2 of 3 January 1996 Functional Diagram P N NOTE: (1 of 8) P N BA OE DIR TRUTH TABLE INPUTS OPERATIONOE DIR L L B Data to A Bus L H A Data to B Bus H X Isolation NOTE: H = High Voltage Level, L = Low Voltage Level, X = Immaterial

FN3198 Rev.1.00 Page 3 of 3 January 1996 ACS245MS Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com For additional products, see www.intersil.com/en/products.html © Copyright Intersil Americas LLC 1999. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. Die Characteristics DIE DIMENSIONS: 96 mils x 117 mils 2.44mm x 2.97mm METALLIZATION: Type: AlSi Metal 1 Thickness: 7.125k Å 1.125kÅ Metal 2 Thickness: 9kÅ 1kÅ GLASSIVATION: Type: SiO2 Thickness: 8kÅ 1kÅ WORST CASE CURRENT DENSITY: < 2.0 x 105A/cm2 BOND PAD SIZE: 110m x 110m 4.4 mils x 4.4 mils Metallization Mask Layout ACS245MS DIRA0 A1 (3) A2 (4) A3 (5) A4 (6) A5 (7) A6 (8) (10) (11) (12) (13) B5 (14) B4 (15) B3 (16) B2 (17) B1 (18) B0 OEVCC (9) (19)(20)(1)(2) A7 GND B7 B6 (10) GND VCC (20)