ACS14MS RENESAS | Alldatasheet

Document overview

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  • PDF pages: 2

Technical content

Features

  • QML Qualified Per MIL-PRF-38535 Requirements
  • 1.25 Micron Radiation Hardened SOS CMOS
  • Radiation Environment - Latch-Up Free Under any Conditions

Applications

  • High Speed Control Circuits
  • Sensor Monitoring
  • Low Power Designs

Ordering Information

ORDERING NUMBER INTERNAL MKT. NUMBER TEMP. RANGE (oC) PACKAGE DESIGNATOR 5962F9862301VCC ACS14DMSR-03 -55 to 125 14 Ld SBDIP CDIP2-T14 ACS14D/SAMPLE-03 ACS14D/SAMPLE-03 25 14 Ld SBDIP CDIP2-T14 5962F9862301VXC ACS14KMSR-03 -55 to 125 14 Ld Flatpack CDFP4-F14 ACS14K/SAMPLE-03 ACS14K/SAMPLE-03 25 14 Ld Flatpack CDFP4-F14 5962F9862301V9A ACS14HMSR-03 25 Die N/A Pinouts ACS14MS (SBDIP) TOP VIEW ACS14MS (FLATPACK) TOP VIEW GND VCC 1A1 GND VCC

FN4544 Rev.0.00 Page 2 of 2 November 1998 ACS14MS Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com For additional products, see www.intersil.com/en/products.html © Copyright Intersil Americas LLC 1999. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. Die Characteristics DIE DIMENSIONS: Size: 2390mx 2390m (94 mils x 94 mils) Thickness: 525m 25m (20.6 mils 1 mil) Bond Pad: 110m x 110m (4.3 x 4.3 mils) METALLIZATION: AL Metal 1 Thickness: 0.7m 0.1m Metal 2 Thickness: 1.0m 0.1m SUBSTRATE POTENTIAL: Unbiased Insulator PASSIVATION Type: Phosphorous Silicon Glass (PSG) Thickness: 1.30m 0.15m SPECIAL INSTRUCTIONS: Bond VCC First ADDITIONAL INFORMATION: Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: 130 Metallization Mask Layout ACS14MS Y1 A1 V CC A6 A2 (3) Y2 (4) NC A3 (5) (12) Y6 (11) A5 NC (10) Y5 (6) (7) (8) (9) A4Y4GNDY3 (2) (1) (14) (13)