ACS138MS INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 2

Technical content

Features

  • QML Qualified Per MIL-PRF-38535 Requirements
  • 1.25Micron Radiation Hardened SOS CMOS
  • Radiation Environment - Latch-up Free Under any Conditions

5 RAD(Si)

Applications

  • Memory Decoding
  • Data Routing
  • Code Conversion

Description

The Radiation Hardened ACS138MS is an Inverting 3-to-8 Line Decoder/Demultiplexer with three binary select inputs 0, A1 and A2). If the device is enabled, these inputs deter- mine which one of the eight normally high outputs will go low. Two active low and one active high enable inputs ( E1,E2 and E3) are provided to make cascaded decoder designs easier to implement. The ACS138MS is fabricated on a CMOS Silicon on Sap- phire (SOS) process, which provides an immunity to Single Event Latch-up and the capability of highly reliable perfor- mance in any radiation environment. These devices offer significant power reduction and faster performance when compared to ALSTTL types. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed below must be used when ordering. Detailed Electrical Specifications for the ACS138 are contained in SMD 5962-98534. A “hot-link” is provided on our homepage with instructions for downloading. http://www.intersil.com/data/sm/index.htm

Ordering Information

ACS138 (SBDIP) TOP VIEW ACS138 (FLATPACK) TOP VIEW SMD PART NUMBER INTERSIL PART NUMBER TEMP. RANGE ( oC) PACKAGE CASE OUTLINE 5962F9853401VEC ACS138DMSR-02 -55 to 125 16 Ld SBDIP CDIP2-T16 N/A ACS138D/Sample-02 25 16 Ld SBDIP CDIP2-T16 5962F9853401VXC ACS138KMSR-02 -55 to 125 16 Ld Flatpack CDFP4-F16 N/A ACS138K/Sample-02 25 16 Ld Flatpack CDFP4-F16 N/A ACS138HMSR-02 25 Die N/A A 0 A 1 A 2 GND VCC A 0 A 1 A 2 GND 11 6 VCC File Number 4461CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999

DIE DIMENSIONS: Size: 2390µm x 2390µm (94 mils x 94 mils) Thickness: 525µm ±25µm (20.6 mils±1 mil) Bond Pad: 110µm x 110µm (4.3 x 4.3 mils) METALLIZATION: Al Metal 1 Thickness: 0.7µm ±0.1µm Metal 2 Thickness: 1.0µm ±0.1µm SUBSTRATE POTENTIAL: Unbiased Insulator PASSIVATION Type: Phosphorous Silicon Glass (PSG) Thickness: 1.30µm ±0.15µm SPECIAL INSTRUCTIONS: Bond VCC First ADDITIONAL INFORMATION: Worst Case Density: <2.0 x 105 A/cm2 Transistor Count: 220 Metallization Mask Layout ACS138MS A 1 A 0 VCC Y0 A 2 Y7 GND Y6 Y5 ACS138MS All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com