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Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
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Technical content

Features

 Wide supply voltage Vcc: 2.7V to 24V  Low drive current: 3 mA  Open-collector output  TTL compatible  Compact SO-5, SO-8, stretched SO-6, and stretched SO-8 package  15 kV/μs high common-mode rejection at VCM = 1500 V  Guaranteed performance from temperature range: –40°C to +105°C  Low propagation delay: 1 μs max at 5V  Worldwide safety approval: — UL1577 recognized, 3750 Vrms/1 min for ACPL-M50L/054L, 5000 Vrms/1 min for ACPL-W50L/K54 — CSA Approval — IEC/EN/DIN EN 60747-5-5 Approval for Reinforced Insulation

Applications

 Communications interface  Digital signal isolation  Micro-controller interface  Feedback elements in switching power supplies  Digital isolation for A/D, D/A conversion digital field ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Low Power, 1 MBd Digital Optocoupler Data Sheet

  • 2 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Figure 1 Functional Diagram NOTE The connection of a 0.1-μF bypass capacitor between pins 4 and 6 for ACPL-M50L/W50L and between pins 5 and 8 for ACPL-054L/K54L is recommended. Table 1 Truth Table LED VO ON LOW OFF HIGH 4 5 ACPL-054L/K54L ACPL-M50L ACPL-W50L VO Anode Cathode GND VCC VO GND VCC NC Cathode Anode VO1 GND VO2 VCC Cathode1 Anode2 Cathode2 Anode1
  • 3 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet

Ordering Information

ACPL-M50L and ACPL-054L are UL Recognized with 3750 Vrms for 1 minute per UL1577. ACPL-W50L and ACPL-K54L are UL Recognized with 5000 Vrms for 1 minute per UL1577. To order, choose a part number from the part number column and combine with the desired option from the option column to form an order entry. Example 1: ACPL-M50L-500E to order product of Mini-flat Surface Mount 5-pin package in Tape and Reel packaging with RoHS compliant. Option data sheets are available. Contact your Broadcom sales representative or authorized distributor for information. Table 2 Ordering Information Part Number Option Package Surface Mount Tape and Reel IEC/EN 60747-5-5 QuantityRoHS Compliant ACPL-M50L -000E SO-5 X 100 per tube -060E X X 100 per tube -500E X X 1500 per reel -560E X X X 1500 per reel ACPL-054L -000E SO-8 X 100 per tube -060E X X 100 per tube -500E X X 1500 per reel -560E X X X 1500 per reel ACPL-W50L -000E Stretched SO-6 X 100 per tube -060E X X 100 per tube -500E X X 1000 per reel -560E X X X 1000 per reel ACPL-K54L -000E Stretched SO-8 X 80 per tube -060E X X 80 per tube -500E X X 1000 per reel -560E X X X 1000 per reel

  • 4 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Package Outline Drawings Figure 2 ACPL-M50L SO-5 Package (JEDEC M0-155) Figure 3 Land Pattern Recommendations M50L YWW 7.0 ± 0.2 (0.276 ± 0.008) 2.5 ± 0.1 (0.098 ± 0.004) 0.102 ± 0.102 (0.004 ± 0.004) 4.4 ± 0.1 (0.173 ± 0.004) 1.27 (0.050) BSC 0.216 ± 0.038 (0.0085 ± 0.0015) 0.71 (0.028) MIN 0.4 ± 0.05 (0.016 ± 0.002) 3.6 ± 0.1* (0.142 ± 0.004) Dimensions in Millimeters (Inches) * Maximum mold flash on each side is 0.15 mm (0.006) Note: Floating lead protrusion is 0.15 mm (6 mils) max. 7° MAX. MAX. LEAD COPLANARITY = 0.102 (0.004)

1 VCC

8.27 (0.325) 1.8 (0.072) 2.5 (0.10) 1.3 (0.05) 0.64 (0.025) 4.4 (0.17) Dimension in Millimeters (Inches)

  • 5 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Figure 4 ACPL-054L (Small Outline SO-8 Package) x54LV YWW 8765 4321 5.994 ± 0.203 (0.236 ± 0.008) 3.937 ± 0.127 (0.155 ± 0.005) 0.406 ± 0.076 (0.050) BSC 5.080 ± 0.127 (0.200 ± 0.005) 3.175 ± 0.127 (0.060) 45° X 0.432 (0.017) 0.228 ± 0.025 (0.009 ± 0.001) TYPE NUMBER (‘V’ for OPTION 060) DATE CODE LEAD FREE 0.305 (0.012) MIN. 0.203 ± 0.102 (0.008 ± 0.004) PIN ONE 0 ~ 7° Total package length (inclusive of mold flash) Dimensions in Millimeters (Inches). Lead coplanarity = 0.10 mm (0.004 inches) max. Option number 500 not marked. Note: Floating lead protrusion is 0.15 mm (6 mils) max. 7.49 (0.295) 1.9 (0.075) 0.64 (0.025) LAND PATTERN RECOMMENDATION
  • 6 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Figure 5 ACPL-W50L Stretched SO-6 Package 4.834±0.254 (0.190±0.010) 45° 0.381±0.127 (0.015±0.005) 1.27 (0.050) BSG 0.20±0.10 (0.008±0.004) 0.45 (0.018) 0.750±0.250 (0.453±0.010) 6.807 0.268 Dimensions in Millimeters (Inches). Lead coplanarity = 0.1 mm (0.004 inches). 12.65 (0.498) LAND PATTERN RECOMMENDATION 3.180±0.127 (0.125±0.005) 1.590±0.127 (0.063±0.005)7° 1.91 (0.075) 321 456 0.76 (0.030) +0.127 +0.005 - 0.000 )( W50L YWW PART NUMBER DATE CODE ROHS-COMPLIANCE INDICATOR TOTAL PACKAGE WIDTH (INCLUSIVE OF MOLD FLASH)
  • 7 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Figure 6 ACPL-K54L Stretched SO-8 Package Solder Reflow Profile Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-halide flux should be used. Regulatory Information The ACPL-M21L/024L/021L/W21L/K24L is approved by the following organizations. UL Approval under UL 1577, component recognition program up to VISO = 3750 VRMS for ACPL-M50L/054L/021L and VISO = 5000 VRMS for ACPL-W50L/K54L. CSA Approval under CSA Component Acceptance Notice #5. IEC/EN 60747-5-5 (Option 060E only). 0.381±0.13 (0.015±0.005) 1.270 (0.050) BSG 12.650 (0.5) 1.905 (0.1) 321 5678 6.100±0.250 (0.240±0.010) LAND PATTERN RECOMMENDATION Dimensions in Millimeters (Inches). Lead coplanarity = 0.1 mm (0.004 inches). 7° 45° 0.200±0.100 (0.008±0.004) 0.450 (0.018) 0.750±0.250 (0.453±0.010) 6.807±0.127 (0.268±0.005) 3.180±0.127 (0.125±0.005) 1.590±0.127 (0.063±0.005) K54L YWW PART NUMBER DATE CODE ROHS-COMPLIANCE INDICATOR TOTAL PACKAGE WIDTH (INCLUSIVE OF MOLD FLASH)
  • 8 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet NOTE These optocouplers are suitable for "safe electrical isolation" only within the safety limit data. Maintenance of the safety limit data shall be ensured by means of protective circuits. Table 3 Insulation and Safety Related Specifications Parameter Symbol ACPL-M50L ACPL-054L ACPL-W50L ACPL-K24L Units Conditions Minimum External Air Gap (Clearance) L(101) 5 4.9 8 mm Measured from input terminals to output terminals, shortest distance through air. Minimum External Tracking (Creepage) L(102) 5 4.8 8 mm Measured from input terminals to output terminals, shortest distance path along body. Minimum Internal Plastic Gap (Internal Clearance) 0.08 0.08 0.08 mm Through insulation distance conductor to conductor, usually the straight line distance thickness between the emitter and detector. Tracking Resistance (Comparative Tracking Index) CTI 175 175 175 V DIN IEC 112/VDE 0303 Part 1 Isolation Group IIIa IIIa IIIa — Material Group (DIN VDE 0110, 1/89, Table 1) Table 4 IEC/EN60747-5-5 Insulation Characteristicsa (Option 060E) a. Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC/EN 60747-5-5) for a detailed description of Method a and Method b partial discharge test profiles. Description Symbol Characteristic UnitACPL-M21L/ 024L/021L ACPL-W21L/ K24L Installation classification per DIN VDE 0110/39, Table 1 for rated mains voltage ≤ 150 Vrms for rated mains voltage ≤ 300 Vrms for rated mains voltage ≤ 600 Vrms for rated mains voltage ≤ 1000 Vrms I – IV I – III I – II I – IV I – IV I – III I – III Climatic Classification 55/105/21 55/105/21 — Pollution Degree (DIN VDE 0110/39) 2 2 — Maximum Working Insulation Voltage V IORM 560 1140 V peak Input to Output Test Voltage, Method ba VIORM × 1.875 = VPR, 100% Production Test with tm = 1 sec, Partial discharge < 5 pC VPR 1050 2137 V peak Input to Output Test Voltage, Method aa VIORM × 1.6 = VPR, Type and Sample Test, tm = 10 sec, Partial discharge < 5 pC VPR 896 1824 V peak Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec) V IOTM 6000 8000 V peak Safety-limiting values – maximum values allowed in the event of a failure. Case Temperature Input Currentb Output Powerb b. Refer to the following figure for dependence of P S and IS on ambient temperature. TS IS, INPUT PS, OUTPUT 150 150 600 175 230 600 mA mW Insulation Resistance at TS, VIO = 500 V R S >109 >109 
  • 9 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Table 5 Absolute Maximum Ratings Parameter Symbol Min. Max. Units Storage Temperature T S –55 125 °C Operating Temperature T A –40 105 °C Lead Soldering Cycle Temperature — 260 °C Time — 10 s Average Forward Input Currenta a. Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C. IF(avg) —2 0 m A Peak Forward Input Currentb (50% duty cycle, 1 ms pulse width) b. Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C. IF(peak) —4 0 m A Peak Transient Input Current (≤1 μs pulse width, 300 ps) I F(trans) —1 A Reversed Input Voltage V R —5 V Input Power Dissipationc c. Derate linearly above 85°C free-air temperature at a rate of 0.9 mW/°C. PIN —3 6 m W Output Power Dissipationd d. Derate linearly above 85°C free-air temperature at a rate of 1.2 mW/°C. PO —4 5 n W Average Output Current IO(AVG) — 8 mA Peak Output Current IO(PEAK) — 16 mA Supply Voltage V CC –0.5 30 V Output Voltage V O –0.5 24 V Solder Reflow Temperature Profile See Package Outline Drawings Table 6 Recommended Operating Conditions Parameter Symbol Min. Max. Units Supply Voltage V CC 2.7 24 V Input Current, High Level I FH 31 0 m A Operating Temperature T A –40 105 °C Forward Input Voltage (OFF) V F (OFF) —0 . 8 V
  • 10 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Electrical Specifications (DC) Over recommended temperature (TA = –40°C to +105°C) and supply voltage (2.7V ≤ VCC ≤ 24V). All typical specifications are at TA =2 5 ° C . Table 7 Electrical Specifications (DC) Parameter Sym. Part Number Min. Typ. Max. Units Conditions Fig. Current Transfer Ratio CTRa a. CURRENT TRANSFER RATIO in perc ent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100%. ACPL-M50L 100 140 200 % T A = 25°C V O = 0.4V V CC = 3.3V or 5V, IF = 3 mA 8, 9 ACPL-054L ACPL-W50L ACPL-K54 93 130 200 % T A = 25°C V O = 0.4V V CC= 3.3V or 5V, IF =3 m A 8, 9 Logic Low Output Voltage VOL —0 . 2 0 . 4 V T A = 25°C I O = 3 mA V CC = 3.3V or 5V, IF =3 m A—0 . 2 0 . 5 V I O = 1.6 mA Logic High Output Current IOH —0 . 0 0 3 0 . 5 μ A T A = 25°C V O = VCC = 5.5V I F =0 mA 10, 11 —0 . 0 1 1 V O = VCC = 24V ——8 0 V O = VCC = 24V Logic Low Supply Currentper Channel ICCL —3 6 1 0 0 μ A I F = 3 mA, VO = open, VCC =2 4 V Logic High Supply Current per Channel ICCH —0 . 0 2 2 μ A I F = 0 mA, VO = open, VCC =2 4 V Input Forward Voltage VF —1 . 5 1 . 8 V T A= 25°C I F = 3 mA 7 — 1.5 1.95 V I F = 3 mA Input Reversed Breakdown Voltage BVR 5— —V I R = 10 μA Temperature Coefficient of Forward Voltage VF/TA —– 1 . 6— m V / ° C I F= 3 mA Input Capacitance C IN —7 7—p F F = 1 M H z , V F = 0
  • 11 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Switching Specifications (ACPL-M50L) Over recommended operating (TA = –40°C to 105°C), IF = 3 mA, (2.7V ≤ VCC ≤ 24V), unless otherwise specified. Table 8 Switching Specifications (ACPL-M50L) Parameter Symbol Min Typ Max Units Test Conditions Fig. Propagation Delay Time to Logic Low at Output T PHL —0 . 2 0 . 5μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =3 . 3 V , RL= 1.2 k, CL = 15 pF, VTHHL = 1.5V —0 . 2 1 μ s 12, 26 — 0.22 0.5 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =5 . 0 V , RL = 1.9 k, CL = 15 pF, VTHHL = 1.5V —0 . 2 2 1 μ s 14, 26 — 0.33 0.7 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =2 4 V , RL = 10 k, CL = 15 pF , VTHHL = 1.5V — 0.33 1.3 μs 16, 26 Propagation Delay Time to Logic High at Output TPLH — 0.38 0.8 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =3 . 3 V , RL = 1.2 k, CL = 15 pF , VTHHL = 2.0V — 0.38 1.2 μs 12, 26 — 0.31 0.7 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F= 3 mA, VCC =5 . 0 V , RL = 1.9 k, CL = 15 pF , VTHHL = 2.0V —0 . 3 1 1 μ s 14, 26 —0 . 3 0 . 7μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =2 4 V , RL = 10 k, CL = 15 pF , VTHHL = 2.0V —0 . 3 1 μ s 16, 26 Pulse Width Distortiona a. Pulse Width Distortion (PWD) is defined as |tPHL – tPLH| for any given device. PWD — 0.18 0.8 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =3 . 3 V , RL = 1.2 k, CL = 15 pF , VTHHL = 1.5V, VTHLH = 2.0V — 0.18 1.2 μs 26 —0 . 1 0 . 7μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 5.0V, RL = 1.9 k, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V —0 . 1 1 μ s 26 —0 . 1 0 . 7μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC=24V, RL=10 k, CL=15 pF , VTHHL=1.5V, VTHLH=2.0V —0 . 1 1 μ s 26 Propagation Delay Difference Between Any Two Partsb b. The difference between t PLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) tpsk — 0.18 0.7 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =3 . 3 V , RL = 1.2 k, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V —0 . 1 0 . 6μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =5 . 0 V , RL = 1.9 k, CL = 15 pF , VTHHL = 1.5V, VTHLH = 2.0V —0 . 1 0 . 6μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =2 4 V , RL = 10 k, CL = 15 pF , VTHHL = 2.0V Common Mode Transient Immunity at Logic High Outputc c. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0V). |CMH|1 5 2 5 —k V / μ s T A = 25°C V CM = 1500V, IF = 0 mA,, RL = 1.2 k or 1.9 k, VCC = 3.3 V or 5V Common Mode Transient Immunity at Logic Low Outputd d. Common mode transient immunity in a Logic Lo w level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8V). |CML|1 5 2 0 — k V / μ s T A= 25°C V CM = 1500V, IF = 3 mA, RL = 1.2 k, VCC = 5V 27 10 15 — kV/μs V CM = 1500V, IF = 3 mA, RL = 1.2 k, VCC = 3.3 V 27
  • 12 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Switching Specifications (ACPL-054L/W50L/K54L)) Over recommended temperature (TA = –40°C to +105°C), supply voltage (2.7V ≤ VCC ≤ 24V unless otherwise specified.. Table 9 Switching Specifications (ACPL-M50L) Parameter Symbol Min Typ Max Units Test Conditions Fig. Propagation Delay Time to Logic Low at Output T PHL —0 . 2 0 . 5μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 3.3V, RL = 1.8 k, CL = 15 pF, VTHHL = 1.5V —0 . 2 1 μ s 13, 26 — 0.22 0.5 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =5 . 0 V , RL = 2.9 k, CL = 15 pF, VTHHL = 1.5V —0 . 2 2 1 μ s 15, 26 — 0.33 0.7 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =2 4 V , RL = 14.8 k, CL = 15 pF , VTHHL= 1.5V — 0.33 1.3 μs 17, 26 Propagation Delay Time to Logic High at Output TPLH — 0.38 0.8 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 3.3V, RL = 1.8 k, CL =1 5 pF, VTHHL = 2.0V — 0.38 1.4 μs 13, 26 — 0.31 0.7 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 5.0V, RL = 2.9 k, CL = 15 pF, VTHHL = 2.0V —0 . 3 1 1 μ s 15, 26 —0 . 3 0 . 7μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC =2 4 V , RL = 14.8 k, CL = 15 pF, VTHHL = 2.0V —0 . 3 1 μ s 17, 26 Pulse Width Distortiona a. Pulse Width Distortion (PWD) is defined as |tPHL – tPLH| for any given device. PWD — 0.18 0.8 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 3.3V, RL = 1.8 k, CL = 15 pF, VTHH L= 1.5V, VTHLH = 2.0V — 0.18 1.4 μs 26 —0 . 1 0 . 7μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F= 3 mA, VCC =5.0V, RL = 2.9 k, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V —0 . 1 1 μ s 26 —0 . 1 0 . 7μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 24V, RL = 14.8 k, CL = 15 pF , VTHHL = 1.5V, VTHLH = 2.0V —0 . 1 1 μ s 26 Propagation Delay Difference Between Any Two Partsb b. The difference between t PLH and tPHL between any two parts under the same test condition. (See IPM Dead Time and Propagation Delay Specifications section.) tpsk — 0.18 0.7 μs T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F= 3 mA, VCC = 3.3V, RL = 1.8 k, CL = 15 pF, VTHHL = 1.5V, VTHLH = 2.0V —0 . 1 0 . 6μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 5.0V, RL = 2.9 k, CL = 15 pF , VTHHL = 1.5V, VTHLH = 2.0V —0 . 1 0 . 6μ s T A = 25°C Pulse: f = 10 kHz, Duty cycle = 50%, I F = 3 mA, VCC = 24V, RL = 14.8 k, CL = 15 pF, VTHHL = 2.0V, VTHLH = 2.0V Common Mode Transient Immunity at Logic High Outputc c. Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0V). |CMH|1 5 2 5 —k V / μ s T A = 25°C V CM = 1500V, IF = 0 mA,, RL = 1.8 k or 2.9 k, VCC = 3.3 V or 5V Common Mode Transient Immunity at Logic Low Outputd d. Common mode transient immunity in a Logic Lo w level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM to assure that the output will remain in a Logic Low state (i.e., VO < 0.8V). |CML|1 5 2 0 — k V / μ s T A= 25°C V CM = 1500V, IF = 3 mA, RL = 2.9 k, VCC = 5V 27 15 20 — kV/μs V CM = 1500V, IF = 3 mA, RL = 1.8 k, VCC = 3.3 V 27
  • 13 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Package Characteristics All typical at TA = 25°C Table 10 Package Characteristics Parameter Symbol Part Number Min. Typ. Max. Units Test Conditions Input-Output Momentary Withstand Voltagea,b a. Device considered a two terminal device: pins 1 and 3 shorted together and pins 4, 5 and 6 shorted together for ACPL-M50L, pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted together for ACPL-054L/K54L, pins 1, 2 and 3 shorted together and pins 4, 5 and 6 shorted together for ACPL-W50L. b. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for 1 second for ACPL-M50L/054L and ≥ 6000 VRMS for 1 second for ACPL-W50L/K54L (leakage detection current limit, II-O ≤ 5mA).. VISO ACPL-M50L/054L 3750 — — Vrms RH ≤ 50%, t = 1 min., T A = 25°C ACPL-W50L/K54L 5000 — — Input-Output Resistancea RI-O — 1014 —  VI-O = 500 Vdc Input-Output Capacitancea CI-O —0 . 6—p F f = 1 M H z , T A = 25°C Input-Input Insulation Leakage Current[3] II-I — 0.005 — μA RH ≤ 45%, t = 5 s, V I-I = 500Vdc Input-Input Resistancec c. Measured between pins 1 and 2 sh orted together and pins 3 and 4 shorted together for ACPL-054L/K54L. RI-I — 1011 —  Input-Input Capacitancec CI-I —0 . 2 5— p F f = 1 M H z
  • 17 - ACPL-M50L, ACPL-054L, ACPL-W50L, ACPL-K54L Data Sheet Figure 24 Typical Propagation Delay vs. Supply Current (ACPL-M50L) Figure 25 Typical Propagation Delay vs. Supply Current (ACPL-054L/W50L/K54L) tp - PROPAGATION DELAY - ns 100 200 300 400 500 600 0 5 10 15 20 IF - FORWARD LED CURRENT - mA tPLH tPHL VCC = 24 V RL = 10 k: TA = 25°C tp - PROPAGATION DELAY - ns IF - FORWARD LED CURRENT - mA 100 200 300 400 500 600 0 5 10 15 20 tPLH tPHL VCC = 24 V RL = 14.8 k: TA = 25°C Figure 26 Switching Test Circuits Figure 27 Test Circuit for Transient Immunity and Typical Waveforms V O PULSE GEN. Z O = 50 : t r = 5 ns IF MONITOR IF 0.1μF R L C L R M t PHL t PLH V O IF V OL V THHL V THLH V CC V CC V O 0.1μF R LA B PULSE GEN. V CM V FF C L V CC V O V OLV O

0 V 10%

90% 90% 10% SWITCH AT A: I = 0 mAF SWITCH AT B: I = 3 mAF V CM tr tf V CC

10 V IF

For product information and a complete list of distributors, please go to our web site: www.broadcom.com. Broadcom, the pulse logo, Connecting everything, Avago Technologies, Avago, and the A logo are among the trademarks of Broadcom and/or its affiliates in the United States, certain other countries and/or the EU. Copyright © 2014–2017 by Broadcom. All Rights Reserved. The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries. For more information, please visit www.broadcom.com. Broadcom reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. Information furnished by Broadcom is believed to be accurate and reliable. However, Broadcom does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. AV02-2223EN – March 10, 2017 Figure 28 Current Transfer Ratio vs. Input Current Figure 29 DC Pulse Transfer Characteristic 100 150 200 250 0 5 10 15 20 25 IF - FORWARD CURRENT - mA CTR - CURRENT TRANSFER RATIO - % VO = 0.4 V VCC = 5 V 0 4 8 1 21 6 2 02 4 VO - OUTPUT VOLTAGE - V IO - OUTPUT CURRENT - mA TA = 25 oC VCC = 5 V IF = 20 mA IF = 15 mA IF = 10 mA IF = 5 mA