ACMP609

ADCMP608 AD | Alldatasheet

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Technical content

Rail-to-Rail, Fast, Low Power, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparators Preliminary Technical Data ADCMP608/ACMP609 Rev. PrA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved. FUNCTIONAL BLOCK DIAGRAMS FEATURES NONINVERTING INPUT INVERTING INPUT Q OUTPUT Q OUTPUT ADCMP609 SDNLE/HYS ADCMP608 NONINVERTING INPUT INVERTING INPUT Q OUTPUT SDN 05918-001 10 mV sensitivity rail to rail at VCC = 2.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch CMOS-/TTL-compatible output stage 30 ns propagation delay 1 mW at 2.5 V Shutdown pin Single-pin control for programmable hysteresis and latch Power supply rejection >60 dB −40C° to +125C° operation

APPLICATIONS

High speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors Figure 1. High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators GENERAL DESCRIPTION The ADCMP608 and ADCMP609 are fast comparators fabricated on Analog Devices’ proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE − 0.5 V to VCC + 0.5 V , low noise, TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs. The TTL-/CMOS-compatible output stage is designed to drive up to 15 pF with full rated timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided in a unique single-pin control option. The devices offer 30 ns propagation delays driving a 15 pF load with 5 mV overdrive on 350/400 μA typical supply current. A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a −0.5 V to +3.0 V input signal range up to a +5.5 V positive supply with a −0.5 V to +6V input signal range. Split input/output supplies, with no sequencing restrictions on the ADCMP609, support a wide input signal range while allowing independent output swing control. The ADCMP608 is available in a tiny 6-lead SC70 package with single-ended output and a shutdown pin. The ADCMP609, available in an 8-lead MSOP package, features a shutdown pin, single pin latch, and hysteresis control.

ADCMP608/ADCMP609 Preliminary Technical Data Rev. PrA | Page 2 of 16 TABLE OF CONTENTS

REVISION HISTORY

2/06—Revision PrA: Preliminary Version

Preliminary Technical Data ADCMP608/ADCMP609 Rev. PrA | Page 3 of 16 SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VCCI = VCCO = 3.3 V , TA = 25°C, unless otherwise noted. Table 1. Parameter Symbol Conditions Min Typ Max Unit DC INPUT CHARACTERISTICS Voltage Range VP, VN VCC = 2.5 V to 5.5 V −0.5 VCC + 0.5 V V Common-Mode Range VCC = 2.5 V to 5.5 V −0.2 VCC + 0.2 V V Differential Voltage VCC = 2.5 V to 5.5 V VCC V Offset Voltage VOS −5.0 +5.0 mV Bias Current IP, IN −2.0 ±1 +2.0 μA Offset Current −0.5 +0.5 μA Capacitance CP, CN TBD pF Resistance, Differential Mode 0.1 V to VCC 150 kΩ Resistance, Common Mode −0.5 V to VCC + 0.5 V 100 kΩ Active Gain AV 80 dB VCCI = 2.5 V, VCCO = 2.5 V, VCM = −0.2 V to 2.7 V 50 dB Common-Mode Rejection CMRR VCCI = 5.5 V, VCCO = 5.5 V, VCM = −0.2 V to 5.7 V 60 dB Hysteresis RHYS = ∞ 0.1 mV LATCH ENABLE PIN CHARACTERISTICS ADCMP609 only VIH Hysteresis is shut off 2.0 VCCO + 0.2 V VIL Latch mode guaranteed −0.2 0.4 0.8 V LIH VIH = VCCO + 0.2 V 0.1 mA IOL VIL = 0.4 V −0.1 mA HYSTERESIS MODE AND TIMING Hysteresis Mode Bias Voltage Current sink 0 μA 1.08 1.25 1.35 V Minimum Resistor Value Hysteresis = 60 mV 60 kΩ Latch Setup Time tS VOD = 100 mV 15 ns Latch Hold Time tH VOD = 100 mV 20 ns Latch to Output Delay tPLOH, tPLOL VOD = 100 mV 20 ns Latch Minimum Pulse Width tPL VOD = 100 mV 20 ns SHUTDOWN PIN CHARACTERISTICS VIH Comparator is operating 2.0 VCC V VIL Shutdown guaranteed −0.2 0.4 0.6 V IIH VIH = VCC 0.05 mA IOL VIL = 0 V −0.05 mA Sleep Time tSD ICC < 100 μA 0.6 ns Wake-Up Time tH VOD = 10 mV, output valid 3 ns DC OUTPUT CHARACTERISTICS VCCO = 2.5 V to 6 V Output Voltage High Level VOH IOH = 1.6 mA VCCO = 2.5 V VCC − 0.4 V Output Voltage Low Level VOL IOL = 1.6 mA VCCO = 2.5 V 0.4 V

ADCMP608/ADCMP609 Preliminary Technical Data Rev. PrA | Page 4 of 16 Parameter Symbol Conditions Min Typ Max Unit AC PERFORMANCE VCCI = VCCO = 2.5 V to 5.5 V Propagation Delay, CL = 15 pF tPD VCCO = 5.5 V to 2.5 V, VOD = 10 mV 30 ns VCCO = 2.5 V/5.5 V, VOD = 200 mV 25/30 ns Propagation Delay Skew—Rising to Falling Transition VOD = 10 mV 2 ns Overdrive Dispersion 10 mV < VOD < 500 mV 4 ns Slew Rate Dispersion Small Signal 10 V/μs to 0.1 V/ns 200 mV p-p single ended 1 ns 10% − 90% Duty Cycle Dispersion VOD 1.25 V, 50 V/μs, VCM = 1.25 V 1 ns Common-Mode Dispersion VCM = 0 V to VCC 200 m p-p single ended 0.5 ns Toggle Rate >50% output swing C L = 15 pF VCCI = 5 V TBD Mbps RMS Random Jitter RJ VOD = 200 mV, 5 V/ns TBD ns Minimum Pulse Width PWMIN ΔtPD/ΔPW < 500 ps 35 ns Rise Time tR 10% to 90% CLOAD = 15 pF, VCCI = 2.5 V to 5 V 25 to 40 ns Fall Time tF 10% to 90% CLOAD = 15 pF, VCCI = 2.5 V to 5 V 25 to 40 ns POWER SUPPLY Input Supply Voltage Range VCCI 2.5 5.5 V Output Supply Voltage Range VCCO 2.5 5.5 V Positive Supply Differential (ADCMP609) VCCI − VCCO Operating −3 +3 V Positive Supply Differential (ADCMP609) VCCI − VCCO Nonoperating −5.5 +5.5 V Positive Supply Current IVCC VCC = 2.5 V 400 μA Positive Supply Current IVCC VCC = 5.5 V 500 μA Input Section Supply Current (ADCMP609) IVCCi VCCI = 2.5 V 270 mA Output Stage Supply Current (ADCMP609) IVCCO VCCO= 2.5 V 130 mA Power Dissipation PD VCC = 2.5 V 1 mW Shutdown Current ISD VCC =2.5 V to 5.5 V 50 μA Power Supply Rejection PSRR VCCI = 2.5 V to 5 V >50 dB dB

Table 3. Thermal Resistance Shutdown Control Pin Applied Voltage (HYS to GND) −0.5 V to VCCO + 0.5 V 1 Measurement in still air. degradation or loss of functionality.

Figure 2. ADCMP608 Pin Configuration Figure 3. ADCMP609 Pin Configuration Table 4. ADCMP608 Pin Function Descriptions analog voltage at the inverting input, VN. 2 VEE Negative Supply Voltage. 3 VP Noninverting Analog Input. 4 Vn Inverting Analog Input. 5 SDN Shutdown. Drive this pin low to shutdown the device. Table 5. ADCMP609 Pin Function Descriptions 2 VP Noninverting Analog Input. 3 Vn Inverting Analog Input. 4 SDN Shutdown. Drive this pin low to shutdown the device. 5 LE/HYS Latch/Hysteresis Control. Bias with resistor or current source for hysteresis; drive TTL low to latch. 6 VEE Negative Supply Voltage. analog voltage at the inverting input, VN, provided the comparator is in compare mode. voltage at the inverting input, VN, provided the comparator is in compare mode.

Preliminary Technical Data ADCMP608/ADCMP609 Rev. PrA | Page 9 of 16

APPLICATION INFORMATION

+IN –IN OUTPUT STAGE VLOGIC GAIN STAGE AV 05918-012 POWER/GROUND LAYOUT AND BYPASSING The ADCMP608 and ADCMP609 comparators are high speed devices. Despite the low noise output stage, it is essential to use proper high speed design techniques to achieve the specified performance. Because comparators are uncompensated amplifiers, feedback in any phase relationship is likely to cause oscillations or undesired hysteresis. Of critical importance is the use of low impedance supply planes, particularly the output supply plane (V CCO) and the ground plane (GND). Individual supply planes are recommended as part of a multilayer board. Providing the lowest inductance return path for switching currents ensures the best possible performance in the target application. Figure 13. Simplified Schematic Diagram maintain the excellent speed and stability of the part. parallel to the hysteresis control resistor or current source. may show up as excess delay dispersion. bandwidth at the input, thus degrading the overall response. Higher impedances encourage undesired coupling.

sensing comparators such as the AD8611. Figure 17. Hysteresis vs. RHYS Control Resistor

ADCMP608/ACMP609 Preliminary Technical Data Rev. PrA | Page 14 of 16 NOTES

Preliminary Technical Data ADCMP608/ADCMP609 Rev. PrA | Page 15 of 16 NOTES

ADCMP608/ACMP609 Preliminary Technical Data Rev. PrA | Page 16 of 16 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. PR05918-0-2/06(PrA)