AAT2500 ANALOGICTECH | Alldatasheet

Document overview

  • Manufacturer or author: janekim
  • PDF pages: 26

Technical content

Features

  • V IN Range: 2.7V to 5.5V
  • 300mA LDO Current Output
  • 400mV LDO Dropout Voltage at 300mA
  • High Output Accuracy: ±1.5%
  • Fast LDO Line / Load Transient Response
  • 400mA, 96% Efficiency Step-Down Converter
  • 25µA No Load Quiescent Current for Step- Down Converter
  • Shutdown Current <1µA
  • Low R DS(ON) 0.4Ω Integrated Power Switches
  • Low Dropout 100% Duty Cycle
  • 1MHz Switching Frequency
  • Internal Soft Start
  • Over-Temperature Protection
  • Current Limit Protection
  • Available in TDFN33-12 or STDFN33-12 Package
  • -40°C to +85°C Temperature Range

Applications

  • Cellular Phones
  • Digital Cameras
  • Handheld Instruments
  • Microprocessor/DSP Core/IO Power
  • PDAs and Handheld Computers
  • Portable Media Players

1MHz Step-Down Converter/LDO Regulator 2 2500.2006.05.1.16 Pin Descriptions Pin Configuration TDFN/STDFN33-12 (TopView) PGND LX VP VCC VLDO OUT SGND FB EN ENLDO GND BYP Pin # Symbol Function 1 PGND Step-down converter power ground return pin. Connect to the output and input capaci- tor return. See section on PCB layout guidelines and evaluation board layout diagram. 2 LX Power switching node. Output switching node that connects to the output inductor. 3 VP Step-down converter power stage supply voltage. Must be closely decoupled to PGND. 4 VCC Step-down converter bias supply. Connect to VP. 5 VLDO LDO input voltage; should be decoupled with 1µF or greater capacitor. 6 OUT 300mA LDO output pin. A 2.2µF or greater output low-ESR ceramic capacitor is required for stability. 7 BYP Bypass capacitor for the LDO. To improve AC ripple rejection, connect a 10nF capaci- tor to GND. This will also provide a soft-start function. 8 GND LDO ground connection pin. 9 ENLDO Enable pin for LDO. When connected low, LDO is disabled and consumes less than 1µA of current. 10 EN Step-down converter enable. When connected low, LDO is disabled and consumes less than 1µA. 11 FB Step-down converter feedback input pin. For fixed output voltage versions, this pin is connected to the converter output, forcing the converter to regulate to the specific volt- age. For adjustable output versions, an external resistive divider ties to this point and programs the output voltage to the desired value. 12 SGND Step-down converter signal ground. For external feedback, return the feedback resis- tive divider to this ground. For internal fixed version, tie to the point of load return. See section on PCB layout guidelines and evaluation board layout diagram. EP Exposed paddle (bottom). Use properly sized vias for thermal coupling to the ground plane. See section on PCB layout guidelines.

1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 3 Absolute Maximum Ratings1 Thermal Information Symbol Description Value Units PD Maximum Power Dissipation 2 W θJA Thermal Resistance2 50 °C/W Symbol Description Value Units VP, VLDO Input Voltages to GND 6.0 V VLX LX to GND -0.3 to V P + 0.3 V VFB FB to GND -0.3 to V P + 0.3 V VEN EN to GND -0.3 to 6.0 V TJ Operating Junction Temperature Range -40 to 150 °C TLEAD Maximum Soldering Temperature (at leads, 10 sec) 300 °C 1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum Rating should be applied at any one time. 2. Mounted on an FR4 board with exposed paddle connected to ground plane.

1MHz Step-Down Converter/LDO Regulator 4 2500.2006.05.1.16 Electrical Characteristics1 Symbol Description Conditions Min Typ Max Units 1mA, COUT = 2.2µF, CIN = 1µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are TA = 25°C. TA = 25°C -1.5 1.5 VOUT Output Voltage Tolerance I OUT = 1mA to 300mA T A = -40°C -2.5 2.5 % to 85°C VIN Input Voltage V OUT+VDO 2 5.5 V VDO Dropout Voltage3, 4 IOUT = 300mA 400 600 mV ΔVOUT/ Line Regulation V IN = VOUT + 1V to 5V 0.09 %/VVOUT*ΔVIN ΔVOUT(Line) Dynamic Line Regulation IOUT = 300mA, VIN = VOUT + 1V to 2.5 mVVOUT + 2V, TR/TF = 2µS ΔVOUT(Load) Dynamic Load Regulation I OUT = 1mA to 300mA, TR <5µS 60 mV IOUT Output Current V OUT > 1.3V 300 mA ISC Short-Circuit Current V OUT < 0.4V 600 mA IQLDO LDO Quiescent Current V IN = 5V, No Load, ENLDO = VIN 70 125 µA ISHDN Shutdown Current VIN = 5V; ENLDO = GND, 1.0 µAEN = SGND = PGND 1kHz 67 PSRR Power Supply Rejection Ratio I OUT = 10mA, CBYP = 10nF 10kHz 47 dB 1MHz 45 TSD Over-Temperature Shutdown 145 °CThreshold THYS Over-Temperature Shutdown 12 °CHysteresis eN Output Noise e NBW = 300Hz to 50kHz 50 µV RMS TC Output Voltage Temperature 22 ppm/°CCoefficient 1. The AAT2500 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assu red by design, characterization, and correlation with statistical process controls. 2. To calculate the minimum LDO input voltage, use the following equation: V IN(MIN) = VOUT(MAX) + VDO(MAX), as long as VIN ≥ 2.5V. 3. For VOUT <2.1V, VDO = 2.5 - VOUT. 4. VDO is defined as VIN - VOUT when VOUT is 98% of nominal.

1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 5 Electrical Characteristics1 Symbol Description Conditions Min Typ Max Units Buck Converter Typical values are TA = 25°C, VIN = VCC = Vp = 3.6V. VIN Input Voltage 2.7 5.5 V VIN Rising 2.6 V VUVLO UVLO Threshold Hysteresis 100 mV VIN Falling 1.8 V VOUT Output Voltage Tolerance IOUT = 0 to 400mA, -3.0 +3.0 %VIN = 2.7V to 5.5V VOUT Output Voltage Range Fixed Output Version 0.6 4.0 VAdjustable Output Version2 0.6 2.5 IQBUCK Step-Down Converter ENLDO = GND, No Load, 25 50 µAQuiescent Current 0.6V Adjustable Model ISHDN Shutdown Current EN = SGND = PGND, ENLDO = GND 1.0 µA ILIM P-Channel Current Limit 600 mA RDS(ON)H High Side Switch On 0.45 ΩResistance RDS(ON)L Low Side Switch On 0.4 ΩResistance ILXLK LX Leakage Current VIN = 5.5V, VLX = 0 - VIN 1.0 µAEN = SGND = PGND VLinereg Line Regulation V IN = 2.7V to 5.5V 0.2 %/V VFB FB Threshold Voltage 0.6V Output, No Load, TA = 25°C 597 600 615 mVAccuracy IFB FB Leakage Current 0.6V Output 0.2 µA RFB FB Impedance >0.6V Output 250 k Ω FOSC Oscillator Frequency T A = 25°C 0.7 1.0 1.5 MHz TSD Over-Temperature Shutdown 140 °CThreshold THYS Over-Temperature Shutdown 15 °CHysteresis Logic Signals VEN(L) Enable Threshold Low 0.6 V VEN(H) Enable Threshold High 1.5 V IEN(H) Leakage Current 1.0 1.0 µA 1. The AAT2500 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assu red by design, characterization, and correlation with statistical process controls. 2. For adjustable version with higher than 2.5V output, please consult your AnalogicTech representative.

Unless otherwise noted, VIN = 5V, TA = 25°C. LDO Initial Power-Up Response Time (CBYP = 10nF; EN = GND; ENLDO = VIN) 400μμs/div VENLDO (5V/div) VOUT (1V/div) LDO Output Voltage vs. Temperature (EN = GND; ENLDO = VIN) 1.196 1.197 1.198 1.199 1.200 1.201 1.202 1.203 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 Temperature (°C) Output Voltage (V) LDO Ground Current vs. Input Voltage (EN = GND; ENLDO = VIN) 0.00 10.00 20.00 30.0040.00 50.00 60.0070.00 80.00 90.00 2 2.5 3 3.5 4.5 45 Input Voltage (V) Ground Current (μA) IOUT=0mA IOUT=10mA IOUT=50mA IOUT=150mA IOUT=300mA LDO Dropout Voltage vs. Output Current (EN = GND; ENLDO = VIN) 100 150 200 250 300 350 400 450500 0 50 100 150 200 250 300Output Current (mA) Dropout Voltage (mV) 85°C 25°C -40°C LDO Dropout Characteristics (EN = GND; ENLDO = VIN) 2.00 2.20 2.40 2.602.80 3.00 3.20 Input Voltage (V) Output Voltage (V) IOUT = 300mA IOUT = 150mA IOUT = 100mA IOUT = 50mAIOUT = 10mA IOUT = 0mA LDO Dropout Voltage vs. Temperature (EN = GND; ENLDO = VIN) 120 180 240 300 360420 480 540 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120Temperature (°C) Dropout Voltage (mV) IL = 300mA IL = 150mA IL = 100mA IL = 50mA AAT2500 1MHz Step-Down Converter/LDO Regulator 6 2500.2006.05.1.16

Unless otherwise noted, VIN = 5V, TA = 25°C, VIN = VLDO = VCC = VP. LDO Self Noise (EN = GND; ENLDO = VIN) 0.001 0.01 0.1 0.01 0.1 1 10 100 1000 10000 Frequency (kHz) Noise Amplitude (μV/rtHz) Band Power: 300Hz to 50kHz = 44.6μVrms 100Hz to 100kHz = 56.3μVrms LDO Load Transient Response 300mA (CBYP = 10nF; EN = GND; ENLDO = VIN) 2.10 2.20 2.30 2.40 2.50 2.60 2.70 2.80 2.90 3.00 10μμs/div Output Voltage (V) -100 100 200 300 400 500600 700 800 Output Current (mA) VOUT IOUT LDO Load Transient Response (CBYP = 10nF; EN = GND; ENLDO = VIN) 2.60 2.65 2.702.75 2.80 2.852.90 100μS/div Output Voltage (V) -100 100 200 300 400500 Output Current (mA) VOUT IOUT LDO Line Transient Response (CBYP = 10nF; EN = GND; ENLDO = VIN) 2.98 2.99 3.00 3.01 3.023.033.04 100μs/div Input Voltage (V) 456 Output Voltage (V) VIN VOUT LDO Turn-On Time From Enable (VIN present) (CBYP = 10nF; EN = GND; ENLDO = VIN) 5μμs/div VIN = 4VVOUT = 1V/div VENLDO = 5V/div LDO Turn-Off Response Time (CBYP = 10nF; EN = GND; ENLDO = VIN) 50μs/div VENLDO (5V/div) VOUT (1V/div) AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 7

Unless otherwise noted, VIN = 5V, TA = 25°C. Step-Down Converter DC Regulation (VOUT = 1.8V; EN = VIN; ENLDO = GND) Output Current (mA) Output Error (%) -2.0 -1.0 0.0 1.02.0 0.1 1.0 10 100 1000 VIN = 2.7V VIN = 3.6V VIN = 4.2V Step-Down Converter Efficiency vs. Load (VOUT = 1.8V; EN = VIN; ENLDO = GND) Output Current (mA) Efficiency (%) 100 0.1 1.0 10 100 1000 VIN = 2.7V VIN = 3.6V VIN = 4.2V Step-Down Converter Load Regulation (VOUT = 2.5V; EN = VIN; ENLDO = GND) Output Current (mA) Output Error (%) -2.0 -1.0 0.0 1.0 2.0 0.1 1.0 10 100 1000 VIN = 3.0V VIN = 3.3V VIN = 3.6V Step-Down Converter Efficiency vs. Load (VOUT = 2.5V; EN = VIN; ENLDO = GND) Output Current (mA) Efficiency (%) 100 0.1 1.0 10 100 1000 VIN = 3.3V VIN = 3.6V VIN = 3.0V LDO ENLDO vs. VIN 1.050 1.075 1.100 1.125 1.150 1.175 1.200 1.2251.250 VIH VIL Over-Current Protection (EN = GND; ENLDO = VIN) Time (50ms/div) Output Current (mA) -200 200 400 600800 10001200 AAT2500 1MHz Step-Down Converter/LDO Regulator 8 2500.2006.05.1.16

Unless otherwise noted, VIN = 5V, TA = 25°C. Step-Down Converter N-Channel RDS(ON) vs. Input Voltage (EN = VIN; ENLDO = GND) Input Voltage (V) RDS(ON) (mΩΩ) 300 350400 450 500550600 650 700750 25°C 120°C 100°C 85°C Step-Down Converter P-Channel RDS(ON) vs. Input Voltage (EN = VIN; ENLDO = GND) Input Voltage (V) RDS(ON) (mΩΩ) 300 350400450 500 550 600 650700750 25°C 120°C 100°C 85°C Step-Down Converter Input Current vs. Input Voltage (VO = 1.8V; EN = VIN; ENLDO = GND) Input Voltage (V) Input Current (μμA) 85°C 25°C -40°C Step-Down Converter Switching Frequency vs. Temperature (VIN = 3.6V; VO = 1.5V; EN = VIN; ENLDO = GND) Temperature (°°C) Frequency Variation (%) -0.20 -0.10 0.00 0.100.20 -40 -20 0 20 40 60 80 100 Step-Down Converter Output Voltage Error vs. Temperature (VIN = 3.6V; VO = 1.5V; EN = VIN; ENLDO = GND) Temperature (°°C) Output Error (%) -2.0 -1.0 0.01.02.0 -40 -20 0 20 40 60 80 100 Step-Down Converter Frequency vs. Input Voltage (VOUT = 1.8V; EN = VIN; ENLDO = GND) Input Voltage (V) Frequency Variation (%) -2.0 -1.5 -1.0 -0.5 0.0 0.51.0 AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 9

Unless otherwise noted, VIN = 5V, TA = 25°C. Step-Down Converter Soft Start (VIN = 3.6V; VOUT = 1.8V; 400mA; EN = VIN; ENLDO = GND) Enable and Output Voltage (top) (V) Inductor Current (bottom) (A) 250μμs/div -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Step-Down Converter Line Regulation (VOUT = 1.8V; EN = VIN; ENLDO = GND) Input Voltage (V) Accuracy (%) -0.35 -0.3 -0.25 -0.2 -0.15 -0.1 -0.05 0.05 0.1 IOUT = 400mA IOUT = 100mA IOUT = 10mA Step-Down Converter Line Transient (VOUT = 1.8V @ 400mA; EN = VIN; ENLDO = GND) Output Voltage (top) (V) Input Voltage (bottom) (V) Time (25μμs/div) 1.50 1.55 1.601.65 1.70 1.751.801.851.90 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 Step-Down Converter Load Transient Response (30mA - 300mA; VIN = 3.6V; VOUT = 1.8V; C1 = 4.7μμF; EN = VIN; ENLDO = GND) Output Voltage (top) (V) Load and Inductor Current (200mA/div) (bottom) Time (25μs/div) 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 300mA 30mA Step-Down Converter Load Transient Response (30mA - 300mA; VIN = 3.6V; VOUT = 1.8V; C1 = 10μμF; C4 = 100pF; EN = VIN; ENLDO = GND) Output Voltage (AC Coupled) (top) (V) Load and Inductor Current (200mA/div) (bottom) Time (25μs/div) -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.1 0.0 1.2 1.4 0.8 0.6 1.0 0.2 0.4 -0.2 0.0 300mA 30mA Step-Down Converter Load Transient Response (30mA - 300mA; VIN = 3.6V; VOUT = 1.8V; C1 = 10μμF; EN = VIN; ENLDO = GND) Output Voltage (top) (V) Load and Inductor Current (200mA/div) (bottom) Time (25μs/div) 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -0.2 300mA 30mA AAT2500 1MHz Step-Down Converter/LDO Regulator 10 2500.2006.05.1.16

Unless otherwise noted, VIN = 5V, TA = 25°C. Step-Down Converter Output Ripple (VIN = 3.6V; VOUT = 1.8V; 400mA; EN = VIN; ENLDO = GND) Output Voltage (AC Coupled) (top) (mV) Inductor Current (bottom) (A) Time (250ns/div) -120 -100 -80 -60 -40 -20 2040 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.80.9 AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 11

1MHz Step-Down Converter/LDO Regulator 12 2500.2006.05.1.16 Functional Block Diagram Note: Internal resistor divider included for ≥1.2V versions. For low voltage versions, the feedback pin is tied directly to the error amplifier input. EN LX Error Amp. Logic DH DL PGND VP FB GND Voltage Reference Voltage Reference Error Amp. OUT Control Logic VLDO Fast Start ControlENLDO BYP SGND VCC See Note Over-Current Protection

1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 13 Functional Description The AAT2500 is a high performance power man- agement IC comprised of a buck converter and a linear regulator. The buck converter is a high effi- ciency converter capable of delivering up to 400mA. Designed to operate at 1.0MHz, the con- verter requires only three external components IN, C OUT, and L X) and is stable with a ceramic output capacitor. The linear regulator delivers 300mA and is also stable with ceramic capacitors. Linear Regulator The advanced circuit design of the linear regulator has been specifically optimized for very fast start- up and shutdown timing. This proprietary CMOS LDO has also been tailored for superior transient response characteristics. These traits are particu- larly important for applications that require fast power supply timing. The high-speed turn-on capability is enabled through implementation of a fast-start control cir- cuit, which accelerates the power-up behavior of fundamental control and feedback circuits within the LDO regulator. Fast turn-off time response is achieved by an active output pull-down circuit, which is enabled when the LDO regulator is placed in shutdown mode. This active fast shut- down circuit has no adverse effect on normal device operation. The LDO regulator output has been specifically optimized to function with low- cost, low-ESR ceramic capacitors; however, the design will allow for operation over a wide range of capacitor types. A bypass pin has been provided to allow the addi- tion of an optional voltage reference bypass capac- itor to reduce output self noise and increase power supply ripple rejection. Device self noise and PSRR will be improved by the addition of a small ceramic capacitor in this pin. However, increased values of C BYPASS may slow down the LDO regula- tor turn-on time. The regulator comes with com- plete short-circuit and thermal protection. The com- bination of these two internal protection circuits gives a comprehensive safety system to guard against extreme adverse operating conditions. The regulator features an enable/disable function. This pin (ENLDO) is active high and is compatible with CMOS logic. To assure the LDO regulator will switch on, the ENLDO turn-on control level must be greater than 1.5V. The LDO regulator will go into the disable shutdown mode when the voltage on the EN pin falls below 0.6V. If the enable function is not needed in a specific application, it may be tied to V IN to keep the LDO regulator in a continuously on state. When the regulator is in shutdown mode, an inter- nal 1.5kΩ resistor is connected between OUT and GND. This is intended to discharge COUT when the LDO regulator is disabled. The internal 1.5K Ω resistor has no adverse impact on device turn-on time. Step-Down Converter The AAT2500 buck is a constant frequency peak current mode PWM converter with internal com- pensation. It is designed to operate with an input voltage range of 2.7V to 5.5V. The output voltage ranges from 0.6V to the input voltage for the inter- nally fixed version, and up to 2.5V for the external- ly adjustable version. The 0.6V fixed model shown in Figure 1 is also the adjustable version and is externally programmable with a resistive divider, as shown in Figure 2. The converter MOSFET power stage is sized for 400mA load capability with up to 96% efficiency. Light load efficiency exceeds 80% at a 500µA load. Soft Start The AAT2500 soft-start control prevents output voltage overshoot and limits inrush current when either the input power or the enable input is applied. When pulled low, the enable input forces the converter into a low-power, non-switching state with a bias current of less than 1µA.

1MHz Step-Down Converter/LDO Regulator 14 2500.2006.05.1.16 Low Dropout Operation For conditions where the input voltage drops to the output voltage level, the converter duty cycle increases to 100%. As 100% duty cycle is approached, the minimum off-time initially forces the high side on-time to exceed the 1MHz clock cycle and reduce the effective switching frequency. Once the input drops below the level where the out- put can be regulated, the high side P-channel MOSFET is turned on continuously for 100% duty cycle. At 100% duty cycle, the output voltage tracks the input voltage minus the IR drop of the high side P-channel MOSFET R DS(ON). Low Supply The under-voltage lockout (UVLO) guarantees suf- ficient V IN bias and proper operation of all internal circuitry prior to activation. Fault Protection For overload conditions, the peak inductor current is limited. Thermal protection disables switching when the internal dissipation or ambient temperature becomes excessive. The junction over-temperature threshold is 140°C with 15°C of hysteresis. Applications Information Linear Regulator Input and Output Capacitors: An input capacitor is not required for basic operation of the linear reg- ulator. However, if the AAT2500 is physically locat- ed more than three centimeters from an input power source, a C IN capacitor will be needed for stable operation. Typically, a 1µF or larger capaci- tor is recommended for C IN in most applications. CIN should be located as closely to the device V IN pin as practically possible. An input capacitor greater than 1µF will offer supe- rior input line transient response and maximize power supply ripple rejection. Ceramic, tantalum, or aluminum electrolytic capacitors may be select- ed for C IN. There is no specific capacitor ESR requirement for CIN. However, for 300mA LDO reg- ulator output operation, ceramic capacitors are rec- ommended for C IN due to their inherent capability over tantalum capacitors to withstand input current surges from low impedance sources such as bat- teries in portable devices. For proper load voltage regulation and operational stability, a capacitor is required between OUT and GND. The C OUT capacitor connection to the LDO regulator ground pin should be made as directly as practically possible for maximum device perform- ance. Since the regulator has been designed to function with very low ESR capacitors, ceramic capacitors in the 1.0µF to 10µF range are recom- mended for best performance. Applications utilizing Figure 1: AAT2500 Fixed Output. Figure 2: AAT2500 with Adjustable Step-Down Output and Enhanced Transient Response. 4.7μF VIN 59k R24.7μF 10μF 10nF VOUTLDO VOUTBUCK 100pF C8PGND LX VP VCC ENLDO EN FB SGND VLDO OUT GND BYP AAT2500U1 4.7μF VOUTBUCK VIN 4.7μF 10μF 10nF VOUTLDO PGND LX VP VCC ENLDO EN FB SGND VLDO OUT GND BYP AAT2500

the exceptionally low output noise and optimum power supply ripple rejection should use 2.2µF or greater for C OUT. In low output current applications, where output load is less than 10mA, the minimum value for C OUT can be as low as 0.47µF. Equivalent Series Resistance: ESR is a very important characteristic to consider when selecting a capacitor. ESR is the internal series resistance asso- ciated with a capacitor that includes lead resistance, internal connections, size and area, material compo- sition, and ambient temperature. Typically, capacitor ESR is measured in milliohms for ceramic capaci- tors and can range to more than several ohms for tantalum or aluminum electrolytic capacitors. Bypass Capacitor and Low Noise A bypass capacitor pin is provided to enhance the low noise characteristics of the LDO. The bypass capacitor is not necessary for operation; however, for best device performance, a small ceramic capacitor in the range of 470pF to 10nF should be placed between the bypass pin (BYP) and the device ground pin (GND). To practically realize the highest power supply ripple rejection and lowest output noise performance, it is critical that the capacitor connection between the BYP pin and GND pin be direct and PCB traces should be as short as possible. DC leakage on this pin can affect the LDO regula- tor output noise and voltage regulation perform- ance. For this reason, the use of a low leakage, high quality ceramic (NPO or C0G type) or film capacitor is highly recommended. Step-Down Converter Inductor Selection: The step-down converter uses peak current mode control with slope com- pensation to maintain stability for duty cycles greater than 50%. The output inductor value must be selected so the inductor current down slope meets the internal slope compensation require- ments. The internal slope compensation for the adjustable and low-voltage fixed versions of the AAT2500 is 0.24A/µsec. This equates to a slope compensation that is 75% of the inductor current down slope for a 1.5V output and 4.7µH inductor. This is the internal slope compensation for the adjustable (0.6V) version or low-voltage fixed ver- sions. When externally programming the 0.6V ver- sion to 2.5V, the calculated inductance is 7.5µH. In this case, a standard 10µH value is selected. For high-voltage fixed versions (2.5V and above), m = 0.48A/µsec. Table 1 displays inductor values for the AAT2500 fixed and adjustable options. 0.75 ⋅ VO L = = ≈ 3 ⋅ VO = 3 ⋅ 2.5V = 7.5μH m 0.75 ⋅ VO 0.24A μsec A μsec A A μsec 0.75 ⋅ VO m = = = 0.24 L 0.75 ⋅ 1.5V 4.7μH A μsec AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 15 Table 1: Inductor Values. Configuration Output Voltage Inductor Slope Compensation External Resistive Divider 2.5V 10µH 0.24A/µsec Fixed Output 0.6V to 2.0V 4.7µH 0.24A/µsec 2.5V to 3.3V 4.7µH 0.48A/µsec

1MHz Step-Down Converter/LDO Regulator 16 2500.2006.05.1.16 Manufacturer's specifications list both the inductor DC current rating, which is a thermal limitation, and the peak current rating, which is determined by the saturation characteristics. The inductor should not show any appreciable saturation under normal load conditions. Some inductors may meet the peak and average current ratings yet result in excessive loss- es due to a high DCR. Always consider the losses associated with the DCR and its effect on the total converter efficiency when selecting an inductor. The 4.7µH CDRH3D16 series inductor selected from Sumida has a 105mΩ DCR and a 900mA DC current rating. At full load, the inductor DC loss is 17mW which gives a 2.8% loss in efficiency for a 400mA, 1.5V output. Input Capacitor Select a 4.7µF to 10µF X7R or X5R ceramic capac- itor for the input. To estimate the required input capacitor size, determine the acceptable input rip- ple level (V PP) and solve for C. The calculated value varies with input voltage and is a maximum when V IN is double the output voltage. Always examine the ceramic capacitor DC voltage coefficient characteristics when selecting the prop- er value. For example, the capacitance of a 10µF, 6.3V, X5R ceramic capacitor with 5.0V DC applied is actually about 6µF. The maximum input capacitor RMS current is: The input capacitor RMS ripple current varies with the input and output voltage and will always be less than or equal to half of the total DC load current. for V IN = 2 x VOBUCK The term appears in both the input voltage ripple and input capacitor RMS cur- rent equations and is a maximum when V OBUCK is twice VIN. This is why the input voltage ripple and the input capacitor RMS current ripple are a maxi- mum at 50% duty cycle. The input capacitor provides a low impedance loop for the edges of pulsed current drawn by the AAT2500. Low ESR/ESL X7R and X5R ceramic capacitors are ideal for this function. To minimize stray inductance, the capacitor should be placed as closely as possible to the IC. This keeps the high frequency content of the input current localized, minimizing EMI and input voltage ripple. The proper placement of the input capacitor (C2) can be seen in the evaluation board layout in Figure 3. A laboratory test set-up typically consists of two long wires running from the bench power supply to the evaluation board input voltage pins. The induc- tance of these wires, along with the low-ESR ceramic input capacitor, can create a high Q net- work that may affect converter performance. This problem often becomes apparent in the form of excessive ringing in the output voltage during load transients. Errors in the loop phase and gain meas- urements can also result. Since the inductance of a short PCB trace feeding the input voltage is significantly lower than the power leads from the bench power supply, most applications do not exhibit this problem. VOBUCK VIN VOBUCK VIN IOBUCK RMS(MAX)I 2= VOBUCK VIN VOBUCK VIN VOBUCK VIN VOBUCK VIN CIN(MIN) = 1 VPP IOBUCK ⎛⎞ · 1 - = for VIN = 2 × VOBUCK⎝⎠ VOBUCK VIN VOBUCK VIN VOBUCK VIN CIN = VOBUCK VIN VPP IOBUCK

In applications where the input power source lead inductance cannot be reduced to a level that does not affect the converter performance, a high ESR tantalum or aluminum electrolytic should be placed in parallel with the low ESR, ESL bypass ceramic. This dampens the high Q network and stabilizes the system. Output Capacitor The output capacitor limits the output ripple and provides holdup during large load transitions. A 4.7µF to 10µF X5R or X7R ceramic capacitor typi- cally provides sufficient bulk capacitance to stabi- lize the output during large load transitions and has the ESR and ESL characteristics necessary for low output ripple. The output voltage droop due to a load transient is dominated by the capacitance of the ceramic out- put capacitor. During a step increase in load cur- rent, the ceramic output capacitor alone supplies the load current until the loop responds. Within two or three switching cycles, the loop responds and the inductor current increases to match the load current demand. The relationship of the output volt- age droop during the three switching cycles to the output capacitance can be estimated by: Once the average inductor current increases to the DC load level, the output voltage recovers. The above equation establishes a limit on the minimum value for the output capacitor with respect to load transients. The internal voltage loop compensation also limits the minimum output capacitor value to 4.7µF. This is due to its effect on the loop crossover frequency (bandwidth), phase margin, and gain margin. Increased output capacitance will reduce the crossover frequency with greater phase margin. The maximum output capacitor RMS ripple current is given by: Dissipation due to the RMS current in the ceramic output capacitor ESR is typically minimal, resulting in less than a few degrees rise in hot-spot temperature. Adjustable Output Resistor Selection For applications requiring an adjustable output volt- age, the 0.6V version can be externally pro- grammed. Resistors R1 and R2 of Figure 5 program the output to regulate at a voltage higher than 0.6V. To limit the bias current required for the external feedback resistor string while maintaining good noise immunity, the minimum suggested value for VOUT · (VIN(MAX) - VOUT) RMS(MAX)I L · F · VIN(MAX) COUT = 3 · ΔILOAD VDROOP · FS AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 17 Figure 3: AAT2500 Evaluation Board Top Side. Figure 4: AAT2500 Evaluation Board Bottom Side.

1MHz Step-Down Converter/LDO Regulator 18 2500.2006.05.1.16 R2 is 59k Ω. Although a larger value will further reduce quiescent current, it will also increase the impedance of the feedback node, making it more sensitive to external noise and interference. Table 2 summarizes the resistor values for various output voltages with R2 set to either 59k Ω for good noise immunity or 221kΩ for reduced no load input current. The adjustable version of the AAT2500, combined with an external feedforward capacitor (C8 in Figures 2 and 5), delivers enhanced transient response for extreme pulsed load applications. The addition of the feedforward capacitor typically requires a larger output capacitor C1 for stability. Table 2: Adjustable Resistor Values For Use With 0.6V Step-Down Converter. R2 = 59kΩΩ R2 = 221kΩΩ VOUT (V) R1 (k ΩΩ) R1 (k ΩΩ) 0.8 19.6 75 0.9 29.4 113 1.0 39.2 150 1.1 49.9 187 1.2 59.0 221 1.3 68.1 261 1.4 78.7 301 1.5 88.7 332 1.8 118 442 1.85 124 464 2.0 137 523 2.5 187 715 VOUT VREF 1.5V 0.6V Figure 5: AAT2500 Evaluation Board Schematic. 1. For step-down converter, enhanced transient configuration C8 = 100pF and C1 = 10uF. Table 3 4.7μF1 10μF GND VIN1 Buck Enable LX1 GND Table 3 59k R2PGND LX VP VCC ENLDO EN FB SGND IN OUT GND BYP AAT2500 4.7μF C410μF 10nF LDO Enable VOUTLDO VOUTBUCK LDO Input 0.01μF C81 n/a

There are three types of losses associated with the AAT2500 step-down converter: switching losses, conduction losses, and quiescent current losses. Conduction losses are associated with the R DS(ON) characteristics of the power output switching devices. Switching losses are dominated by the gate charge of the power output switching devices. At full load, assuming continuous conduction mode (CCM), a simplified form of the step-down convert- er and LDO losses is given by: I QBUCK is the step-down converter quiescent cur- rent and I QLDO is the LDO quiescent current. The term tsw is used to estimate the full load step-down converter switching losses. For the condition where the buck converter is in dropout at 100% duty cycle, the total device dissi- pation reduces to: Since R DS(ON), quiescent current, and switching losses all vary with input voltage, the total losses should be investigated over the complete input voltage range. Given the total losses, the maximum junction tem- perature can be derived from the θ JA for the TDFN/STDFN33-12 package which is 50°C/W. PCB Layout The following guidelines should be used to ensure a proper layout. 1. The input capacitor C2 should connect as closely as possible to VP and PGND, as shown in Figure 4. 2. The output capacitor and inductor should be connected as closely as possible. The connec- tion of the inductor to the LX pin should also be as short as possible. 3. The feedback trace should be separate from any power trace and connect as closely as possible to the load point. Sensing along a high-current load trace will degrade DC load regulation. If external feedback resistors are used, they should be placed as closely as pos- sible to the FB pin. This prevents noise from being coupled into the high impedance feed- back node. 4. The resistance of the trace from the load return to GND should be kept to a minimum. This will help to minimize any error in DC regulation due to differences in the potential of the internal sig- nal ground and the power ground. 5. For good thermal coupling, PCB vias are required from the pad for the TDFN/STDFN pad- dle to the ground plane. The via diameter should be 0.3mm to 0.33mm and positioned on a 1.2mm grid. 6. LDO bypass capacitor (C5) should be connected directly between pins 7 (BYP) and 8 (GND) TJ(MAX) = PTOTAL · ΘJA + TAMB PTOTAL = IOBUCK 2 · RDSON(HS) + IOLDO · (VIN - VOLDO) + (IQBUCK + IQLDO) · VIN PTOTAL IOBUCK 2 · (RDSON(HS) · VOBUCK + RDSON(LS) · [VIN - VOBUCK]) VIN + (tsw · F · IOBUCK + IQBUCK + IQLDO) · VIN + IOLDO · (VIN - VOLDO) AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 19

Step-Down Converter Design Example Specifications VOBUCK = 1.8V @ 400mA (adjustable using 0.6V version), Pulsed Load ΔILOAD = 300mA VOLDO = 3.3V @ 300mA VIN = 2.7V to 4.2V (3.6V nominal) FS = 1.0MHz TAMB = 85°C 1.8V Buck Output Inductor (see Table 1) For Sumida inductor CDRH3D16, 4.7µH, DCR = 105m Ω. 1.8V Output Capacitor VDROOP = 0.2V 4.7μH · 1.0MHz · 4.2V 23 RMSI L1 · F · VIN(MAX) = · 3 · ΔILOAD VDROOP · FS 3 · 0.3A 0.2V · 1MHz COUT = = = 4.5 μF

  • = 63mArms (VOBUCK) · (VIN(MAX) - VOBUCK) = Pesr = esr · IRMS 2 = 5mΩ · (63mA)2 = 20μW IPKL1 = IOBUCK + ΔIL1 PL1 = IOBUCK 2 ⋅ DCR = 0.4A2 ⋅ 105mΩ = 17mW L1 = 3 ⋅ VO2 = 3 ⋅ 1.8V = 5.4μHμsec A μsec A AAT2500 1MHz Step-Down Converter/LDO Regulator 20 2500.2006.05.1.16

Input Ripple VPP = 25mV AAT2500 Losses TJ(MAX) = TAMB + ΘJA · PLOSS = 85°C + (50°C/W) · 392mW = 105°C PTOTAL + (tsw · F · IOBUCK + IQBUCK + IQLDO) · VIN + (VIN - VLDO) · ILDO IOBUCK 2 · (RDSON(HS) · VOBUCK + RDSON(LS) · [VIN - VOBUCK]) VIN 4.2V IOBUCK RMSI P = esr · IRMS 2= = 0.2Arms CIN = = = 4.75 μF1 VPP IOBUCK 25mV 0.4A AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 21

Table 3: Evaluation Board Component Values. Table 4: Typical Surface Mount Inductors. Inductance Max DC DCR Size (mm) Manufacturer Part Number (µH) Current (A) ( ΩΩ) LxWxH Type VOUT (V) R1 (k ΩΩ) R1 (k ΩΩ) L1 (µH) Adjustable Version R2 = 59kΩΩ R2 = 221kΩΩ11 (0.6V device) 0.8 19.6 75.0 4.7 0.9 29.4 113 4.7 1.0 39.2 150 4.7 1.1 49.9 187 4.7 1.2 59.0 221 4.7 1.3 68.1 261 4.7 1.4 78.7 301 4.7 1.5 88.7 332 4.7 1.8 118 442 4.7 1.85 124 464 4.7 2.0 137 523 4.7 or 6.8 2.5 187 715 10 VOUT (V) R1 (k ΩΩ) L1 (µH) Fixed Version R2 Not Used 0.6-3.3V 0 4.7 AAT2500 1MHz Step-Down Converter/LDO Regulator 22 2500.2006.05.1.16 1. For reduced quiescent current R2 = 221k Ω.

Table 5: Surface Mount Capacitors. Manufacturer Part Number Value Voltage Temp. Co. Case MuRata GRM21BR61A475KA73L 4.7µF 10V X5R 0805 MuRata GRM18BR60J475KE19D 4.7µF 6.3V X5R 0603 MuRata GRM21BR60J106KE19 10µF 6.3V X5R 0805 MuRata GRM21BR60J226ME39 22µF 6.3V X5R 0805 AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 23

Ordering Information

All AnalogicTech products are offered in Pb-free packaging. The term “Pb-free” means Voltage Package Buck Converter LDO Marking1 Part Number (Tape and Reel)2 STDFN33-123 Adj - 0.6V 2.8V OAXYY AAT2500IFP-AQ-T1 TDFN33-12 Adj - 0.6V 3.3V NZXYY AAT2500IWP-AW-T1 TDFN33-12 Adj - 0.6V 3.0V NYXYY AAT2500IWP-AT-T1 TDFN33-12 Adj - 0.6V 2.8V OAXYY AAT2500IWP-AQ-T1 TDFN33-12 Adj - 0.6V 2.7V ORXYY AAT2500IWP-AP-T1 TDFN33-12 Adj - 0.6V 2.5V OOXYY AAT2500IWP-AN-T1 TDFN33-12 Adj - 0.6V 1.8V ONXYY AAT2500IWP-AI-T1 TDFN33-12 Adj - 0.6V 1.5V OMXYY AAT2500IWP-AG-T1 TDFN33-12 1.2V 3.0V OWXYY AAT2500IWP-ET-T1 TDFN33-12 1.8V 2.7V PFXYY AAT2500IWP-IP-T1 TDFN33-12 1.8V 3.3V SHXYY AAT2500IWP-IW T1 AAT2500 1MHz Step-Down Converter/LDO Regulator 24 2500.2006.05.1.16 Legend Voltage Code Adjustable A(0.6V) 0.9 B 1.2 E 1.5 G 1.8 I 1.9 Y 2.5 N 2.6 O 2.7 P 2.8 Q 2.85 R 2.9 S 3.0 T 3.3 W 4.2 C 1. XYY = assembly and date code. 2. Sample stock is generally held on part numbers listed in BOLD. 3. Contact Sales for availability.

Package Information

All dimensions in millimeters. Top View Bottom View Detail "B" Detail "A"Side View 3.00 ± 0.05 Index Area (D/2 x E/2) Detail "A" Detail "B" 1.70 ± 0.05 3.00 ± 0.05 0.05 ± 0.05 0.229 ± 0.051 7.5° ± 7.5° 2.40 ± 0.05 0.16 Pin 1 Indicator (optional) 0.075 ± 0.075

0.1 REF

0.8 + 0.05 -0.20 Option A: C0.30 (4x) max Chamfered corner Option B: R0.30 (4x) max Round corner AAT2500 1MHz Step-Down Converter/LDO Regulator 2500.2006.05.1.16 25

All dimensions in millimeters. 0.35 ± 0.10 0.075 ± 0.075 (Optional) Pin 1 Indicator (Optional) C0.30 (4x) Max Chamfered Corner (Optional)

0.16 MIN

0.152 7.5° ± 7.5° 0.05 ± 0.05

0.60 MAX

3.00 ± 0.05Detail "A" Index Area (D/2 × E2) Detail "B" 1.70 ± 0.05 3.00 ± 0.05 2.40 ± 0.05 Top View Side View Detail "A" Detail "B" Bottom View AAT2500 1MHz Step-Down Converter/LDO Regulator 26 2500.2006.05.1.16 Advanced Analogic Technologies, Inc. 830 E. Arques Avenue, Sunnyvale, CA 94085 Phone (408) 737-4600 Fax (408) 737-4611 © Advanced Analogic Technologies, Inc. AnalogicTech cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an AnalogicTech product. No circuit patent licenses, copyrights, mask work rights, or other intellectual property rights are implied. AnalogicTech reserves the right to make changes to their products or specifications or to discontinue any product or service without notice. Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold sub- ject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. AnalogicTech warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with AnalogicTech’s standard warranty. Testing and other quality con- trol techniques are utilized to the extent AnalogicTech deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed. AnalogicTech and the AnalogicTech logo are trademarks of Advanced Analogic Technologies Incorporated. All other brand and produ ct names appearing in this document are regis- tered trademarks or trademarks of their respective holders.