A3P600 ACTEL | Alldatasheet
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Features
1-bit/4-bit modes of SD, MMC and SDIO supported 8-bit Generic CPU interface Both DMA and Interrupt mode is supported for Data transfer Command buffers to store command index and argument Any byte size transfers supported. Sector size can be set from 1 byte to 2048 bytes CRC generation / checking supported for both command and data transactions Compliant with SDIO specification version 1.1 Compliant with SD specification version 1.1 Compliant with MMC specification version 2.0 Using the SD/SDIO/MMC communication protocol, one SDIO or SD or MMC card is supported Card Detection / Removal support Write protect using mechanical switch Interrupts for errors Contact Us India: iWave Systems Technologies Pvt. Ltd., 7/B, 29th Main, BTM Layout 2nd Stage, Bangalore 560 076. INDIA Ph : +91-80-26683700, 26786245, Fax : +91-80-26685200 Email : , Web : Japan: iWave Systems Technologies, 8F Kannai Sumiyoshi Building 3-29, Sumiyoshi-cho, Naka-ku, Yokohama Kanagawa, Japan. Ph : +81-45-227-7626, Fax : +81-45-227-7646, Email : , Web : mktg@iwavesystems.com www.iwavesystems.com jp-mktg@iwavesystems.com www.iwavesystems.com/japan Deliverables Technical Specification RTL Verilog Synthesizable Code Comprehensive Test Environment Technical Support and Maintenance Core Application Used as Host controller for SD, MMC and SDIO cards Core Benefits Eases SOC integration Configurable for ease of use CPU SD/MMC/ SDIO Card COMMAND PATH DATA PATH CPU Interface Command Tx-Rx Command Path FSM Command Shifter CRC Gen / Checker Data Path FSM Data Tx-Rx Data Shifter CRC Gen / Checker Data FIFO Clock Logic Response FIFO COMMAND PATH DATA PATH CPU Interface Command Tx-Rx Command Path FSM Command Shifter CRC Gen / Checker Data Path FSM Data Tx-Rx Data Shifter CRC Gen / Checker Data FIFO Clock Logic Response FIFO iW-SD Controller is an interface between any 8-bit processor and the SD/ MMC/ SDIO card. The interface towards the SD card is realized by the SD protocol implemented in the controller. The main blocks in the controller are CPU interface, command path state machine, command transmitter/ receiver, data path state machine, data transmit/receive and clock logic. Note : The above values are for 32-bit generic CPU interface. Overview Resource Utilization Summary Bus Interface Actel Family D evice Tiles C ore Utilization I/O C ells RAM Utilization Frequency Power ProA SIC3 A 3P600 3449 24.95% 57 37.50% 20 M H z 75.112 mW IG LO O A G L600 3570 25.82% 57 37.50% 20 M H z 73.149 mW S D 1.1/ S D IO 1.1/ MMC 2.0 D C n lle iW o tro r Block Diagram iW-SD Controller