A2C33648

A2C33648 INFINEON | Alldatasheet

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Technical content

Features

• Triple Voltage Regulator  Output Voltage 5 V with 450 mA Current Capability  Two tracked Outputs for 50 mA and 100 mA  Enable Function for main and tracked Output(s)  Reset with adjustable Threshold  Undervoltage- and Power On-Reset  Watchdog  Independent Watchdog- and Resetdelay  Wide Temperature Range  Overtemperature Protection  Overvoltage Protection  Reverse Polarity Proof New type /G01 Fun Aescription The A2C33648 is a monolithic integrated very low-drop triple voltage regulator. The deimain output supplies loads up to 450 mA and the additional tracked outputs can prov up to 50 mA and 100 mA. In addition the device includes a watchdog for microcontroller-supervision, an under-voltage reset, a power on reset and extended enabling features. The watchdog and reset timing can be chosen independently of each other. The A2C33648 is available in the P-DSO-20-12 power package. It is designed to supply microprocessor systems under the severe condition of automotive applications and therefore it is equipped with additional protection against overload, short circuit and . overtemperature. Of course the A2C33648 can be used in other applications as well .The A2C33648 operates in the temperature range of Tj = – 40 to 150 °C Type Ordering Code Package A2C33648 /G01 Q67007-A9438 P-DSO-20-12 (SMD)

Data Sheet Rev. 1.1 2 2001-09-06 Figure 1 Block Diagram AES02864 A2C33648 Self Protection - Over Temperature - Shor t Circuit - Re verse Polarity Proof ESD Protection Tracker 1 Tracker 2 ≥1E1 I EN REF2 REF3Reference Voltage 50 mA, ±0.5% Tracking Reference Voltage 100 mA, ±0.5% Tracking

5 V ±2%, 450 mA

R DR RADJ WatchdogW DW Main Regulator

Data Sheet Rev. 1.1 3 2001-09-06 A2C33648 Figure 2 Pin Configuration (top view) Pin Definitions and Functions Pin No. Symbol Function 1, 10, 11, GND GROUND 2E 1 Enable 1: Enable for Main Output Q1 and Q2; E1, E2 and E3 are ored together; connect to GND, if not needed. 3I Input; block to ground directly at the IC for line compensation. 4Q 2 Tracking Output Q2; block to GND with min. 10µF with ESR < 3 Ω . 5R E F 2 Reference Output; Reference Voltage related to Q2. 6R Reset Output; the open collector Output is connected to Q1 via an integrated resistor. 7D R Reset Delay; connect a capacitor to GND for reset delay time adjustment. 8E 2 Enable 2: Enable for Main Output Q1 and Q2; E1, E2 and E3 are ored together; connect to GND, if not needed. 9Q 1 Main Output Q1; block to GND with min. 22µF, ESR < 3 Ω .

12 RADJ Reset Switching Threshold Adjust; The reset threshold can be

set individually with an external voltage divider at the pin. If it is connected straight to GND the reset threshold remains at 4.65 V.

13 NC Not Connected

I REF2 DR Q1 9 10GND GND GND DW W EN GND RADJ N.C. REF3

Data Sheet Rev. 1.1 4 2001-09-06

14 EN Enable Input; enables Q3

15 REF3 Reference Output; Reference Voltage related to Q3.

16 E3 Enable 3: Enable for Main Output Q1 and Q2; E1, E2 and E3 are

ored together; connect to GND, if not needed. 17 Q3 Tracker Output Q3; block to GND with min. 10µF with ESR < 3 Ω .

18 W Watchdog Trigger Input; positive edge triggered input for

monitoring a microcontroller.

19 DW Watchdog Delay; connect a capacitor to GND for watchdog

trigger time adjustment. Pin Definitions and Functions (cont’d) Pin No. Symbol Function

Data Sheet Rev. 1.1 5 2001-09-06 A2C33648 Absolute Maximum Ratings Tj= – 40 to 150°C Parameter Symbol Limit Values Unit Notes min. max. Input I Input voltage VI – 45 V V t < 400 ms Main Output Q1 Output voltage VQ1 – 0.3 7 V – Output current IQ1 ––mA internally limited Tracking Output Q2 Output voltage VQ2 – 22 7 V – Output current IQ2 ––mA internally limited Tracking Output Q3 Output voltage VQ3 – 22 7 V – Output current IQ3 – 5 – mA internally limited Enable Input E1 Input voltage VE1 – 0.3 16 V – Input current IE1 – 20 20 mA – Enable Input E2 Input voltage VE2 – 0.3 6.5 V – Input current IE2 ––mA internally limited Enable Input E3 Input voltage VE3 – 0.3 16 V – Input current IE3 – 20 20 mA –

Data Sheet Rev. 1.1 6 2001-09-06 Enable Input EN Input voltage VEN – 0.3 7 V – Input current IEN ––mA internally limited Reference Output REF2 Output voltage VREF2 – 0.3 4.5 V – Output current IREF2 ––mA – Reference Output REF3 Output voltage VREF3 – 0.3 4.5 V – Output current IREF3 ––mA – Reset Adjust Input RADJ Input Voltage VRADJ – 0.3 7 V – Input Current IRADJ ––mA internally limited Reset Delay DR Voltage VDR – 0.3 7 V – Reset Output R Voltage VR – 0.3 7 V – Absolute Maximum Ratings (cont’d) Tj= – 40 to 150°C Parameter Symbol Limit Values Unit Notes min. max.

Data Sheet Rev. 1.1 7 2001-09-06 A2C33648 Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Watchdog Delay DW Voltage VDW – 0.3 7 V – Watchdog Input W Input voltage VW – 0.3 7 V – Input current IW ––mA – Temperature Junction temperature Tj – 50 150 °C – Storage temperature TStg – 65 150 °C – Thermal Data Junction-ambient Rthja ––K/W – Rthjp – 4K / W – ESD Human Body Model –– 22 k V – Absolute Maximum Ratings (cont’d) Tj= – 40 to 150°C Parameter Symbol Limit Values Unit Notes min. max.

Data Sheet Rev. 1.1 8 2001-09-06 Note: In the operating range, the functions given in the circuit description are fulfilled. Operating Range Parame ter Symbol Limit Values Unit Notes min. max. Input voltage VI 5.5 40 V – Junction temperature Tj – 40 150 °C – Shutdown voltage threshold Vshut – 44 V –

Data Sheet Rev. 1.1 9 2001-09-06 A2C33648 Characteristics VI= 13.5 V; Tj= – 40 °C < Tj< 125 °C Parameter Symbol Limit Values Unit Measuring Condition min. typ. max. Main Output Q1 Output voltage VQ1 4.9 5.0 5.1 V 10 mA < IQ1 < 450 mA,

5.5 V < VI < 19 V

Output voltage VQ1 4.8 5.0 5.2 V 10 mA < IQ1 < 300 mA;

5.5 V < VI < 28 V

Output voltage VQ1 4.8 5.0 5.2 V 10 mA < IQ1 < 200 mA;

5.5 V < VI < 40 V

Output current limitIQ1 550 – 1500 mA VQ1 = 0.1 V Output voltage dropVDR – 0.25 0.55 V IQ1 = 450 mA1) Line regulation ∆VQ1 – 25 – 25 mV 8 V ≤ VI ≤ 16 V; IQ1 = 10 mA Load regulation ∆VQ1 – 25 – 25 mV 10 mA < IQ1 < 450 mA; VI=7V Power Supply Ripple Rejection PSRR 30 –– dB C Q1 =2 2µF;

20 Hz< fr < 20 kHz;

VSS =0 . 5V Output capacitor C Q1 22 –– µF – ESR of output capacitor ESR –– 3 Ω at 10 kHz 1) Measured when the output voltage VQ dropped 100 mV from the nominal value.

Data Sheet Rev. 1.1 10 2001-09-06 Tracked Output Q2 Output voltage tracking accuracy ∆VQ2 = VQ2 – VQ1 – 25 – 25 mV 5.7 V < VI < 19 V; 1m A < IQ2 < 100 mA Output voltage tracking accuracy ∆VQ2 = VQ2 – VQ1 – 25 – 25 mV 5.7 V < VI < 28 V; 1m A < IQ2 < 80 mA Output voltage tracking accuracy ∆VQ2 = VQ2 – VQ1 – 25 – 25 mV 5.7 V < VI < 40 V; 1m A < IQ2 < 50 mA Output current limitIQ2 110 –– mA VQ2 = 0.1 V Output voltage dropVDR2 –– 0.6 V IQ2 = 100 mA Power Supply Ripple Rejection PSRR 30 –– dB 20 Hz < fr < 20 kHz; VPP = 0.5 V; C Q2 = 10µF Output capacitor C Q2 10 –– µF – ESR of output capacitor ESR –– 3 Ω at 10 kHz Tracked Output Q3 Output voltage tracking accuracy ∆VQ3 = VQ3 – VQ1 – 25 – 25 mV 5.7 V < VI < 19 V; 1m A < IQ3 < 50 mA Output voltage tracking accuracy ∆VQ3 = VQ3 – VQ1 – 25 – 25 mV 5.7 V < VI < 28 V; 1m A < IQ3 < 40 mA Output voltage tracking accuracy ∆VQ3 = VQ3 – VQ1 – 25 – 25 mV 5.7 V < VI < 40 V; 1m A < IQ3 < 25 mA Output current limitIQ3 55 – 150 mA VQ3 = 0.1 V Output voltage dropVDR3 –– 0.6 V 1 mA ≤ IQ3 ≤ 50 mA Power Supply Ripple Rejection PSRR 30 –– dB 20 Hz < fr < 20 kHz; VPP = 0.5 V; C Q3 = 10µF Output capacitor C Q3 10 – µF – ESR of output capacitor ESR –– 3 Ω at 10 kHz Characteristics (cont’d) VI= 13.5 V; Tj= – 40 °C < Tj< 125 °C Parameter Symbol Limit Values Unit Measuring Condition min. typ. max.

Data Sheet Rev. 1.1 11 2001-09-06 A2C33648 Matching error between VQ2 and VQ3 ∆VQ2,3 = VQ3 – VQ2 – 25 – 25 mV – Current Consumption Quiescent current (standby) Iq –– 20 µA Q1 OFF, Q2 OFF; Q3 OFF; Current consumption; Iq = II– IQ Iq – 1100 – µA Q3 OFF, IQ1 < 1m A ; IQ2 < 1 mA; Current consumption; Iq = II– IQ Iq – 1800 – µA IQ1 < 10 mA; IQ2 < 1 mA; IQ3 < 1 mA; Characteristics (cont’d) VI= 13.5 V; Tj= – 40 °C < Tj< 125 °C Parameter Symbol Limit Values Unit Measuring Condition min. typ. max.

Data Sheet Rev. 1.1 12 2001-09-06 Enable Function E1, E2, E3, EN E1 Off threshold VE1, off 1.5 – 2.5 V – E1 High input currentIE1, on – 50 – µA VE1 = 16 V E1 Low input currentIE1, off – 1 – 5 µA VE1 = 0 V E2 Off threshold VE2, off 0.8 1.2 1.7 V – E2 resistance to GNDRE2 51 5 4 0 k Ω – E3 On threshold VE3, on 3.5 – 4.5 V VQ1 > 4.8 V; VQ2 > 4.8 V E3 Off threshold VE3, off 1.5 – 2.5 V – E3 High input currentIE3, on – 50 – µA VE3 = 16 V E3 Low input currentIE3, off – 1 – 5 µA VE3 = 0 V EN On threshold VEN, on 1.0 1.7 2.3 V VQ3 > 4.8 V; Q1 ON EN Off threshold VEN, off 0.8 1.2 1.7 V VQ3 < 0.1 V Enable resistance to GND REN 51 5 4 0 k Ω – Characteristics (cont’d) VI= 13.5 V; Tj= – 40 °C < Tj< 125 °C Parameter Symbol Limit Values Unit Measuring Condition min. typ. max.

Data Sheet Rev. 1.1 13 2001-09-06 A2C33648 Reset Generator Switching thresholdVQ, rth 4.5 4.65 4.8 V RADJ connected to GND Reset headroom Vhead 250 350 500 mV 10 mA < IQ1 < 450 mA Reset pullup RR 2.4 – 6k Ω – Reset output low voltage VR, low –– 0.4 V 1 V < VQ1 < VQ, rth Reset output Low voltage VR, low –– 0.4 V VQ1 = 1 V, IR = 50 µA Reset output High voltage VR, high 4.5 –– V – Reset adjust threshold VRADJ 1.25 1.35 1.45 V VQ1 > 3.5 V Reset delay charging current IDR, ch 24 6 µA VDR = 1 V Reset delay discharge current IDR, dis 60 120 160 mA VDR = 1 V Upper reset timing threshold VDR, dt 0.9 1.8 2.7 V – Lower timing threshold VDR, st 0.25 0.4 0.65 V – Reset delay time tdr 35 50 70 ms C R = 100 nF Reset reaction timetrr 0.5 – 3 µs C R = 100 nF Characteristics (cont’d) VI= 13.5 V; Tj= – 40 °C < Tj< 125 °C Parameter Symbol Limit Values Unit Measuring Condition min. typ. max.

Data Sheet Rev. 1.1 14 2001-09-06 Watchdog Watchdog input pull down resistor RW 51 5 4 0 k Ω – Watchdog delay charging current IDW, ch 24 6 µAV DW = 1V; VDR = 2.7V Watchdog upper timing threshold VDW, dt 1.5 1.9 2.5 V – Watchdog lower timing threshold VDW, st 0 30 200 mV – Watchdog trigger pulse interval twp 35 50 70 ms C DW = 100 nF; Characteristics (cont’d) VI= 13.5 V; Tj= – 40 °C < Tj< 125 °C Parameter Symbol Limit Values Unit Measuring Condition min. typ. max.

Data Sheet Rev. 1.1 15 2001-09-06 A2C33648 Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at TA = 25°C and the given supply voltage. Reference Output REF2 Voltage divider ratioVREF2 49.5 50 50.5 % of VQ2 Output impedance RREF2 10 – 20 k Ω – Output clamp voltage–– – 4V – Reference Output REF3 Voltage divider ratioVREF3 49.5 50 50.5 % of VQ3 Output impedance RREF3 10 – 20 k Ω – Output clamp voltage–– – 4V – Characteristics (cont’d) VI= 13.5 V; Tj= – 40 °C < Tj< 125 °C Parameter Symbol Limit Values Unit Measuring Condition min. typ. max.

Data Sheet Rev. 1.1 16 2001-09-06 Figure 3 Measurement Circuit AES02866 VE1 IE1 IEN A2C33648 IVI II VE2 IE2 E3VE3 IE3 VEN EN DR IDR, dis IDR, ch C DR 100 nF VRADJ IRADJ RADJ VW IW W DW VQ1 IQ1 IREF2 REF2 VREF2 Q2 VQ2 IQ2 IQ3 VQ3 REF3 IREF3 VREF3 R IR VR IGND C DW 100 nF IDW, ch GND 22 µF 10 µF 10 µF

Data Sheet Rev. 1.1 17 2001-09-06 A2C33648

Application Information

Figure 4 Application Diagram Input With an input voltage between 5.5 V < VI < 40 V the regulator works in its normal operating range. If the input voltage exceeds the 40 V up to 60 V for less than 400 ms, e.g. caused by a load dump, the active components are switched off. For compensating line influences and to avoid steep input edges above 1V/µs an input capacitor is needed. Using a resistor of approx. 1Ω in series to the input capacitor, the oscillating circuit consisting of input inductance and input capacitor is damped. AES02867 Tracking Output 2 I REF2 DR Main Watchdog / Reset RADJ R W Enable Logic DW EN Tracking Output 3 REF3 AD AD Sensor / Peripheral Sensor / Peripheral Enable-Signal Ignition KL. VBAT KL. Controller optional

Data Sheet Rev. 1.1 18 2001-09-06 Output Voltage To obtain an output voltage of VQ1 = 5 V with an accuracy of 2% at the main output Q1 an input voltage in the range of 5.5 V < VI < 40 V is needed. The main output Q1 supplies 5 V with 450 mA current capability. For stability it requires an output capacitor of at least 22 µF and a maximum ESR of 3 Ω . The two outputs Q2 and Q3 are tracked to Q1 and can supply currents of 100 mA and 50 mA. So any undervoltage condition or shutdown of Q1 will cause the same effect to Q2 and Q3. For Stability both outputs require an output capacitor of at least 10 µF with ESR < 3 Ω each. Q2 is switched on and off simultaneously with Q1, while the tracked output Q3 can be enabled or disabled individually. Two reference outputs REF2, REF3 with voltages of VREF2 = VQ2 /2 and VREF3 = VQ3 /2 are also available. In case of an overvoltage at the tracker outputs, the voltage references are limited internally to 4.5 V. Output Current The output current is a function of the input voltage. For high input voltages above 22 V, the output current is reduced linear. This is designed into the regulator for protection. Above 42 V the regulator is switched off. The thermal shutdown switches the regulator off, if it exceeds the thermal threshold of 160 °C typical. It is switched on again, as soon as the regulator is cooled down by typical 10 K (thermal hysteresis). Please note the device should not be operated above a junction temperature of 150 °C for long term reliability. Enable Function The A2C33648 includes the possibility of enabling the main and tracked outputs. Three ORed enable inputs E1, E2, E3 are used to control the main output Q1 and the tracked output Q2. E1 and E3 can be supplied from the battery line or ignition key with input voltages up to 16 V. The enable inputs should be protected by a series resistor and a capacitor, e.g. RE1 = RE3 =22kΩ , CE1 = CE3 = 2.2 nF. E2 is intended for connection to the microcontroller. A logic HIGH at any enable input will switch on the related regulator and/or tracker. A separate enabling pin EN is available to switch on and off the second tracked output Q3 separately by the microcontroller. Reset The power on reset feature is necessary for a defined start of the microprocessor during power up. When the output voltage of the main regulator has reached the reset threshold voltage the reset delay capacitor C DR is charged. After a certain time, the reset delay time tdr , the voltage at the capacitor equals the upper reset timing threshold and the reset output goes HIGH.

Data Sheet Rev. 1.1 19 2001-09-06 A2C33648 The reset delay time tdr is defined by the reset delay capacitor C DR at pin DR and can be calculated as follows: With C DR reset delay capacitor tdr reset delay time required by the application VDR, dttypical 1.8 V for power up reset IDR, ch charge current typical 4 µA For a delay capacitor C DR = 100 nF the typical power up reset delay time is 45 ms. The under-voltage reset circuitry supervises the output voltage. In case VQ1 falls below the reset threshold the reset output is set LOW after the reset reaction time trr (discharge of the reset delay capacitor). The reset LOW signal is held down to an output voltage VQ1 of 1 V. Both, the reset reaction time and the reset delay time are defined by the capacitor value. The reset reaction time trr is the time it takes the voltage regulator to set its reset output LOW after the output voltage has dropped below the reset threshold. The reset reaction time can be calculated using the following equation: tdr C DR V DR dt, IDR ch, trr C DR V DR dt, V DR st,– IDR dis,

Data Sheet Rev. 1.1 20 2001-09-06 Figure 5 Reset Timing The reset output is an open collector output with a pullup-resistor of typical 4 kΩ to Q1. An external pullup can be added with a resistor value of at least 20 kΩ . In addition the reset switching threshold can be adjusted by an external voltage divider. The feature is useful with microprocessors which guarantee safe operation down to voltages below the internally set reset threshold of 4.65 typical. AED03045 Thermal tdr Power-on-Reset Voltage Dip Secondary Overload at OutputSpike VDR, st V Ι V D VQ Q, rthV trr< rrt at Input Undervoltage Shutdown DR, dtV t t t t V RO

Data Sheet Rev. 1.1 21 2001-09-06 A2C33648 Figure 6 Adjusting the Reset Threshold For using the preadjusted reset threshold voltage of typical VQ, rth = 4.65 V , the pin RADJ has to be connected to GND. If a lower reset threshold is required by the system, a voltage divider defines the reset threshold VQ, rthext between 3.5 V and 4.65 V: Vrth,ref is typical 1.35 V. AES02877 Bandgap Reference A2C33648 QI

1.36 V R

Vrth,ref V Q rthext, V rth ref, 1 R RTH1 R RTH2 /Ge6/Gf6⋅=

Data Sheet Rev. 1.1 22 2001-09-06 Watchdog The reset and watchdog timing can be defined independently of each other by two delay capacitors C DR and C DW at pins DR and DW. The watchdog function supervises the microcontroller including time base failures. If there is no positive edge within a certain pulse repetition time twp or the triggerpulse is too short a reset is generated. Programming of the max. repetition time is done by a delay capacitor C DW at pin DW. The frequency of the watchdog pulses generated by the microcontroller has to be higher than the minimum pulse sequence twp set by the external reset delay capacitor C DW . The pulse repetition time can be calculated as follows: Figure 7 Watchdog Timing If the watchdog is not used in an application the pin WD has to be connected to GND. twp C DW V DW dt, V DW st,– IDW ch, AET03000 VI t t VQ1 VW t t VDW VDR t t VR t> 10 µs t 25 µs tWP VDW,dt VDW,st VDR,dt VDR,st tdr trr Missing edge at Watchdog Watchdog pulses too short

Power Supply Ripple Rejection PSRR of Main Output Q1 versus Frequency f Power Supply Ripple Rejection PSRR of Output Q3 versus Frequency f Power Supply Ripple Rejection PSRR of Output Q2 versus Frequency f AED02995 PSRR f dB 010 101 102 103 104 105Hz Q1I = 10 mA = 450 mAIQ1 = 22 µFC Q1 AED02997 10030 1 102 103 Hz 10 5 dB PSRR f IQ3 = 1 mA IQ3 = 50 mA C Q3 = 10 µF AED02996 10030 1 102 103 Hz 10 5 dB PSRR f IQ2 = 1 mA IQ2 = 100 mA C Q2 = 10 µF

Enable Currents IE1, IE3 and Output Voltage V Q1 versus Enable Voltages V E1, V E3 Enable Currents IE2, IEN and Output Voltage V Q3 versus Enable Voltages V E2, V EN AED02998 µAIE1, IE3 VE1, VE3

12345 V 0

1.5 4.5 7.5 VQ1 V AED02999 100 150 200 250 µAIE2, IEN VE2, VEN 0.5 1 1.5 2 2.5 V 1.5 4.5 7.5 VQ3 V

Data Sheet Rev. 1.1 25 2001-09-06 A2C33648 Package Outlines +0.07-0.02 -0.31.2 2.8 1.3 0.25 1) Does not include plastic or metal protrusion of 0.15 max. per side 20x0.25M Heatsink 0.95 14.2 +0.15 Index Marking 15.9 101 0.1 +0.130.4 1.27 3.5 max. 6.3 3.25 20 11 ±0.15 ±0.1 ±0.15 1 x 45˚ ±0.3 5˚±3˚ ±0.15 15.74±0.1 A A B 0.25M B GPS05791 P-DSO-20-12 (Plastic Dual Small Outline Package) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information” Dimensions in mmSMD = Surface Mounted Device

Data Sheet Rev. 1.1 26 2001-09-06 A2C33648 Edition 2001-09-06 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81541 München, Germany © Infineon Technologies AG 2001. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be consid- ered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descrip- tions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. Information For further information on technology, deliv- ery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technolo- gies Representatives worldwide (see ad- dress list). Warnings Due to technical requirements components may contain dangerous substances. For in- formation on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the fail- ure of that life-support device or system, or to affect the safety or effectiveness of that de- vice or system. Life support devices or sys- tems are intended to be implanted in the hu- man body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.