A24C32J8RZ

A24C32 AITSEMI | Alldatasheet

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AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 1 - DESCRIPTION FEATURES The A24C32 provides 32768 bits of serial electrically erasable and progra mmable read -only memory (EEPROM), organized as 4096 bytes. The device is optimized for use in many industrial and commercial applications where low -power and low-voltage operation are essential. The A24C32 is available in SOP8, TSSOP8, DFN8, DIP8, SOT-25 and TSOT-25 packages. ⚫ Compatible with all I²C bidirectional data transfer protocol ⚫ Memory array:

32 Kbits (4Kbytes) of EEPROM

Page size: 32 bytes ⚫ Extended Temperature Range A：-40℃ to +85℃ B：-40℃ to +105℃ C：-40℃ to +125℃ ⚫ Single supply voltage and high speed: 1.7V-5.5V/400kHz 2.5V-5.5V/1MHz Random and sequential Read modes ⚫ Write: Byte Write within 3 ms Page Write within 3 ms Partial Page Writes Allowed ⚫ Write Protect Pin for Hardware Data Protection ⚫ Schmitt Trigger, Filtered Inputs for Noise Suppression ⚫ High-reliability Endurance: 1 Million Write Cycles Data Retention: 100 Years ⚫ Enhanced ESD/Latch-up protection HBM 5000V ⚫ Available in SOP8 , TSSOP8, DFN8, DIP8, SOT-25 and TSOT-25 packages

ORDERING INFORMATION

SPQ: 2,500pcs/Reel SPQ: 100pcs/Tube A24C32M8R-Z A24C32M8U-Z A24C32M8VR-Z A24C32M8VU-Z TSSOP8 SPQ: 3,000pcs/Reel SPQ: 100pcs/Tube TMX8 A24C32TMX8R-Z A24C32TMX8U-Z A24C32TMX8VR-Z A24C32TMX8VU-Z DFN8 SPQ: 3,000pcs/Reel J8 A24C32J8R-Z A24C32J8VR-Z DIP8 SPQ: 50pcs/Tube P8 A24C32P8U-Z A24C32P8VU-Z SOT-25 SPQ: 3,000pcs/Reel E5 A24C32E5R-Z A24C32E5VR-Z TSOT-25 SPQ: 3,000pcs/Reel TE5 A24C32TE5R-Z A24C32TE5VR-Z Note Z: Temperature: A：-40℃ to +85℃ B：-40℃ to +105℃ C：-40℃ to +125℃ V: Halogen free Package R: Tape & Reel U: Tube AiT provides all RoHS products

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 2 - PIN DESCIPTION Top View Top View Top View Top View Top View Top View Pin # Symbol Type Functions SOP8 TSSOP8 DFN8 DIP8 SOT-25 TSOT-25 1 1 1 1 - - A0 I Address Inputs 2 2 2 2 - - A1 I Address Inputs 3 3 3 3 - - A2 I Address Inputs 4 4 4 4 2 2 GND P Ground 5 5 5 5 3 3 SDA I/O Serial Data 6 6 6 6 1 1 SCL I Serial Clock Input 7 7 7 7 5 5 WP I Write Protect 8 8 8 8 4 4 VCC P Power Supply

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 3 - ABSOLUTE MAXIMUM RATINGS DC Supply Voltage -0.3V ~ +6.5V Input / Output Voltage GND-0.3V ~ VCC +0.3V Operating Ambient Temperature -40℃~ +85℃ Storage Temperature -65℃ ~ +150℃ Electrostatic Pulse (Human Body Model) 5000V Stress beyond above listed “Absolute Maximum Ratings” may lead permanent damage to the device. These are stress ratings only and operations of the device at these or any other conditions beyond those indicated in the operational sections of the specifications are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PIN CAPACITANCE Applicable over recommended operating range form, TA = 25℃, f = 1.0MHz, VCC = +1.7V Parameter Symbol Condition Min. Typ. Max. Unit Input / Output Capacitance (SDA) CI/O VIO=0V - - 8 pF Input Capacitance (A0, A1, A2, SCL) CIN VIN=0V - - 6 pF

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 4 - AC ELECTRICAL CHARACTERISTICS Applicable over recommended operating range form, unless otherwise noted A24C32-A TA = -40℃ to +85℃ VCC = +1.7V to +5.5V@400kHz VCC = +2.5V to +5.5V@1MHz CL= 100pF A24C32-B TA = -40℃ to +105℃ A24C32-C TA = -40℃ to +125℃ Parameter Symbol 1.7V≤VCC<2.5V 2.5V≤VCC<5.5V Unit Clock Frequency, SCL fSCL - - 400 - - 1000 kHz Clock Pulse Width Low tLOW 1.3 - - 0.5 - - μs Clock Pulse Width High tHIGH 0.6 - - 0.26 - - μs Noise Suppression Time tI - - 50 - - 50 ns Clock Low to Data Out Valid tAA - - 0.9 - - 0.45 μs Time the bus must be free before a new transmission can start tBUF 1.3 - - 0.5 - - μs Start Hold Time tHD.STA 0.6 - - 0.25 - - μs Start Setup Time tSU.STA 0.6 - - 0.25 - - μs Data In Hold Time tHD.DAT 0 - - 0 - - μs Data In Setup Time tSU.DAT 100 - - 100 - - ns Input Rise TimeNOTE1 tR - - 0.3 - - 0.12 μs Input Fall TimeNOTE1 tF - - 0.3 - - 0.12 μs Stop Setup Time tSU.STO 0.6 - - 0.25 - - μs Data Out Hold Time tDH 50 - - 50 - - ns Write Cycle Time tWR - 1.9 3 - 1.9 3 ms 5.0V, 25℃, Byte ModeNOTE1 Endurance 1M - - 1M - - Write Cycle

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 5 - DC ELECTRICAL CHARACTERISTICS Applicable over recommended operating range form, unless otherwise noted A24C32-A TA = -40℃ to +85℃ VCC = +1.7V to +5.5V@400kHz VCC = +2.5V to +5.5V@1MHz CL= 100pF A24C32-B TA = -40℃ to +105℃ A24C32-C TA = -40℃ to +125℃ Parameter Symbol Condition Min. Typ. Max. Unit Supply Voltage VCC @400kHz 1.7 - 5.5 V @1MHz 2.5 - 5.5 V Supply Current VCC = 5.0V ICC Read at 400kHz - 0.14 0.3 mA Write at 400kHz - 0.28 0.5 mA Supply Current VCC = 5.0V ISB1 VIN = VCC or VSS - 0.03 0.5 μA Input Leakage Current ILI VIN = VCC or VSS - 0.10 1.0 μA Output Leakage Current ILO VOUT = VCC or VSS - 0.05 1.0 μA Input Low Level VIL1 VCC = 1.7V to 5.5V -0.3 - VCCx0.3 V Input High Level VIH1 VCC = 1.7V to 5.5V VCCx0.7 - VCC+0.3 V Output Low Level VCC = 1.7V VOL1 IOL = 0.15mA - - 0.2 V Output Low Level VCC = 5.0V VOL2 IOL = 3.0mA - - 0.4 V NOTE1: This parameter is characterized and is not 100% tested. NOTE2: AC measurement conditions: RL(connects to VCC): 1.3k Input pulse voltages: 0.3VCC to 0.7VCC Input rise and fall time: 50ns Input and output timing reference voltages: 0.5VCC The value of RL should be concerned according to the actual loading on the user’s system.

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 6 - BLOCK DIAGRAM

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 7 - DETAILED INFORMATION DEVICE/PAGE ADDRESSES (A2 ，A1 and A0): The A2, A1 and A0 pins are device address inputs that are hard wire for the A24C32. Eight 32k devices may be addressed on a single bus system (device addressing is discussed in detail under the Device Addressing section). SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. Th is pin is open-drain driven and may be wire-OR’ed with any number of other open-drain or open- collector devices. SERIAL CLOCK (S CL): The SCL input is used to positive edge clock data into each EEPR OM device and negative edge clock data out of each device. WRITE PROTECT (WP): The A24C32 has a Write Protect pin that provides hardware data protection. The Write Protect pin allows nor mal read/write operations when connected to ground (GND). When the Wr ite Protection pin is connected to V CC, the write protection feature is enabled and operates as shown in the following Table 1. Table1: Write Protect WP Pin Status A24C32 At VCC Full (32k) Array At GND Normal Read/Write Operations

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 9 - ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8 -bit words. The EEPROM sends a “0” to acknowledge that it has received each word. This happens during the ninth clock cycle. Figure 3 Output Acknowledge STANDBY MODE : The A24C32 features a low -power standby mode which is enabled: (a) upon power -up and (b) after the receipt of the STOP bit and the completion of any internal operations. MEMORY RESET : After the protocol is interrupted, power l oss or system reset, any two -wire part can be reset by following these steps: 1. Clock up to 9 cycles. 2. Look for SDA high in each cycle while SCL is high. 3. Create a start condition.

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 10 - 3. Device Addressing The 32k EEPROM devices all require an 8 -bit device address word following a start condition to enable the chip for a read or write operation (see Figure 4). Figure 4 Device Address The device address word consists of a mandatory “1”, “0” sequence for the first four most significant bits as shown. This is common to all the Serial EEPROM devices. The 32k EEPROM uses A2, A1 and A0 device address bits to allow as much as eig ht devices on the same bus These 3 bits must be compared to their corresponding hardwired input pins. The A2 , A1 and A0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a "0". If a compare is not made, the chip will return to standby state. DATA SECURITY: The A24C32 has a hardware data protection scheme that allows the user to write protect the entire memory when the WP pin is at VCC. 4. Write Operations BYTE WRITE: A write operation requires two 8 -bit data word address (see Table 2 & Table 3) following the device address word and acknowledgment. Upon receipt of every 8 -bit address, the EEPROM will respond with a "0" and then send 8 -bit data word. Following receipt of the 8 -bit data word, the EEPROM will output a "0" and the master device, such as a microcontroller, must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle, tWR, in order to save the data in the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 5). Table 2 First Word Address Table 3 Second Word Address

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 13 - SEQUENTIAL READ : Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition (see Figure 9) Figure 9 Sequential Read

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 15 -

PACKAGE INFORMATION

Dimension in SOP8 (Unit: mm) Symbol Min Max A 1.35 1.75 A1 0.10 0.23 B 0.39 0.48 C 0.21 0.26 D 4.70 5.10 E1 3.70 4.10 E 5.80 6.20 e 1.27 BSC L 0.50 0.80 θ 0° 8°

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 16 - Dimension in TSSOP8 Package (Unit: mm) Symbol Min Max D 2.90 3.10 E 6.20 6.60 E1 4.30 4.50 A - 1.20 A1 0.05 0.15 b 0.21 0.30 e 0.65 BSC L 0.45 0.75 L1 1.00 REF

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 17 - Dimension in DFN8 (Unit: mm) Symbol Min Max A 0.50 0.60 A1 0.00 0.05 b 0.20 0.30 b1 0.18 REF c 0.152 REF D 1.90 2.10 D2 1.30 1.50 e 0.50 BSC Nd 1.50 BSC E 2.90 3.10 E2 1.20 1.40 L 0.25 0.35 R 0.20 0.30 K 0.55 REF

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 18 - Dimension in DIP8 (Unit: mm) Symbol Min Max A 3.60 4.00 A2 3.20 3.40 b 0.44 0.53 b2 1.52 BSC c 0.24 0.32 D 9.05 9.45 E1 6.15 6.55 e 2.54 BSC eA 7.62 BSC eB 7.62 9.30 L 3.00 BSC

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 19 - Dimension in SOT-25 (Unit: mm) Symbol Min. Max. A - 1.35 A1 0.04 0.15 A2 1.00 1.20 A3 0.55 0.75 b 0.38 0.48 b1 0.37 0.43 c 0.11 0.21 c1 0.10 0.16 D 2.72 3.12 E 2.60 3.00 E1 1.40 1.60 e 0.95 BSC e1 1.90 BSC L 0.30 0.60 L1 0.575 REF L2 0.258 BSC θ 0° 8°

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 20 - Dimension in TSOT-25 (Unit: mm) Symbol Min. Max. A - 0.90 A1 0.00 0.10 A2 0.65 0.85 A3 0.35 0.45 b 0.30 0.50 c 0.14 0.20 D 2.85 3.05 E 2.65 2.95 E1 1.60 1.70 e 0.90 1.00 e1 1.80 2.00 L 0.30 0.60 L1 0.575 REF L2 0.258 BSC R - 0.25 R1 - 0.25 θ 0° 8° θ1 3° 7° θ2 10° 14°

AiT Semiconductor Inc. www.ait-ic.com A24C32 MEMORY EEPROM 32K (4096 X 8) 2-WIRE SERIAL INTERFACE REV4.1 - SEP 2008 RELEASED, SEP 2021 UPDATED - - 21 - IMPORTANT NOTICE AiT Semiconductor Inc. (AiT) reserves the right to make changes to any its prod uct, specifications, to discontinue any integrated circuit product or service without notice, and advises its cu stomers to obt ain the latest version of relevant informat ion to verify, before placing orders, that the information being relied on is current. AiT Semiconductor Inc. 's integrated circuit products are not designed, intended, authorized, or warranted to be suitable for use in life support applications, devices or systems or other critical applications. Use of AiT products in such applications is understood to be fully at the risk of the customer. As used herein may involve potential risks of death, personal injury, or s ervere property, or environmental damage. I n order to minimize risks associated with the customer's applications, the customer should provide adequate design and operating safeguards. AiT Semiconductor Inc . assumes to no liability to customer product des ign or application support. AiT warrants the performance of its products of the specifications applicable at the time of sale.