A1101_08 ALLEGRO | Alldatasheet
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The Allegro® A1101-A1104 and A1106 Hall-effect switches are next generation replacements for the popular Allegro 312x and 314x lines of unipolar switches. The A110x family, produced with BiCMOS technology, consists of devices that feature fast power-on time and low-noise operation. Device programming is performed after packaging, to ensure increased switchpoint accuracy by eliminating offsets that can be induced by package stress. Unique Hall element geometries and low- offset amplifiers help to minimize noise and to reduce the residual offset voltage normally caused by device overmolding, temperature excursions, and thermal stress. The A1101-A1104 and A1106 Hall-effect switches include the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS output transistor. The integrated voltage regulator permits operation from 3.8 to 24 V . The extensive on-board protection circuitry makes possible a ±30 V absolute maximum voltage rating for superior protection in automotive and industrial motor commutation applications, without adding A1101-DS, Rev. 3 Features and Benefits ▪ Continuous-time operation ▫ Fast power-on time ▫ Low noise ▪ Stable operation over full operating temperature range ▪ Reverse battery protection ▪ Solid-state reliability ▪ Factory-programmed at end-of-line for optimum performance ▪ Robust EMC performance ▪ High ESD rating ▪ Regulator stability without a bypass capacitor Continuous-Time Switch Family Continued on the next page… 3 pin SIP (suffix UA) Functional Block Diagram Not to scale A1101, A1102, A1103, A1104, and A1106 Amp Regulator GND VCC VOUT OffsetGain Trim Control To all subcircuits
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 2Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A. Part Number Packing* Mounting Ambient, T A BRP (Min) B OP (Max) A1101ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC 10 175 A1101EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1101LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC A1101LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1102ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC 60 245 A1102EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1102LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC A1102LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1103ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC 150 355 A1103EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1103LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC A1103LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1104ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC 25 450 A1104EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1104LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC A1104LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1106ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC 160 430 A1106EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1106LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC A1106LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole *Contact Allegro for additional packing options. Selection Guide external components. All devices in the family are identical except for magnetic switchpoint levels. The small geometries of the BiCMOS process allow these devices to be provided in ultrasmall packages. The package styles available provide magnetically optimized solutions for most applications. package, while package UA is a three-lead ultramini SIP for through- hole mounting. Each package is lead (Pb) free, with 100% matte tin plated leadframes. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage V CC 30 V Reverse Supply Voltage V RCC –30 V Output Off Voltage V OUT 30 V Reverse Output Voltage V ROUT –0.5 V Output Current I OUTSINK 25 mA Magnetic Flux Density B Unlimited G Operating Ambient Temperature T A Range E –40 to 85 ºC Range L –40 to 150 ºC Maximum Junction Temperature T J(max) 165 ºC Storage Temperature T stg –65 to 170 ºC Description (continued)
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 3Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. ELECTRICAL OPERATING CHARACTERISTICS over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units Supply Voltage1 VCC Operating, TJ < 165°C 3.8 – 24 V Output Leakage Current I OUTOFF VOUT = 24 V, B < BRP –– 1 0 μA Output On Voltage V OUT(SAT) IOUT = 20 mA, B > BOP – 215 400 mV Power-On Time2 tPO Slew rate (dVCC/dt) < 2.5 V/μs, B > BOP + 5 G or B < BRP – 5 G ––4 μs Output Rise Time3 tr VCC = 12 V, RLOAD = 820 Ω, CS = 12 pF – – 400 ns Output Fall Time3 tf VCC = 12 V, RLOAD = 820 Ω, CS = 12 pF – – 400 ns Supply Current ICCON B > BOP – 4.1 7.5 mA ICCOFF B < BRP – 3.8 7.5 mA Reverse Battery Current I RCC VRCC = –30 V – – –10 mA Supply Zener Clamp Voltage V Z ICC = 10.5 mA; TA = 25°C 32 – – V Supply Zener Current4 IZ VZ = 32 V; TA = 25°C – – 10.5 mA 1 Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section. 2 For VCC slew rates greater than 250 V/μs, and TA = 150°C, the Power-On Time can reach its maximum value. 3 CS =oscilloscope probe capacitance. 4 Maximum current limit is equal to the maximum ICC(max) + 3 mA. DEVICE QUALIFICATION PROGRAM Contact Allegro for information. EMC (Electromagnetic Compatibility) REQUIREMENTS Contact Allegro for information. 1 32GND VOUT VCC Package UA, 3-pin SIPPackage LH 1 2
3 GND
VCC Connects power supply to chip 1 1 VOUT Output from circuit 2 3 GND Ground 3 2
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 4Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. MAGNETIC OPERATING CHARACTERISTICS1 over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units Operate Point B OP A1101 TA = 25°C 50 100 160 G Operating Temperature Range 30 100 175 G A1102 TA = 25°C 130 180 230 G Operating Temperature Range 115 180 245 G A1103 TA = 25°C 220 280 340 G Operating Temperature Range 205 280 355 G A1104 TA = 25°C 70 – 350 G Operating Temperature Range 35 – 450 G A1106 TA = 25°C 280 340 400 G Operating Temperature Range 260 340 430 G Release Point B RP A1101 TA = 25°C 10 45 130 G Operating Temperature Range 10 45 145 G A1102 TA = 25°C 75 125 175 G Operating Temperature Range 60 125 190 G A1103 TA = 25°C 165 225 285 G Operating Temperature Range 150 225 300 G A1104 TA = 25°C 50 – 330 G Operating Temperature Range 25 – 430 G A1106 TA = 25°C 180 240 300 G Operating Temperature Range 160 240 330 G Hysteresis B HYS A1101 TA = 25°C 20 55 80 G Operating Temperature Range 20 55 80 G A1102 TA = 25°C 30 55 80 G Operating Temperature Range 30 55 80 G A1103 TA = 25°C 30 55 80 G Operating Temperature Range 30 55 80 G A1104 TA = 25°C 20 55 – G Operating Temperature Range 20 55 – G A1106 TA = 25°C 70 105 140 G Operating Temperature Range 70 105 140 G 1 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for sou th-polarity magnetic fields. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated by the absolute value of B, and the sign indicates the polarity of the field (for example, a –100 G field and a 100 G field ha ve equivalent strength, but opposite polarity).
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 5Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Characteristic Symbol Test Conditions Value Units Package Thermal Resistance RθJA Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W Package LH, 2-layer PCB with 0.463 in.2 of copper area each side connected by thermal vias 110 ºC/W Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W 20 40 60 80 100 120 140 160 180 Maximum Allowable VCC (V) TJ(max) = 165ºC; ICC = ICC(max) Power Derating Curve (RQJA = 228 ºC/W) Package LH, 1-layer PCB (RQJA = 110 ºC/W) Package LH, 2-layer PCB (RQJA = 165 ºC/W) Package UA, 1-layer PCB VCC(min) VCC(max) 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 20 40 60 80 100 120 140 160 180 Temperature (°C) Power Dissipation, PD (mW) Power Dissipation versus Ambient Temperature QJA = 165 º C/W) Package UA, 1-la yer PCB QJA = 228 ºC/W) Packag e LH, 1-layer PCB QJA = 110 º C/W) Package LH, 2-layer PC B
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 6Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Characteristic Data TA (°C) Supply Current (On) versus Ambient Temperature VCC (V) ICCON (mA) 24 3.8 TA (°C) Supply Current (Off) versus Ambient Temperature VCC (V) ICCOFF (mA) 24 3.8 TA (°C) Output Voltage (On) versus Ambient Temperature VCC (V) VOUT(SAT) (mV) 3.8 Supply Current (On) versus Supply Voltage TA (°C) ICCON (mA) VCC (V) –40 150 Supply Current (Off) versus Supply Voltage TA (°C) ICCOFF (mA) VCC (V) –40 150 Output Voltage (On) versus Supply Voltage TA (°C) VOUT(SAT) (mV) VCC (V) –40 150 1.0 2.0 3.0 4.0 5.0 7.0 6.0 8.0 1.0 2.0 3.0 4.0 5.0 7.0 6.0 8.0 1.0 2.0 3.0 4.0 5.0 7.0 6.0 8.0 1.0 2.0 3.0 4.0 5.0 7.0 6.0 8.0 –50 0 50 100 150 0 5 10 15 20 25 –50 0 50 100 150 0 5 10 15 20 25 –50 0 50 100 150 0 5 10 15 20 25 100 150 200 250 300 350 400 100 150 200 250 300 350 400
Worcester, Massachusetts 01615-0036 U.S.A. vibration and electrical noise. state is attained after the first excursion beyond BOP or BRP. fastest available power-on settling time and frequency response. chopper-stabilization offset cancellation algorithm. are the clear choice for such applications. Track-and-Hold Signal Demodulator. Figure 1. Switching Behavior of Unipolar Switches. On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field be exhibited when using a circuit such as that shown in Panel B.
Worcester, Massachusetts 01615-0036 U.S.A.
- Hall-Effect IC Applications Guide, Application Note 27701
- Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead Welding and Lead Forming, Application Note 27703.1
- Soldering Methods for Allegro’ s Products – SMT and Through- Hole, Application Note 26009 All are provided in Allegro Electronic Data Book, AMS-702, and the Allegro Web site, www.allegromicro.com.
Figure 2. Continuous-Time Application, B < BRP.. This figure illustrates the use of a quick cycle for chopping VCC in order to conserve battery power. Position 1, power is applied to the device. Position 2, the output assumes the correct state at a time prior to the maximum Power-On Time, tPO(max). valid, a control unit reads the output. Position 5, power is removed from the device.
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 9Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Power Derating Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating sup- plied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating T J. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, RθJA, is a figure of merit sum- marizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R θJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, PD), can be estimated. The following formulas represent the fundamental relationships used to estimate T J, at PD. PD = VIN × IIN (1) Δ T = PD × RθJA (2) T J = TA + ΔT (3) For example, given common conditions such as: TA= 25°C, VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then: P D = VCC × ICC = 12 V × 4 mA = 48 mW Δ T = PD × RθJA = 48 mW × 140 °C/W = 7°C T J = TA + ΔT = 25°C + 7°C = 32°C A worst-case estimate, PD(max), represents the maximum allow- able power level (VCC(max), ICC(max)), without exceeding TJ(max), at a selected RθJA and TA. Example: Reliability for VCC at TA = 150°C, package UA, using minimum-K PCB. Observe the worst-case ratings for the device, specifically: RθJA = 165°C/W, TJ(max) = 165°C, VCC(max) = 24 V , and ICC(max) = 7.5 mA. Calculate the maximum allowable power level, PD(max). First, invert equation 3: ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C This provides the allowable increase to TJ resulting from internal power dissipation. Then, invert equation 2: PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 165 °C/W = 91 mW Finally, invert equation 1 with respect to voltage: VCC(est) = PD(max) ÷ ICC(max) = 91 mW ÷ 7.5 mA = 12.1 V The result indicates that, at TA, the application and device can dissipate adequate amounts of heat at voltages ≤VCC(est). Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli- able operation between VCC(est) and VCC(max) requires enhanced RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and VCC(max) is reliable under these conditions.
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 10Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Package LH, 3-Pin (SOT-23W) B B B 0.95 2.975 0.180 1.91 0.40 0.05 1.00 0.25 0.38 2.90 10º 10º Gauge Plane Seating Plane 1.49 0.96 B All dimensions nominal, not for tooling use Dimensions in millimeters A Active Area Depth 0.28 Hall element (not to scale) A
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 11Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Package UA, 3-Pin SIP C C B B C C C C 4.09 4.09 1.52 1.52 0.79 0.79 3.02 14.99 3.02 15.75 0.43 1.27 0.43 1.27 0.41 0.41 1.02 MAX 2.16 MAX 45° 3X10° 45° 45° 45° 2.01 1.44 2.01 1.44 231 231 A A Gate and tie bar burr area (for conventional leadframe, gate burr only) Hall element, not to scale A B C Active Area Depth, 0.50 mm Package UA, Matrix Leadframe Package UA, Conventional Leadframe All dimensions nominal, not for tooling use Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown Note: Matrix configuration not available for A1106 variants.
Continuous-Time Switch Family A1101, A1102, A1103, A1104, and A1106 12Allegro MicroSystems, Inc. Worcester, Massachusetts 01615-0036 U.S.A. Copyright ©2006-2008, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com