98ASB42343B

74AC244_V01 ONSEMI | Alldatasheet

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74AC244, 74ACT244 www.onsemi.com PIN DESCRIPTION Pin Name Description OE1, OE2 3−STATE Output Enable Inputs I0−I7 Inputs O0−O7 Outputs TRUTH TABLE Inputs Outputs OE1 In (Pins 12, 14, 16, 18) L L L L H H H X Z TRUTH TABLE (continued) Inputs Outputs OE2 In (Pins 3, 5, 7, 9) L L L L H H H X Z NOTE: X = Immaterial, Z = High Impedance ABSOLUTE MAXIMUM RATINGS Parameter Symbol Rating Unit Supply Voltage VCC −0.5 to +7.0 V DC Input Diode Current VI = −0.5 V IIK −20 mA VI = VCC + 0.5 +20 DC Input Voltage VI −0.5 to VCC + 0.5 V DC Output Diode Current VO = −0.5 V IOK −20 mA VI = VCC + 0.5 V +20 DC Output Voltage VO −0.5 to VCC + 0.5 V DC Output Source or Sink Current IO ±50 mA DC VCC or Ground Current per Output Pin ICC or IGND ±50 mA Storage Temperature TSTG −65 to +150 °C Junction Temperature TJ 140 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Rating Unit Supply Voltage AC VCC 2.0 to 6.0 V ACT 4.5 to 5.5 Input Voltage VI 0 to VCC V Output Voltage VO 0 to VCC V Operating Temperature TA −40 to +85 °C Minimum Input Edge Rate, AC Devices: VIN from 30% to 70% of VCC, VCC @ 3.3 V, 4.5 V, 5.5 V /C0068V / /C0068t 125 mV/ns Minimum Input Edge Rate, ACT Devices: VIN from 0.8 V to 2.0 V, VCC @ 4.5 V, 5.5 V /C0068V / /C0068t 125 mV/ns Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.

74AC244, 74ACT244 www.onsemi.com DC ELECTRICAL CHARACTERISTICS FOR AC TA = +25°C TA = −55°C to +125°C TA = −40°C to +85°C Symbol Parameter VCC(V) Conditions Typ Guaranteed Limits Unit VIH Minimum HIGH Level Input Voltage 3.0 VOUT = 0.1 V or VCC − 0.1 V 1.5 2.1 2.1 2.1 V VIL Maximum LOW Level Input Voltage 3.0 VOUT = 0.1 V or VCC − 0.1 V 1.5 0.9 0.9 0.9 V VOH Minimum HIGH Level Output Voltage

3.0 VIN = VIL or VIH,

IOH = 12 mA 2.56 2.40 2.46

4.5 VIN = VIL or VIH,

IOH = 24 mA 3.86 3.70 3.76

5.5 VIN = VIL or VIH,

IOH = 24 mA (Note 1) 4.86 4.70 4.76 VOL Maximum LOW Level Output Voltage IOL = 12 mA 0.36 0.50 0.44 IOL = 24 mA 0.36 0.50 0.44 IOL = 24 mA (Note 1) 0.36 0.50 0.44 IIN (Note 2) Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 ±1.0 /C0109A IOZ Maximum 3−STATE Leakage Current

5.5 VI (OE) = VIL, VIH;

VI = VCC, VGND; VO = VCC, GND IOLD Minimum Dynamic Output Current (Note 3) 5.5 VOLD = 1.65 V Max. 50 75 mA IOHD 5.5 VOHD = 3.85 V Min. −50 −75 mA ICC (Note 2) Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 4.0 80.0 40.0 /C0109A 1. All outputs loaded; thresholds on input associated with output under test. 2. I IN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC. 3. Maximum test duration 2.0 ms, one output loaded at a time.

74AC244, 74ACT244 www.onsemi.com DC ELECTRICAL CHARACTERISTICS FOR ACT TA = +25°C TA = −55°C to +125°C TA = −40°C to +85°C Symbol Parameter VCC(V) Conditions Typ Guaranteed Limits Unit VIH Minimum HIGH Level Input Voltage 4.5 VOUT = 0.1 V or VCC − 0.1 V 1.5 2.0 2.0 2.0 V VIL Maximum LOW Level Input Voltage 4.5 VOUT = 0.1 V or VCC − 0.1 V 1.5 0.8 0.8 0.8 V VOH Minimum HIGH Level Output Voltage IOH = 24 mA 3.86 3.70 3.76 IOH = 24 mA (Note 4) 4.86 4.70 4.76 VOL Maximum LOW Level Output Voltage IOL = 24 mA 0.36 0.50 0.44 IOL = 24 mA (Note 4) 0.36 0.50 0.44 IIN Maximum Input Leakage Current 5.5 VI = VCC, GND ±0.1 ±1.0 ±1.0 /C0109A IOZ Maximum 3−STATE Leakage Current

5.5 VI = VIL, VIH;

VO = VCC, GND IOLD Minimum Dynamic Output Current (Note 5) 5.5 VOLD = 1.65 V Max. 50 75 mA IOHD 5.5 VOHD = 3.85 V Min. −50 −75 mA ICC Maximum Quiescent Supply Current 5.5 VIN = VCC or GND 4.0 80.0 40.0 /C0109A 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0 ms, one output loaded at a time.

74AC244, 74ACT244 www.onsemi.com AC ELECTRICAL CHARACTERISTICS FOR AC VCC (V) (Note 6) TA = +25°C, CL = 50 pF TA = −55°C to +125°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Symbol Parameter Min Typ Max Min Max Min Max Unit tPLH Propagation Delay, Data to Output tPHL Propagation Delay, Data to Output AC ELECTRICAL CHARACTERISTICS FOR ACT VCC (V) (Note 7) TA = +25°C, CL = 50 pF TA = −55°C to +125°C CL = 50 pF TA = −40°C to +85°C CL = 50 pF Symbol Parameter Min Typ Max Min Max Min Max Unit tPLH Propagation Delay, Data to Output tPHL Propagation Delay, Data to Output CAPACITANCE Symbol Parameter Conditions Typ Unit CIN Input Capacitance VCC = OPEN 4.5 pF CPD Power Dissipation Capacitance VCC = 5.0 V 45.0 pF

74AC244, 74ACT244 www.onsemi.com

ORDERING INFORMATION

Shipping† (Qty / Packing) 74AC244SC SOIC−20W (Pb−Free) 38 / Tube 74AC244SCX SOIC−20W (Pb−Free) 1000 / Tape & Reel 74AC244MTC TSSOP−20 (Pb−Free) 75 / Tube 74AC244MTCX TSSOP−20 (Pb−Free) 2500 / Tape & Reel 74ACT244SC SOIC−20W (Pb−Free) 38 / Tube 74ACT244SCX SOIC−20W (Pb−Free) 1000 / Tape & Reel 74ACT244MTC TSSOP−20 (Pb−Free) 75 / Tube 74ACT244MTCX TSSOP−20 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D NOTE: All packages are lead free per JEDEC: J −STD−020B standard.

SOIC−20, 300 mils CASE 751BJ−01 ISSUE O DATE 19 DEC 2008 E1 E e PIN#1 IDENTIFICATION b D c A TOP VIEW SIDE VIEW END VIEW /C01131 /C01131hh L Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-013. SYMBOL MIN NOM MAX /C0113 θ A b c D E e h 0º 8º 0.10 0.31 0.20 0.25 12.60 10.01 7.40

1.27 BSC

2.64 0.30 0.51 0.33 0.75 13.00 10.64 7.60 L 0.40 1.27 2.36 12.80 10.30 7.50 0.41 0.27 0.81 A2 2.05 2.55 2.49 θ1 5º 15º MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON34287EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1SOIC−20, 300 MILS © Semiconductor Components Industries, LLC, 2019 www.onsemi.com

SOIC−20 WB CASE 751D−05 ISSUE H DATE 22 APR 2015 SCALE 1:1 b20X H c L 18X A1 A SEATING PLANE /C0113 h X 45/C0095 E D M0.25 MB M0.25 SA SBT e T B A DIM MIN MAX MILLIMETERS A 2.35 2.65 A1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 D 12.65 12.95 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 /C0113 0 7 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. /C0095/C0095 XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb −Free Package GENERIC MARKING DIAGRAM* XXXXXXXXXXX XXXXXXXXXXX AWLYYWWG *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ /C0071”, may or may not be present. 11.00 20X 0.52 20X 1.30 1.27 DIMENSIONS: MILLIMETERS PITCH *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* RECOMMENDED 20 11 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98ASB42343BDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1SOIC−20 WB © Semiconductor Components Industries, LLC, 2019 www.onsemi.com

TSSOP−20 WB CASE 948E ISSUE D DATE 17 FEB 2016 SCALE 2:1 DIM A MIN MAX MIN MAX INCHES 6.60 0.260 MILLIMETERS B 4.30 4.50 0.169 0.177 C 1.20 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0 8 0 8 /C0095/C0095/C0095/C0095 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ 11 0 1120 PIN 1 IDENT A B −T− 0.100 (0.004) C D G H SECTION N−N K JJ 1 N N M F −W− SEATING PLANE −V− −U− SUM0.10 (0.004) V ST 20X REFK L L/22X SU0.15 (0.006) T DETAIL E 0.25 (0.010) DETAIL E 6.40 0.252 --- --- SU0.15 (0.006) T GENERIC MARKING DIAGRAM* XXXX XXXX ALYW/C0071 /C0071 7.06 16X 0.36 16X 1.26 0.65 DIMENSIONS: MILLIMETERS PITCH SOLDERING FOOTPRINT A = Assembly Location L = Wafer Lot Y = Year W = Work Week /C0071= Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ /C0071”, may or may not be present. (Note: Microdot may be in either location) MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98ASH70169ADOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TSSOP−20 WB © Semiconductor Components Industries, LLC, 2019 www.onsemi.com

TSSOP20, 4.4x6.5 CASE 948AQ−01 ISSUE A DATE 19 MAR 2009 D TOP VIEW SIDE VIEW END VIEW e E1 E b L c A SYMBOL θ MIN NOM MAX A b c D E e 0º 8º L 0.05 0.80 0.19 0.09 0.45 6.40 6.30 4.30

0.65 BSC

1.00 REF

1.20 0.15 1.05 0.30 0.20 0.75 6.60 6.50 4.50 Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. 0.60 6.50 6.40 4.40 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON34453EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TSSOP20, 4.4X6.5 © Semiconductor Components Industries, LLC, 2019 www.onsemi.com

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