MJW21193_V01 ONSEMI | Alldatasheet
Document overview
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Technical content
Features
Total Harmonic Distortion Characterized High DC Current Gain Excellent Gain Linearity High SOA These Devices are Pb−Free and are RoHS Compliant MAXIMUM RATINGS Rating Symbol Value Unit Collector−Emitter Voltage VCEO 250 Vdc Collector−Base Voltage VCBO 400 Vdc Emitter−Base Voltage VEBO 5.0 Vdc Collector−Emitter Voltage − 1.5 V VCEX 400 Vdc Collector Current − Continuous IC 16 Adc Collector Current − Peak (Note 1) ICM 30 Adc Base Current − Continuous IB 5.0 Adc Total Power Dissipation @ TC = 25C Derate Above 25C PD 200 1.43 W W/C Operating and Storage Junction Temperature Range TJ, Tstg −/C8202/C8202 65 to +150 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Pulse Test: Pulse Width = 5 /C0109s, Duty Cycle 10%. THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case R/C0113JC 0.7 C/W Thermal Resistance, Junction−to−Ambient R/C0113JA 40 C/W
16 AMPERES
250 VOLTS, 200 WATTS
ORDERING INFORMATION
x = 3 or 4 A = Assembly Location Y = Year WW = Work Week G = Pb −Free Package MJW21193G TO −247 (Pb−Free)
30 Units/Rail
MJW21194G TO −247 (Pb−Free) TO−247 CASE 340L STYLE 3 1 2 3 MJW2119x AYWWG BASE
2 COLLECTOR
COLLECTOR 2, 4 BASE EMITTER 3 COLLECTOR 2, 4 PNP NPN
Figure 3. DC Current Gain, VCE = 20 V Figure 4. DC Current Gain, V CE = 20 V Figure 5. DC Current Gain, VCE = 5 V Figure 6. DC Current Gain, V CE = 5 V Figure 7. Typical Output Characteristics Figure 8. Typical Output Characteristics
1.5 A IB = 2 A
Figure 9. Typical Saturation Voltages Figure 10. Typical Saturation Voltages Figure 11. Typical Base−Emitter Voltage Figure 12. Typical Base−Emitter Voltage Figure 13. Active Region Safe Operating Area Figure 14. Active Region Safe Operating Area
1 Sec
Figure 18. Total Harmonic Distortion Test Circuit
TO−247 CASE 340L ISSUE G DATE 06 OCT 2021 GENERIC MARKING DIAGRAM* XXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb −Free Package STYLE 3: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR SCALE 1:1 STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 2: PIN 1. ANODE 2. CATHODE (S) 3. ANODE 2 4. CATHODES (S) STYLE 4: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR XXXXXXXXX AYWWG STYLE 6: PIN 1. MAIN TERMINAL 1 2. MAIN TERMINAL 2 3. GATE 4. MAIN TERMINAL 2 STYLE 5: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “/C0071”, may or may not be present. Some products may not follow the Generic Marking. MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. 98ASB15080CDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TO−247 © Semiconductor Components Industries, LLC, 2021 www.onsemi.com
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