NTD6416AN_V01 ONSEMI | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 8
Technical content
Features
- Low RDS(on)
- High Current Capability
- 100% Avalanche Tested
- NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable
- These Devices are Pb−Free and are RoHS Compliant MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol Value Unit Drain−to−Source Voltage VDSS 100 V Gate−to−Source Voltage − Continuous VGS ±20 V Continuous Drain Current Steady State TC = 25°C ID 17 A TC = 100°C 11 Power Dissipation Steady State TC = 25°C PD 71 W Pulsed Drain Current tp = 10 /C0109s IDM 62 A Operating and Storage Temperature Range TJ, Tstg −55 to +175 Source Current (Body Diode) IS 17 A Single Pulse Drain−to−Source Avalanche Energy (VDD = 50 Vdc, VGS = 10 Vdc, IL(pk) = 17 A, L = 0.3 mH, RG = 25 /C0087) EAS 43 mJ Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. THERMAL RESISTANCE RATINGS Parameter Symbol Max Unit Junction−to−Case (Drain) Steady State R/C0113JC 2.1 °C/W Junction−to−Ambient (Note 1) R/C0113JA 40 1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [2 oz] including traces). http://onsemi.com MARKING DIAGRAM & PIN ASSIGNMENTS A = Assembly Location* Y = Year WW = Work Week 6416AN = Device Code G = Pb −Free Package DPAK CASE 369AA STYLE 2AYWW 16ANG
4 Drain
V(BR)DSS RDS(on) MAX ID MAX (Note 1)
100 V 81 m /C0087 @ 10 V 17 A
See detailed ordering and shipping information on page 5 of this data sheet.
ORDERING INFORMATION
G S D N−Channel * The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank.
NTD6416AN, NVD6416AN http://onsemi.com ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 /C0109A 100 V Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ 112 mV/°C Zero Gate Voltage Drain Current IDSS VGS = 0 V, VDS = 100 V TJ = 25°C 1.0 /C0109A TJ = 125°C 10 Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = /C003420 V ±100 nA ON CHARACTERISTICS (Note 3) Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 /C0109A 2.0 4.0 V Negative Threshold Temperature Coefficient VGS(TH)/TJ 7.7 mV/°C Drain−to−Source On−Resistance RDS(on) VGS = 10 V, ID = 17 A 73 81 m/C0087 Forward Transconductance gFS VDS = 5 V, ID = 10 A 12 S CHARGES, CAPACITANCES AND GATE RESISTANCE Input Capacitance CISS VGS = 0 V, f = 1.0 MHz, VDS = 25 V 620 pF Output Capacitance COSS 110 Reverse Transfer Capacitance CRSS 50 Total Gate Charge QG(TOT) VGS = 10 V, VDS = 80 V, ID = 17 A 20 nC Threshold Gate Charge QG(TH) 1.0 Gate−to−Source Charge QGS 3.6 Gate−to−Drain Charge QGD 10 Plateau Voltage VGP 5.8 V Gate Resistance RG 2.4 /C0087 SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time td(on) VGS = 10 V, VDD = 80 V, ID = 17 A, RG = 6.1 /C0087 9.2 ns Rise Time tr 22 Turn−Off Delay Time td(off) 24 Fall Time tf 20 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 17 A TJ = 25°C 0.85 1.2 V TJ = 125°C 0.7 Reverse Recovery Time trr VGS = 0 V, dIS/dt = 100 A//C0109s, IS = 17 A 56 ns Charge Time ta 41 Discharge Time tb 15 Reverse Recovery Charge QRR 135 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces). 3. Pulse Test: Pulse Width ≤ 300 /C0109s, Duty Cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures.
NTD6416AN, NVD6416AN http://onsemi.com TYPICAL CHARACTERISTICS 0.001 0.01 0.1 Figure 13. Thermal Response Device Package Shipping† NTD6416ANT4G DPAK (Pb−Free) 2500 / Tape & Reel NTD6416AN−1G IPAK (Pb−Free)
75 Units / Rail
NVD6416ANT4G* DPAK (Pb−Free) 2500 / Tape & Reel NVD6416ANT4G−VF01* DPAK (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. *NVD Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable.
SCALE 1:1 STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE 123 V S A K −T− SEATING PLANE R B F G D 3 PL M0.13 (0.005) T C E J H DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14 G 0.090 BSC 2.29 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. Z STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR xxxxxxxxx = Device Code A = Assembly Location lL = Wafer Lot Y = Year WW = Work Week YWW xxxxxxxx xxxxx ALYWW x Discrete Integrated Circuits IPAK CASE 369D−01 ISSUE C DATE 15 DEC 2010 MARKING DIAGRAMS MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON10528DDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1IPAK (DPAK INSERTION MOUNT) © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
DPAK (SINGLE GUAGE) CASE 369AA−01 ISSUE B DATE 03 JUN 2010 SCALE 1:1 STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE b D E e M0.005 (0.13) C A c C Z DIM MIN MAX MIN MAX MILLIMETERSINCHES D 0.235 0.245 5.97 6.22 E 0.250 0.265 6.35 6.73 A 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 BSC 2.29 BSC b3 0.180 0.215 4.57 5.46 L 0.055 0.070 1.40 1.78 L3 0.035 0.050 0.89 1.27 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI- MENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY . 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.12 3 STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR XXXXXX = Device Code A = Assembly Location L = Wafer Lot Y = Year WW = Work Week G = Pb −Free Package YWW XXX XXXXXG XXXXXXG ALYWW DiscreteIC 1 2 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 /C0466mm inches/C0467SCALE 3:1 GENERIC MARKING DIAGRAM* *This information is generic. Please refer to device data sheet for actual part marking. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* H 0.370 0.410 9.40 10.41 A1 0.000 0.005 0.00 0.13 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC HDETAIL A SEATING PLANE A B C L H L2 GAUGE PLANE DETAIL A ROTATED 90 CW/C0053 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON13126DDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1DPAK (SINGLE GAUGE) © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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