IDTF1200 IDT | Alldatasheet

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Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 1 of 13 April, 2011 DATASHEET GENERAL DESCRIPTION The IDTF1200 is a Digitally Controlled Intermediate Frequency Differential Variable Gain Amplifier for BaseStation and other commercial applications with a low IF frequency. The device offers extremely low Noise Figure over the entire gain control range. The device is packaged in compact 5x5 Thin QFNs with 200 ohm differential input and output impedances for ease of integration into the receiver lineup. Versions covering IF frequencies up to 300 MHz with low distortion are available. COMPETITIVE ADVANTAGE The F1200 acts to enhance system SNR when VGA gain is reduced. The F1200 noise figure (NF) degrades only slightly (NF slope ~ -0.16 dB/dB) over a 13 dB control range while holding the Output IP3 approximately constant. The resultant improvement in noise can enhance the system SNR up to 2 decibels at low gain settings relative to a standard VGA. The device has excellent DNL and INL simplifying digital compensation. The device also offers the extremely low Harmonic, IM2, and IM3 distortion necessary to drive an ADC directly in an IF sub-sampling application.

APPLICATIONS

 BaseStation Diversity Receivers  Digital Pre-Distortion  Wave Point-to-Point Radios  Public Safety Receivers PART# MATRIX Part# Gain Range IP3O IF freq range NF F1200 22 to -1 48 50 - 160 2.6 F1206* 20 to -11 47 150 - 250 3.6 F1207* 20 to -11 46 230 - 300 3.7 *Future Product

FEATURES

 Ideal for high SNR systems  22 dB typ Maximum Gain  23 dB gain control range  7 bit parallel control  0.25 dB Gain Steps  Excellent NNooiissee FFiigguurree << 33..00 ddBB  5mm x 5mm 28 pin package  200 Ω Differential Input  200 Ω Differential Output  NNFF ddeeggrraaddeess << 22ddBB @@ 1122ddBB rreedduucceedd ggaaiinn  50 MHz – 160 MHz frequency range  Ultra-Linear: IIPP33OO ++4488 ddBBmm ttyyppiiccaall  External current setting resistor  Fast Gain Step Settling < 20 nsec DEVICE BLOCK DIAGRAM Decode Logic VCC ATTN In AMP out Bias Control Gain Control VCC ATTN Out AMP In ISETVMODE STBY

ORDERING INFORMATION

0.75 mm height package Green Industrial Temp range Tape & Reel Omit IDT prefix RF product Line IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 2 of 13 April, 2011 DATASHEET ABSOLUTE MAXIMUM RATINGS VCC to GND -0.3V to +5.5V All other Pins to GND -0.3V to (VCC +0.25V) ISET to GND -0.3V to +2.2V RF Input Power (ATTN_IN+, ATTN_IN-) @GMAX +10 dBm Continuous Power Dissipation 1.5W θJA (Junction – Ambient) +41°C/W θJC (Junction – Case) The Case is defined as the exposed paddle +4°C/W Operating Temperature Range (Case Temperature) TC = -40°C to +85°C Maximum Junction Temperature 150°C Storage Temperature Range -65°C to +150°C Lead Temperature (soldering, 10s) . +260°C KEY FEATURE – NOISE FIGURE SLOPE Standard Variable Gain amplifiers exhibit a [NF/Gain] slope of -1 dB/dB. Practically speaking, as gain is reduced, Noise Figure degrades dB for dB. The F1200 utilizes new technology that flattens the Noise Figure response (~ -0.16 dB/dB) for most of the gain control range while keeping distortion (Output IP3) constant. The result is that NF is improved up to 16 dB vs. a standard VGA at low gain settings. The graph below illustrates this by showing the IDTF1200 NF and IP3O vs. Gain setting contours. -2 0 2 4 6 8 10 12 14 16 18 20 22 Gain (dB) NF (dB) and Output IP3 (dBm) Output IP3 Noise Figure IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 3 of 13 April, 2011 DATASHEET IDTF1200 SPECIFICATION VCC = +5.0V, fRF = 100MHz, TC= +25°C, STBY = GND, R6 = 2.87K +/-1%, POUT = +3 dBm, unless otherwise noted in the condition column. EVkit trace, transformer & matching losses are de-embedded for specification purposes (note: de-embedded losses = 0.4dB input and 0.4dB output at 100MHz). Parameter Condition Symbol min typ max units Operating Temp. Range Case Temperature Measured at the exposed paddle TC -40 to +85 C Logic Input High VIH 2.01 V Logic Input Low VIL 0.8 V Logic Current IIH, IIL -1 +1 μA Operating voltage range Analog & Digital Supplies VCC 4.75 to 5.25 V Supply Current Total, All VCC; R6= 2.87K +/-1% ISUPP 103 110 117 mA Standby Current Total, All VCC  All digital inputs at 2.0VDC  VCC=5.25VDC ISTBY 2.5 mA Frequency Range Output IP3 > +40 dBm fRF 50 to 160 MHz Input Resistance Differential RIN 200 Ω Output Resistance Differential ROUT 200 Ω Maximum Gain GC = [0000000] GMAX 20.7 21.7 22.6 dB Minimum Gain GC = [1011101] GMIN -2.8 -1.7 -0.7 dB Gain Step LSB 0.25 dB Phase Slope ΔΦ due to change in gain ΦSLOPE 0.3 deg/dB Differential Gain Error Between adjacent 1dB steps DNL .05 dB Integral Gain Error Error vs. straight line INL +/-0.20 dB Noise Figure At Maximum Gain NF 2.6 dB Noise Figure GC = [0110100] (gain = 9dB) NFBACK 4.55 dB Output IP3  Set code = 0000000, (GMAX)  Pout = +3 dBm per tone  800 KHz Tone Separation IP3O1 48 dBm Output IP3 – at Gback  Set code = 0110100,, (Gain = 9dB)  Pout = +3 dBm per tone  800 KHz Tone Separation IP3O2 44 dBm Settling Time  Gain Step from 22 to 21 dB setting  Settles to within 0.1 dB of final value  FRF = 100 MHz T1dB 152 nsec 2nd Harmonic  Set code = 0000000, (GMAX)  Pout = +3 dBm H2 -82 dBc # Control Bits Parallel CB 7 # 1 dB Compression  Set code = 0000000, (GMAX)  Single Tone Test P1dBO +16.7 +19.4 dBm 1 –Items in bold italics are Guaranteed by Test 2 – See Graph on Page 8 IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 4 of 13 April, 2011 DATASHEET TYPICAL OPERATING PARAMETRIC CURVES (GMAX, 5.00V, 25C, POUT +3 dBm, 100MHz unless otherwise noted) Gain vs. Temperature 0 50 100 150 200 250 300 Frequency (MHz) Gain (dB) -40C 25C 85C S11 vs. Temperature -50 -40 -30 -20 -10 0 50 100 150 200 250 300 Frequency (MHz) Input Gamma [s11] (dB) -40C 25C 85C S12 vs. Temperature -50 -40 -30 -20 -10 0 50 100 150 200 250 300 Frequency (MHz) Reverse Isolation [s12] (dB) -40C 25C 85C Gain vs. Voltage 0 50 100 150 200 250 300 Frequency (MHz) Gain (dB) 4.75V 5.00V 5.25V S22 vs. Temperature -50 -40 -30 -20 -10 0 50 100 150 200 250 300 Frequency (MHz) Output Gamma [s22] (dB) -40C 25C 85C Gain and NF vs. Frequency (measured w/NF meter) 30 50 70 90 110 130 150 170 Frequency (MHz) Gain and NF (dB) Gain Noise Figure IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 5 of 13 April, 2011 DATASHEET TOCS CONTINUED S11 vs. Gain Setting -50 -45 -40 -35 -30 -25 -20 -15 -10 -1 3 7 11 15 19 23 Gain Setting (dB) Input Gamma (dB)

50 MHz

100 MHz

150 MHz

S21 vs. Gain Setting -1 3 7 11 15 19 23 Gain Setting (dB) Gain (dB) EVKit NF & Output IP3 Correction -1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 1.2 1.6 0 50 100 150 200 250 300 Frequency (MHz) Correction (dB) NF correction IP3 correction Correct EVkit measured Noise Figure by this amount to account for trace & transformer losses Correct EVkit measured Output IP3 by this amount to account for trace & transformer losses S22 vs. Gain Setting -50 -45 -40 -35 -30 -25 -20 -15 -10 -1 3 7 11 15 19 23 Gain Setting (dB) Output Gamma (dB) S21 Phase vs. Gain Setting -10 -1 3 7 11 15 19 23 Gain Setting (dB) Normalized S21 Phase response (degrees) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 50 100 150 200 250 300 Frequency (MHz) EVkit Loss (dB) Correct EVkit measured Gain by this amount to account for trace & transformer losses IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 6 of 13 April, 2011 DATASHEET TOCS CONTINUED DNL vs. Frequency (1dB Steps) -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Differential Non-Linearity (dB) .

30 MHz 50 MHz

80 MHz

120 MHz

DNL vs. Temperature (100 MHz, 1dB Steps) -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Differential Non-Linearity (dB) 85C 25C -40C DNL vs. Temperature (100 MHz, 0.25dB Steps) -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Differential Non-Linearity (dB) 85C25C -40C DNL vs. Voltage (100 MHz, 1dB Steps) -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Differential Non-Linearity (dB) 4.75V 5.00V 5.25V DNL vs. Temperature (100 MHz, 0.5dB Steps) -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Differential Non-Linearity (dB) 85C 25C -40C INL vs. Frequency -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 0.30 0.40 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Cumulative Gain Error (dB)

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 7 of 13 April, 2011 DATASHEET TOCS CONTINUED INL vs. Temperature (100 MHz) -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 0.30 0.40 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Cumulative Gain Error (dB) 85C 25C -40C Noise Figure vs. Frequency -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Noise Figure (dB) Noise Figure vs. Temperature (100 MHz) -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Noise Figure (dB) -40C 85C 25C INL vs. Voltage (100 MHz) -0.40 -0.30 -0.20 -0.10 0.00 0.10 0.20 0.30 0.40 -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Cumulative Gain Error (dB) 4.75V 5.00V 5.25V Noise Figure vs. Voltage (100 MHz) -1 1 3 5 7 9 11 13 15 17 19 21 Gain Setting (dB) Noise Figure (dB) 5.25V 4.75V 5.00V Output P1dB vs. Voltage

80 MHz 100 MHz 120 MHz

Frequency (MHz) Output P1dB (dBm) 5.25V 4.75V 5.00V IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 8 of 13 April, 2011 DATASHEET TOCS CONTINUED Output IP3 vs. Frequency Frequency (Hz) Output IP3 (dBm) IP3- IP3+ Output IP3 vs. Temperature (100 MHz) -1.25 10 22 Gain Setting (dB) Output IP3 (dBm) -40C 85C 25C Settling Time (16dB Step, 100 MHz) Output IP3 vs. Voltage (100 MHz) -1.25 10 22 Gain Setting (dB) Output IP3 (dBm) 5.25V 4.75V 5.00V 2nd Harmonic vs. Temperature (100 MHz) -100 -90 -80 -70 -60 -50 -1.25 10 22 Gain Setting (dB) 2nd Harmonic w/+3 Pout (dBc) -40C 85C 25C Settling Time (1 dB Step, 100 MHz) IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 9 of 13 April, 2011 DATASHEET PIN DIAGRAM Package Drawing 5 mm x 5 mm package dimension 3.25 mm x 3.25 mm exposed pad 0.5 mm pitch 28 pins 0.75 mm height 0.25 mm pad width 0.40 mm pad length TOP View (looking through the top of the package) ATTN_IN - ATTN_IN + ATTN_OUT+ ATTN_OUT- AMP_IN+ AMP_IN- AMP_OUT - AMP_OUT + VCC DIG ISET GND GND GND VMODE GC6 STBYVCC ATTN E_AMP GND Exposed Pad VCCAmp_Bias Bias_Amp GC5 GC4 GC3 GC2 GC1 GC0 DIG_GND 141098 1211 13 28 24 23 2226 2527 CO0.35mm IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 10 of 13 April, 2011 DATASHEET PACKAGE DRAWING IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 11 of 13 April, 2011 DATASHEET PIN DESCRIPTIONS Pin # Pin Name Function

1 GND

2 VCC_ATTN Attenuator Power Supply

3 ATTN_IN+ Attenuator_0 Differential Input P

4 ATTN_IN- Attenuator_0 Differential Input M

5 Ground Untested - SPI Chip Select Input

6 Ground Untested - SPI Data Input

7 Ground Untested - SPI Clock Input

8 GC6 Parallel Gain Control Input – MSB (16 dB step)

9 GC5 Parallel Gain Control Input

10 GC4 Parallel Gain Control Input

11 GC3 Parallel Gain Control Input

12 GC2 Parallel Gain Control Input

13 GC1 Parallel Gain Control Input

14 GC0 Parallel Gain Control Input – LSB (0.25 dB step)

15 VCC_DIG Digital Circuit Power Supply

16 DIG_GND Connect directly to Ground

17 VMODE Untested – SPI Enable

Connect to PCB GND for normal parallel operation

18 AMP_OUT+ Amplifier Differential Output P

19 AMP_OUT- Amplifier Differential Output M

20 STBY Amplifier Power Down. Ground for Normal operation 21 ISET Current Setting Resistor. Connect recommended value (2.87K) to ground. Use 1% tolerance

22 VCC_Amp_Bias Amplifier and Bias Circuit Power Supply

23 Bias_Amp Amplifier Bias External Pin for Decoupling Capacitor

24 AMP_IN+ Amplifier Differential Input P

25 E_Amp Amplifier Common Emitter

26 AMP_IN- Amplifier Differential Input M

27 ATTN_OUT- Attenuator_0 Differential Output M

28 ATTN_OUT+ Attenuator_0 Differential Output P

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 12 of 13 April, 2011 DATASHEET EVKIT / APPLICATIONS CIRCUIT SCHEMATIC The diagram below describes the recommended applications / EVkit circuit: C19 Vcc C10 Vcc Vcc C17 Vcc Coilcraft 1008CS JP1 Vcc ATTN_IN - ATTN_IN + ATTN_OUT+ ATTN_OUT- AMP_IN+ AMP_IN- AMP_OUT - AMP_OUT + VCC DIG ISET GND [CLK] GND [DATA] GND [CS] VMODE GC6 STBYVCC ATTN E_AMP GND VCCAmp_Bias Bias_Amp GC5 GC4 GC3 GC2 GC1 GC0 DIG_GND 141098 1211 13 28 24 23 2226 2527 SPI (Untested) Decode Logic Bias Control JP3 R13 Vcc JP5 13 11 9 7 5 3 1 C11 R11 C20 C23 C13 C24 C21 Vcc C22 2468101214 Vcc R14 R15 R16 R17 R18 R19 R20 GC6 GC5 GC4 GC3 GC2 GC1 GC0 IDT Proprietary

Intermediate Frequency Digital Variable Gain Amplifier IDTF1200 RevO Page 13 of 13 April, 2011 DATASHEET EVKIT & BOM (Email: RFsupport@IDT.com to request Controller SW and Cable) The picture and table below describes the recommended EVkit operation and BOM 5x5 QFN 5x5 QFN DeviceDevice EVB Serial #EVB Serial # Output 4:1 Balun Output 4:1 Balun TransformerTransformer DC PowerDC Power Power Up:Power Up:

  • •Closed = OnClosed = On
  • •Open = OffOpen = Off PullupPullup InductorsInductors VVMODEMODE
  • •Closed = Parallel ControlClosed = Parallel Control
  • •Open = Serial Control*Open = Serial Control* ATTN_IN ATTN_IN 50 50 ΩΩ AMP_OUT AMP_OUT 50 50 ΩΩ GC [0GC [0--6]6] SPI*SPI* Input 4:1 Balun Input 4:1 Balun TransformerTransformer * Serial Mode Untested, Not Guaranteed to Work VVCC CC REF / MONITORREF / MONITOR IISETSET Item # Value Size Desc Mfr. Part # Mfr. Ref Des 1 4:1 Balun SM-22 4:1 Center Tap Balun TC4-1TG2+ Mini Circuits T1,T2 2 2.87k 0402 RES 2.87K OHM 1/10W 1% 0402 SMD ERJ-2RKF2871X Panasonic R6 3 47k 0402 Pullup resistors for STBY and VMODE jumpers RC0402FR-0747KL Yageo R4, R13 4 0 0402 RES 0.0 OHM 1/10W 0402 SMD ERJ-2GE0R00X Panasonic R11 5 680 nH 1008 RF inductor, ceramic core, 5% tol, SMT, RoHS 1008CS-681XJLC Coilcraft L1,L2 6 10 nF 0402 CAP CER 10000PF 16V 10% X7R 0402 GRM155R71C103KA01D MURATA C1,C2,C8,C23,C24 7 1000 pF 0402 CAP CER 1000PF 50V C0G 0402 GRM1555C1H102JA01D MURATA C4,C10,C13,C19 8 0.1uF 0402 CAP CER .1UF 10V 10% X5R 0402 GRM155R61A104KA01D MURATA C9,C11,C17,C20 9 SMA .062 SMA_END_LAUNCH 142-0711-821 Emerson Johnson J1,J2,J3

10 Header_2Pin TH_2 CONN HEADER VERT SGL 2POS GOLD 961102-6404-AR 3M JP1,JP3

11 Header_14Pin TH_7x2 CONN HEADER 14 POS STRGHT GOLD N2514-6002-RB 3M JP5

12 F1200ZD QFN-28 IF VGA Q01B005M IDT U1

13 PCB F1200 EV Kit Rev 1

14 DNP 0402 Resistors to ground on Gain ctrl lines R14 thru R20