ST95P04 STMICROELECTRONICS | Alldatasheet

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S VCC ST95P04 HOLD VSS W Q C D Figure 1. Logic Diagram

1 MILLION ERASE/WRITE CYCLES

40 YEARS DATA RETENTION

1 MHz CLOCK RATE MAX

16 BYTE PAGE MODE

DESCRIPTION

The ST95P04 is a 4K bit Electrically Erasable Programmable Memory (EEPROM) fabricated with SGS-THOMSON’s High Endurance Single Polysili- con CMOS technology. The 4K bit memory is or- ganised as 32 pages of 16 bytes. The memory is accessed by a simple SPI bus compatible serial interface. The bus signals are a serial clock input (C), a serial data input (D) and a serial data output (Q). The device connected to the bus is selected when the chip select input ( S) goes low. Commu- nications with the chip can be interrupted with a hold input ( HOLD). The write operation is disabled by a write protect input (W). C Serial Clock D Serial Data Input Q Serial Data Output S Chip Select W Write Protect HOLD Hold V CC Supply Voltage VSS Ground Table 1. Signal Names

16 Bytes

Figure 3. Block Diagram

Figure 4. AC Testing Input Output Waveforms Note: 1. Sampled only, not 100% tested. Table 3. Input Parameters (1) (TA = 25 °C, f = 1 MHz ) Table 4. DC Characteristics

below 5ms, the maximum value will be reviewed and lowered when sufficient data is available. Table 5. AC Characteristics

Figure 7. Hold Timing are at a high impedance state. MSB of the address, otherwise, it is a don’t care.

decoded, Q is in Hi-Z) until it is deselected. bits BP1, BP0, WEL, WIP are valid and can be read. only bits WEL and WIP are valid and can be read. set to a ’0’ no write is in progress. set by the user issuing the WRSR instruction. These bits are non-volatile. the internal write sequence is not performed. Table 6. Array Addresses Protect Table 7. Instruction Set

the write enable latch is reset. with address xxxx 0000 and ends with xxxx 1111. Figure 8. Read Operation Sequence

– The device is in the low power standby state. – The chip is not in hold condition. – The write enable latch is reset. memory array or in the cycle status register). programming cycle continues. enters a wait state and waits for a deselect. – The write enable latch is reset upon power-up. fully erased state (all data set at all "1’s" or FFh). The block protect bits are initialized to 00. Figure 13. WRSR: Write Status Register Sequence

ORDERING INFORMATION SCHEME For a list of available options (Package, Temperature Range, etc...) refer to the current Memory Shortform catalogue. For further information on any aspect of this device, please contact the SGS-THOMSON Sales Office nearest to you. Notes:P * Data In strobed on rising edge of the clock (C) and Data Out synchronized from the falling edge of the clock. 3 * Temperature range on special request only. Data Strobe P * D Q Package B PSDIP8 0.25 mm Frame M SO8 1501mil Width Temperature Range 1 0 to 70 °C 6 –40 to 85 °C 3 * –40 to 125 °C Option TR Tape & Reel Packing Example: ST95P04 M 6 TR ST95P04

A L D E1 E N C eA eB B Symb mm inches Typ Min Max Typ Min Max A 3.90 5.90 0.154 0.232 A1 0.49 – 0.019 – A2 3.30 5.30 0.130 0.209 B 0.36 0.56 0.014 0.022 B1 1.15 1.65 0.045 0.065 C 0.20 0.36 0.008 0.014 D 9.20 9.90 0.362 0.390 E1 6.00 6.70 0.236 0.264 eA 7.80 – 0.307 – eB 10.00 0.394 L 3.00 3.80 0.118 0.150 N8 8 CP 0.10 0.004 PSDIP8 Drawing is not to scale PSDIP8 - 8 pin Plastic Skinny DIP, 0.25mm lead frame ST95P04

E N CP B e A D C LA1 α H h x 45˚ Symb mm inches Typ Min Max Typ Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 0.90 0.016 0.035 α 0° 8° 0° 8° N8 8 CP 0.10 0.004 SO8 Drawing is not to scale SO8 - 8 lead Plastic Small Outline, 150 mils body width ST95P04

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. © 1996 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. ST95P04