PCA9535 PHILIPS
Document overview
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Technical content
16-bit I2C and SMBus, low power I/O port with interrupt Product data 2003 Jun 27 INTEGRATED CIRCUITS
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
22003 Jun 27
FEATURES
- Operating power supply voltage range of 2.3 V-5.5 V
- 5 V tolerant I/Os
- Polarity inversion register
- Active LOW interrupt output
- Low stand-by current
- Noise filter on SCL/SDA inputs
- No glitch on power-up
- Internal power-on reset
- 16 I/O pins which default to 16 inputs
- 0 to 400 kHz clock frequency
- ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101
- Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA
- Offered in three different packages: SO24, TSSOP24, and HVQFN24
DESCRIPTION
The PCA9535 is a 24-pin CMOS device that provide 16 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C/SMBus applications and was developed to enhance the Philips family of I2C I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, LEDs, fans, etc. The PCA9535 consist of two 8-bit Configuration (Input or Output selection); Input, Output and Polarity inversion (Active HIGH or Active LOW operation) registers. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion Register. All registers can be read by the system master. Although pin-to-pin and I 2C address compatible with the PCF8575, software changes are required due to the enhancements and are discussed in Application Note AN469. The PCA9535 is identical to the PCA9555 except for the removal of the internal I/O pull-up resistor which greatly reduces power consumption when the I/Os are held LOW. The PCA9535 open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. Three hardware pins (A0, A1, A2) vary the fixed I2C address and allow up to eight devices to share the same I 2C/SMBus. The fixed I2C address of the PCA9535 is the same as the PCA9554 allowing up to eight of these devices in any combination to share the same I2C/SMBus.
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE ORDER CODE TOPSIDE MARK DRAWING NUMBER 24-Pin Plastic SO -40 to +85 °C PCA9535D PCA9535D SOT137-1 24-Pin Plastic TSSOP -40 to +85 °C PCA9535PW PCA9535PW SOT355-1 24-Pin Plastic HVQFN -40 to +85 °C PCA9535BS 9535 SOT616-1 Standard packing quantities and other packing data are available at www.philipslogic.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I 2C patent.
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Figure 1. Pin configuration — SO, TSSOP Figure 2. Pin configuration — HVQFN
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Figure 3. Block diagram
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NOTE: At Power-on Reset, all registers return to default values. Figure 4. Simplified schematic of I/Os above VDD to a maximum of 5.5 V.
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0 Input port 0
1 Input port 1
2 Output port 0
3 Output port 1
4 Polarity inversion port 0
5 Polarity inversion port 1
6 Configuration port 0
7 Configuration port 1
following registers will be written or read. output by Register 3. Writes to this register have no effect. controlling the output selection, NOT the actual pin value. with a ‘0’), the Input Port data polarity is retained. an output. At reset the device’s ports are inputs. SMBus state machine will initialize to their default states. Figure 5. PCA9535 address be updated independently of the other registers. after the address and determines which register will be accessed. read of Port 1 or the other way around. contents of the Input Port register.
NOTES: Transfer of data can be stopped at any moment by a STOP condition. When this occurs, data present at the latest acknowledge pha se is valid (output mode). It is assumed that the command byte has previously been set to 00 (read input port port register). Figure 10. READ input port register — scenario 2
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10 DIGIT
Figure 11. Typical application specified as ∆IDD in the DC characteristics table. Figure 12. High value resistor in parallel with the LED Figure 13. Device supplied by a lower voltage
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
2003 Jun 27 11
In accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN MAX UNIT VDD Supply voltage -0.5 6.0 V VI/O DC input current on an I/O VSS - 0.5 6 V II/O DC output current on an I/O — ± 50 mA II DC input current — ± 20 mA IDD Supply current — 160 mA ISS Supply current — 200 mA Ptot Total power dissipation — 200 mW Tstg Storage temperature range -65 +150 °C Tamb Operating ambient temperature -40 +85 °C
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
2003 Jun 27 12
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirab le to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”. DC CHARACTERISTICS VDD = 2.3 to 5.5 V; VSS = 0 V; Tamb = -40 to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Supplies VDD Supply voltage 2.3 — 5.5 V IDD Supply current Operating mode; VDD = 5.5 V; no load; fSCL = 100 kHz; I/O = inputs — 135 200 µA Istbl Standby current Standby mode; VDD = 5.5 V; no load; VI = VSS; fSCL = 0 kHz; I/O = inputs — 0.25 1 µA Istbh Standby current Standby mode; VDD = 5.5 V; no load; VI = VDD; fSCL = 0 kHz; I/O = inputs — 0.25 1 µA VPOR Power-on reset voltage No load; VI = VDD or VSS — 1.5 1.65 V input SCL; input/output SDA VIL LOW-level input voltage -0.5 — 0.3 VDD V VIH HIGH-level input voltage 0.7 VDD — 5.5 V IOL LOW-level output current VOL = 0.4V 3 — — mA IL Leakage current VI = VDD = VSS -1 — +1 µA CI Input capacitance VI = VSS — 6 10 pF I/Os VIL LOW-level input voltage -0.5 — 0.8 V VIH HIGH-level input voltage 2.0 — 5.5 V VOL = 0.5 V; VDD = 2.3-5.5 V; Note 1 8 8-20 — mA IOL LOW-level output current VOL = 0.7 V; VDD = 2.3-5.5 V; Note 1 10 10-24 — mA IOH = -8 mA; V DD = 2.3 V; Note 2 1.8 — — V IOH = -10 mA; V DD = 2.3 V; Note 2 1.7 — — V IOH = -8 mA; V DD = 3.0 V; Note 2 2.6 — — V VOH HIGH-level output voltage IOH = -10 mA; V DD = 3.0 V; Note 2 2.5 — — V IOH = -8 mA; V DD = 4.75 V; Note 2 4.1 — — V IOH = -10 mA; V DD = 4.75 V; Note 2 4.0 — — V IIH Input leakage current VDD = 5.5 V; VI = VDD — — 1 µA IIL Input leakage current VDD = 5.5 V; VI = VSS — — -1 µA CI Input capacitance — 3.7 5 pF CO Output capacitance — 3.7 5 pF Interrupt INT IOL LOW-level output current VOL = 0.4 V 3 — — mA Select Inputs A0, A1, A2 VIL LOW-level input voltage -0.5 — 0.8 V VIH HIGH-level input voltage 2.0 — 5.5 V ILI Input leakage current -1 — 1 µA NOTES: 1. The total current sunk by all I/Os must be limited to 200 mA. 2. The total current sourced by all I/Os must be limited to 160 mA.
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Figure 14. Definition of timing
- C b = total capacitance of one bus line in pF.
- t VD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
- t VD;DAT = minimum time for SDA data out to be valid following SCL LOW.
- t PV measured from 0.7VDD on SCL to 50% I/O output.
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Figure 15. tPV set-up conditions
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
2003 Jun 27 15
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
2003 Jun 27 16
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm SOT355-1
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
2003 Jun 27 17
HVQFN24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 4 x 4 x 0.85 mm SOT616-1
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
2003 Jun 27 18
REVISION HISTORY
_1 20030627 Product data (9397 750 11681); ECN 853-2430 30019 dated 11 June 2003. Initial version
Philips Semiconductors Product data PCA953516-bit I2C and SMBus, low power I/O port with interrupt
2003 Jun 27 19
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I 2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors ma ke no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products ca n reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products— including circuits, standard cells, and/or software— described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: Koninklijke Philips Electronics N.V. 2003 All rights reserved. Printed in U.S.A. Date of release: 06-03 Document order number: 9397 750 11681 Philips Semiconductors Data sheet status[1] Objective data Preliminary data Product data Product status[2] [3] Development Qualification Production Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Data sheet status [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The l atest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Level I II III