PCA9534 PHILIPS
Document overview
- Manufacturer or author: Provided By www.digicamel.com(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 17
Technical content
8-bit I2C and SMBus, low power I/O port with interrupt Product data sheet Supersedes data of 2003 Dec 02
2004 Sep 30
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
22004 Sep 30
FEATURES
- 8-bit I2C GPIO
- Operating power supply voltage range of 2.3 V to 5.5 V
- 5 V tolerant I/Os
- Polarity inversion register
- Active low interrupt output
- Low stand-by current
- Noise filter on SCL/SDA inputs
- No glitch on power-up
- Internal power-on reset
- 8 I/O pins which default to 8 inputs
- 0 kHz to 400 kHz clock frequency
- ESD protection exceeds 2000 V HBM per JESD22-A114,
200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101
- Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA
- Offered in three different packages: SO16, TSSOP16, and HVQFN16
DESCRIPTION
The PCA9534 is a16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C/SMBus applications and was developed to enhance the Philips family of I2C I/O expanders. The improvements include higher drive capability, 5V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, LEDs, fans, etc. The PCA9534 consist of an 8-bit Configuration register (Input or Output selection); 8-bit Input register, 8-bit Output register and an 8-bit Polarity inversion register (Active HIGH or Active LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the input port register can be inverted with the Polarity Inversion Register. All registers can be read by the system master. Although pin-to-pin and I 2C address compatible with the PCF8574 series, software changes are required due to the enhancements and are discussed in Application Note AN469. The PCA9534 is identical to the PCA9554 except for the removal of the internal I/O pull-up resistor which greatly reduces power consumption when the I/Os are held LOW. The PCA9534 open-drain interrupt output is activated when any input state differs from its corresponding input port register state and is used to indicate to the system master that an input state has changed. The power-on reset sets the registers to their default values and initializes the device state machine. Three hardware pins (A0, A1, A2) vary the fixed I 2C address and allow up to eight devices to share the same I2C/SMBus.
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE ORDER CODE TOPSIDE MARK DRAWING NUMBER 16-Pin Plastic SO (wide) –40 °C to +85 °C PCA9534D PCA9534D SOT162-1 16-Pin Plastic TSSOP –40 °C to +85 °C PCA9534PW PCA9534 SOT403-1 16-Pin Plastic HVQFN –40 °C to +85 °C PCA9534BS 9534 SOT629-1 Standard packing quantities and other packing data are available at www.standardproducts.philips.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent.
2004 Sep 30 3
Figure 1. Pin configuration — SO, TSSOP Figure 2. Pin Configuration — HVQFN Figure 3. Block diagram
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 4
0 Read byte Input port register
1 Read/write byte Output port register
2 Read/write byte Polarity inversion register
3 Read/write byte Configuration register
The command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read. Register 0 – Input Port Register bit I7 I6 I5 I4 I3 I2 I1 I0 default X X X X X X X X This register is a read only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by Register 3. Writes to this register have no effect. The default value ‘X’ is determined by the externally applied logic level. Register 1 – Output Port Register bit O7 O6 O5 O4 O3 O2 O1 O0 default 1 1 1 1 1 1 1 1 This register reflects the outgoing logic levels of the pins defined as outputs by Register 3. Bit values in this register have no effect on pins defined as inputs. Reads from this register return the value that is in the flip-flop controlling the output selection, NOT the actual pin value. Register 2 – Polarity Inversion Register bit N7 N6 N5 N4 N3 N2 N1 N0 default 0 0 0 0 0 0 0 0 This register allows the user to invert the polarity of the Input Port Register data. If a bit in this register is set (written with ‘1’), the corresponding Input Port data is inverted. If a bit in this register is cleared (written with a ‘0’), the Input Port data polarity is retained. Register 3 – Configuration Register bit C7 C6 C5 C4 C3 C2 C1 C0 default 1 1 1 1 1 1 1 1 This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs. Power-on Reset When power is applied to VDD , an internal power-on reset holds the PCA9534 in a reset condition until VDD has reached VPOR . At that point, the reset condition is released and the PCA9534 registers and state machine will initialize to their default states. Thereafter, V DD must be lowered below 0.2 V to reset the device. For a power reset cycle, VDD must be lowered below 0.2 V and then restored to the operating voltage. Interrupt Output The open-drain interrupt output is activated when one of the port pins change state and the pin is configured as an input. The interrupt is deactivated when the input returns to its previous state or the input port register is read. Note that changing an I/O from an output to an input may cause a false interrupt to occur if the state of the pin does not match the contents of the input port register.
2004 Sep 30 5
NOTE: At Power-on Reset, all registers return to default values. Figure 4. Simplified schematic of I/O0 to I/O7 above VDD to a maximum of 5.5 V.
2004 Sep 30 6
Figure 5. PCA9534 address sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent. Figure 6. WRITE to output port register Figure 7. WRITE to configuration or polarity inversion registers
2004 Sep 30 7
Figure 8. READ from register
- This figure assumes the command byte has previously been programmed with 00h.
- Transfer of data can be stopped at any moment by a stop condition.
Figure 9. READ input port register
2004 Sep 30 8
Figure 10. Typical application specified as ΔIDD in the DC characteristics table. Figure 11. High value resistor in parallel with the LED Figure 12. Device supplied by a lower voltage
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 9
In accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN MAX UNIT VDD Supply voltage –0.5 6.0 V II DC input current — ±20 mA VI/O DC voltage on an I/O VSS – 0.5 5.5 V II/O DC output current on an I/O — ±50 mA IDD Supply current — 85 mA ISS Supply current — 100 mA Ptot Total power dissipation — 200 mW Tstg Storage temperature range –65 +150 °C Tamb Operating ambient temperature –40 +85 °C
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 10
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under “Handling MOS devices”. DC CHARACTERISTICS VDD = 2.3 V to 5.5 V; VSS = 0 V; Tamb = –40 °C to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT Supplies VDD Supply voltage 2.3 — 5.5 V IDD Supply current Operating mode; VDD = 5.5 V; no load; fSCL = 100 kHz — 104 175 µA Istbl Standby current Standby mode; VDD = 5.5 V; no load; VI = VSS ; fSCL = 0 kHz; I/O = inputs — 0.25 1 µA Istbh Standby current Standby mode; VDD = 5.5 V; no load; VI = VDD ; fSCL = 0 kHz; I/O = inputs — 0.25 1 µA VPOR Power-on reset voltage (Note 1) No load; VI = VDD or VSS — 1.5 1.65 V Input SCL; input/output SDA VIL LOW-level input voltage –0.5 — 0.3VDD V VIH HIGH-level input voltage 0.7VDD — 5.5 V IOL LOW-level output current VOL = 0.4 V 3 — — mA IL Leakage current VI = VDD = VSS –1 — +1 µA C I Input capacitance VI = VSS — 5 10 pF I/Os VIL LOW-level input voltage –0.5 — 0.8 V VIH HIGH-level input voltage 2.0 — 5.5 V VOL = 0.5 V; VDD = 2.3 V; Note 2 8 10 — mA VOL = 0.7 V; VDD = 2.3 V; Note 2 10 13 — mA IO LOW level output current VOL = 0.5 V; VDD = 4.5 V; Note 2 8 17 — mA IOL LOW -level output current VOL = 0.7 V; VDD = 4.5 V; Note 2 10 24 — mA VOL = 0.5 V; VDD = 3.0 V; Note 2 8 14 — mA VOL = 0.7 V; VDD = 3.0 V; Note 2 10 19 — mA IOH = –8 mA; VDD = 2.3 V; Note 3 1.8 — — V IOH = –10 mA; VDD = 2.3 V; Note 3 1.7 — — V VO HIGH level output voltage IOH = –8 mA; VDD = 3.0 V; Note 3 2.6 — — V VOH HIGH -level output voltage IOH = –10 mA; VDD = 3.0 V; Note 3 2.5 — — V IOH = –8 mA; VDD = 4.5 V; Note 3 4.1 — — V IOH = –10 mA; VDD = 4.5 V; Note 3 4.0 — — V IIL Input leakage current VI = VDD = VSS –1 — 1 µA C I Input capacitance — 5 10 pF Interrupt INT IOL LOW-level output current VOL = 0.4 V 3 — — mA Select Inputs A0, A1, A2 VIL LOW-level input voltage –0.5 — 0.8 V VIH HIGH-level input voltage 2.0 — 5.5 V ILI Input leakage current –1 — 1 µA NOTES: 1. VDD must be lowered to 0.2 V in order to reset part. 2. Each I/O must be externally limited to a maximum of 25 mA and the device must be limited to a maximum current of 100 mA. 3. The total current sourced by all I/Os must be limited to 85 mA.
2004 Sep 30 11
Figure 13. Definition of timing
- Cb = total capacitance of one bus line in pF.
- tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW.
- tVD;DAT = minimum time for SDA data out to be valid following SCL LOW.
2004 Sep 30 12
Figure 14. I2C-bus timing diagram; rise and fall times refer to VIL and VIH impedance ZO of the pulse generators. Figure 15. Test circuitry for switching times Figure 16. Test circuit
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 13
SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 14
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 15
HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 x 4 x 0.85 mm SOT629-1
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 16
REVISION HISTORY
_2 20040930 Product data sheet (9397 750 13506); Supersedes data of 02 December 2003 (9397 750 12454). Modifications:
- “Register 0—Input Port Register” section on page 4: add second paragraph.
- Section “Power-on reset” on page 4 re-written.
- Figure 10: resistor values modified
- (New) Note 1 added to DC Characteristics table on page 10.
- “DC Characteristics” table: Note 2 re-written. _1 20031202 Product data (9397 750 12454); ECN 853-2319 01-A14517 dated 14 November 2003.
Philips Semiconductors Product data sheet PCA95348-bit I2C and SMBus low power I/O port with interrupt
2004 Sep 30 17
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: Koninklijke Philips Electronics N.V. 2004 All rights reserved. Published in the U.S.A. Date of release: 09-04 Document number: 9397 750 13506 Philips Semiconductors Data sheet status[1] Objective data Preliminary data Product data Product status[2] [3] Development Qualification Production Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Data sheet status [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Level I II III