93C56B-E/MSG

93AA66A_05 MICROCHIP | Alldatasheet

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© 2005 Microchip Technology Inc. DS21795C-page 1 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C Device Selection Table Features:

• Low-power CMOS technology
• ORG pin to select word size for ‘66C’ version
• 512 x 8-bit organization ‘A’ ver. devices (no ORG)
• 256 x 16-bit organization ‘B’ ver. devices (no ORG)
• Self-timed erase/write cycles (including auto-erase)
• Automatic ERAL before WRAL
• Power-on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device Status signal (Ready/Busy)
• Sequential read function
• 1,000,000 E/W cycles
• Data retention > 200 years
• Temperature ranges supported: Pin Function Table Description: The Microchip Technology Inc. 93XX66A/B/C devices are 4K bit low-voltage serial Electrically Erasable PROMs (EEPROM). Word-selectable devices such as the 93AA66C, 93LC66C or 93C66C are dependent upon external logic levels driving the ORG pin to set word size. For dedicated 8-bit communication, the 93XX66A devices are available, while the 93XX66B devices provide dedicated 16-bit communication. Advanced CMOS technology makes these devices ideal for low-power, nonvolatile memory applications. The entire 93XX Series is available in standard packages including 8-lead PDIP and SOIC, and advanced packaging including 8-lead MSOP, 6-lead SOT-23, 8-lead 2x3 DFN and 8-lead TSSOP. Pb-free (Pure Matte Sn) finish is available. Part Number VCC Range ORG Pin Word Size Temp Ranges Packages 93AA66A 1.8-5.5 No 8-bit I P, SN, ST, MS, OT, MC 93AA66B 1.8-5-5 No 16-bit I P, SN, ST, MS, OT, MC 93LC66A 2.5-5.5 No 8-bit I, E P, SN, ST, MS, OT, MC 93LC66B 2.5-5.5 No 16-bit I, E P, SN, ST, MS, OT, MC 93C66A 4.5-5.5 No 8-bit I, E P, SN, ST, MS, OT, MC 93C66B 4.5-5.5 No 16-bit I, E P, SN, ST, MS, OT, MC 93AA66C 1.8-5.5 Yes 8 or 16-bit I P, SN, ST, MS, MC 93LC66C 2.5-5.5 Yes 8 or 16-bit I, E P, SN, ST, MS, MC 93C66C 4.5-5.5 Yes 8 or 16-bit I, E P, SN, ST, MS, MC - Industrial (I) -40°C to +85°C - Automotive (E) -40°C to +125°C Name Function CS Chip Select CLK Serial Data Clock DI Serial Data Input DO Serial Data Output VSS Ground NC No internal connection ORG Memory Configuration VCC Power Supply 4K Microwire Compatible Serial EEPROM

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 2 © 2005 Microchip Technology Inc. Package Types (not to scale) CS CLK DI DO VCC NC ORG* VSS PDIP/SOIC (P, SN) CS CLK DI DO VCC NC ORG* VSS ROTATED SOIC (ex: 93LC46BX) TSSOP/MSOP CS CLK DI DO VCC NC ORG* VSS (ST, MS) SOT-23 DO VSS DI VCC CS CLK (OT) * ORG pin is NC on A/B devices DFN CS CLK DI DO NC ORG* VSS VCC

© 2005 Microchip Technology Inc. DS21795C-page 3 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C 1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings(†) TABLE 1-1: DC CHARACTERISTICS † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. All parameters apply over the specified ranges unless otherwise noted. Industrial (I): TA = -40°C to +85°C, VCC = +1.8V to +5.5V Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V Param. No. Symbol Parameter Min Typ Max Units Conditions VIH1 VIH2 High-level input voltage 2.0

0.7 VCC

V V VCC ≥ 2.7V VCC < 2.7V VIL1 VIL2 Low-level input voltage -0.3 -0.3 0.8

0.2 VCC

V V VCC ≥ 2.7V VCC < 2.7V VOL1 VOL2 Low-level output voltage 0.4 0.2 V V IOL = 2.1 mA, VCC = 4.5V IOL = 100 μA, VCC = 2.5V VOH1 VOH2 High-level output voltage 2.4 VCC - 0.2 V V IOH = -400 μA, VCC = 4.5V IOH = -100 μA, VCC = 2.5V ILI Input leakage current μA VIN = VSS or VCC ILO Output leakage current μA VOUT = VSS or VCC CIN, COUT Pin capacitance (all inputs/ outputs) pF VIN/VOUT = 0V (Note 1) TA = 25°C, FCLK = 1 MHz ICC write Write current 500 mA μA FCLK = 3 MHz, Vcc = 5.5V FCLK = 2 MHz, Vcc = 2.5V ICC read Read current 100 500 mA μA μA FCLK = 3 MHz, VCC = 5.5V FCLK = 2 MHz, VCC = 3.0V FCLK = 2 MHz, VCC = 2.5V D10 ICCS Standby current μA μA I – Temp E – Temp CLK = Cs = 0V ORG = DI = VSS or VCC (Note 2) (Note 3) D11 VPOR VCC voltage detect 93AA66A/B/C, 93LC66A/B/C 93C66A/B/C 1.5V 3.8V V V (Note 1) Note 1: This parameter is periodically sampled and not 100% tested. ORG pin not available on ‘A’ or ‘B’ versions. Ready/Busy status must be cleared from DO, see Section 3.4 "Data Out (DO)".

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 4 © 2005 Microchip Technology Inc. TABLE 1-2: AC CHARACTERISTICS All parameters apply over the specified ranges unless otherwise noted. Industrial (I): TA = -40°C to +85°C, VCC = +1.8V to +5.5V Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V Param. No. Symbol Parameter Min Max Units Conditions FCLK Clock frequency MHz MHz MHz 4.5V ≤ VCC < 5.5V, 93XX66C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V TCKH Clock high time 200 250 450 ns ns ns 4.5V ≤ VCC < 5.5V, 93XX66C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V TCKL Clock low time 100 200 450 ns ns ns 4.5V ≤ VCC < 5.5V, 93XX66C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V TCSS Chip Select setup time 100 250 ns ns ns 4.5V ≤ VCC < 5.5V 2.5V ≤ VCC < 4.5V 1.8V ≤ VCC < 2.5V TCSH Chip Select hold time ns 1.8V ≤ VCC < 5.5V TCSL Chip Select low time 250 ns 1.8V ≤ VCC < 5.5V TDIS Data input setup time 100 250 ns ns ns 4.5V ≤ VCC < 5.5V, 93XX66C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V TDIH Data input hold time 100 250 ns ns ns 4.5V ≤ VCC < 5.5V, 93XX66C only 2.5V ≤ VCC < 5.5V 1.8V ≤ VCC < 2.5V TPD Data output delay time 200 250 400 ns ns ns 4.5V ≤ VCC < 5.5V, CL = 100 pF 2.5V ≤ VCC < 4.5V, CL = 100 pF 1.8V ≤ VCC < 2.5V, CL = 100 pF A10 TCZ Data output disable time 100 200 ns ns 4.5V ≤ VCC < 5.5V, (Note 1) 1.8V ≤ VCC < 4.5V, (Note 1) A11 TSV Status valid time 200 300 500 ns ns ns 4.5V ≤ VCC < 5.5V, CL = 100 pF 2.5V ≤ VCC < 4.5V, CL = 100 pF 1.8V ≤ VCC < 2.5V, CL = 100 pF A12 TWC Program cycle time ms Erase/Write mode (AA and LC versions) A13 TWC ms Erase/Write mode (93C versions) A14 TEC ms ERAL mode, 4.5V ≤ VCC ≤ 5.5V A15 TWL ms WRAL mode, 4.5V ≤ VCC ≤ 5.5V A16 Endurance cycles 25°C, VCC = 5.0V, (Note 2) Note 1: This parameter is periodically sampled and not 100% tested. This application is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance™ Model which may be obtained from Microchip’s web site at www.microchip.com.

© 2005 Microchip Technology Inc. DS21795C-page 5 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C FIGURE 1-1: SYNCHRONOUS DATA TIMING TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX66B OR 93XX66C WITH ORG = 1) TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX66A OR 93XX66C WITH ORG = 0) Instruction SB Opcode Address Data In Data Out Req. CLK Cycles ERASE (RDY/BSY) ERAL X X X X X X (RDY/BSY) EWDS X X X X X X High-Z EWEN X X X X X X High-Z READ D15 – D0 WRITE D15 – D0 (RDY/BSY) WRAL X X X X X X D15 – D0 (RDY/BSY) Instruction SB Opcode Address Data In Data Out Req. CLK Cycles ERASE A8 A7 A6 A5 A4 A3 A2 A1 A0 (RDY/BSY) ERAL X X X X X X X (RDY/BSY) EWDS X X X X X X X High-Z EWEN X X X X X X X High-Z READ A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0 WRITE A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0 (RDY/BSY) WRAL X X X X X X X D7 – D0 (RDY/BSY) CS VIH VIL VIH VIL VIH VIL VOH VOL VOH VOL CLK DI DO (Read) DO (Program) TCSS TDIS TCKH TCKL TDIH TPD TCSH TPD TCZ Status Valid TSV TCZ Note: TSV is relative to CS.

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 6 © 2005 Microchip Technology Inc. 2.0 FUNCTIONAL DESCRIPTION When the ORG* pin is connected to VCC, the (x16) organization is selected. When it is connected to ground, the (x8) organization is selected. Instructions, addresses and write data are clocked into the DI pin on the rising edge of the clock (CLK). The DO pin is normally held in a High-Z state except when reading data from the device, or when checking the Ready/ Busy status during a programming operation. The Ready/Busy status can be verified during an Erase/ Write operation by polling the DO pin; DO low indicates that programming is still in progress, while DO high indicates the device is ready. DO will enter the High-Z state on the falling edge of CS. 2.1 Start Condition The Start bit is detected by the device if CS and DI are both high with respect to the positive edge of CLK for the first time. Before a Start condition is detected, CS, CLK and DI may change in any combination (except to that of a Start condition), without resulting in any device operation (Read, Write, Erase, EWEN, EWDS, ERAL or WRAL). As soon as CS is high, the device is no longer in Standby mode. An instruction following a Start condition will only be executed if the required opcode, address and data bits for any particular instruction are clocked in. 2.2 Data In/Data Out (DI/DO) It is possible to connect the Data In and Data Out pins together. However, with this configuration it is possible for a “bus conflict” to occur during the “dummy zero” that precedes the read operation, if A0 is a logic high level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out and the signal source driving A0. The higher the current sourcing capability of A0, the higher the voltage at the Data Out pin. In order to limit this current, a resistor should be connected between DI and DO. 2.3 Data Protection All modes of operation are inhibited when VCC is below a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices or 3.8V for ‘93C’ devices. The EWEN and EWDS commands give additional protection against accidentally programming during normal operation. Note: For added protection, an EWDS command should be performed after every write operation. After power-up, the device is automatically in the EWDS mode. Therefore, an EWEN instruction must be performed before the initial ERASE or WRITE instruction can be executed. Block Diagram Note: When preparing to transmit an instruction, either the CLK or DI signal levels must be at a logic low as CS is toggled active high. Memory Array Data Register Mode Decode Logic Clock Register Address Decoder Address Counter Output Buffer DO DI ORG* CS CLK VCC VSS *ORG input is not available on A/B devices

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 12 © 2005 Microchip Technology Inc. 3.0 PIN DESCRIPTIONS TABLE 3-1: PIN DESCRIPTIONS 3.1 Chip Select (CS) A high level selects the device; a low level deselects the device and forces it into Standby mode. However, a programming cycle which is already in progress will be completed, regardless of the Chip Select (CS) input signal. If CS is brought low during a program cycle, the device will go into Standby mode as soon as the programming cycle is completed. CS must be low for 250 ns minimum (TCSL) between consecutive instructions. If CS is low, the internal control logic is held in a Reset status. 3.2 Serial Clock (CLK) The Serial Clock is used to synchronize the communi- cation between a master device and the 93XX series device. Opcodes, address and data bits are clocked in on the positive edge of CLK. Data bits are also clocked out on the positive edge of CLK. CLK can be stopped anywhere in the transmission sequence (at high or low level) and can be continued anytime with respect to Clock High Time (TCKH) and Clock Low Time (TCKL). This gives the controlling master freedom in preparing opcode, address and data. CLK is a “don’t care” if CS is low (device deselected). If CS is high, but the Start condition has not been detected (DI = 0), any number of clock cycles can be received by the device without changing its status (i.e., waiting for a Start condition). CLK cycles are not required during the self-timed write (i.e., auto erase/write) cycle. After detection of a Start condition the specified number of clock cycles (respectively low-to-high transitions of CLK) must be provided. These clock cycles are required to clock in all required opcode, address and data bits before an instruction is executed. CLK and DI then become “don’t care” inputs waiting for a new Start condition to be detected. 3.3 Data In (DI) Data In (DI) is used to clock in a Start bit, opcode, address and data synchronously with the CLK input. 3.4 Data Out (DO) Data Out (DO) is used in the Read mode to output data synchronously with the CLK input (TPD after the posi- tive edge of CLK). This pin also provides Ready/Busy status information during erase and write cycles. Ready/Busy status infor- mation is available on the DO pin if CS is brought high after being low for minimum Chip Select Low Time (TCSL) and an erase or write operation has been initiated. The Status signal is not available on DO, if CS is held low during the entire erase or write cycle. In this case, DO is in the High-Z mode. If status is checked after the erase/write cycle, the data line will be high to indicate the device is ready. Note: Issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. 3.5 Organization (ORG) When the ORG pin is connected to VCC or Logic HI, the (x16) memory organization is selected. When the ORG pin is tied to VSS or Logic LO, the (x8) memory organization is selected. For proper operation, ORG must be tied to a valid logic level. 93XX66A devices are always x8 organization and 93XX66B devices are always x16 organization. Name SOIC/PDIP/ MSOP/TSSOP/ DFN SOT-23 Rotated SOIC Function CS Chip Select CLK Serial Clock DI Data In DO Data Out VSS Ground ORG/NC N/A Organization / 93XX66C No Internal Connection / 93XX66A/B NC N/A No Internal Connection VCC Power Supply

© 2005 Microchip Technology Inc. DS21795C-page 13 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C 4.0 PACKAGING INFORMATION 4.1 Package Marking Information Example: 6-Lead SOT-23 8-Lead MSOP (150 mil) Example: XXXXXXT YWWNNN 3L66BI 5281L7 XXNN 3EL7 T/XXXNNN XXXXXXXX YYWW 8-Lead PDIP 8-Lead SOIC XXXXYYWW XXXXXXXT NNN XXXX TYWW 8-Lead TSSOP NNN I/P 1L7 93LC66B 0528 Example: Example: SN 0528 93LC66BI 1L7 1L7 L66B I528 Example: e e 8-Lead 2x3 DFN Example: 374 528 XXX YWW NN

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 14 © 2005 Microchip Technology Inc. Note: T = Temperature grade (I, E) NN = Alphanumeric traceability code Part Number 1st Line Marking Codes TSSOP MSOP SOT-23 DFN I Temp. E Temp. I Temp. E Temp. 93AA66A A66A 3A66AT 3BNN 361 93AA66B A66B 3A66BT 3LNN 371 93AA66C A66C 3A66CT 381 93LC66A L66A 3L66AT 3ENN 3FNN 364 365 93LC66B L66B 3L66BT 3PNN 3RNN 374 375 93LC66C L66C 3L66CT 384 385 93C66A C66A 3C66AT 3HNN 3JNN 367 368 93C66B C66B 3C66BT 3TNN 3UNN 377 378 93C66C C66C 3C66CT 387 388 Legend: XX...X Part number or part number code T Temperature (I, E) Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) NNN Alphanumeric traceability code (2 characters for small packages) Pb-free JEDEC designator for Matte Tin (Sn) Note: For very small packages with no room for the Pb-free JEDEC designator , the marking will only appear on the outer carton or reel label. Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. e e

© 2005 Microchip Technology Inc. DS21795C-page 15 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) D A L c (F) α E p B n φ β Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not .037 REF F Footprint (Reference) exceed .010" (0.254mm) per side. Notes: Drawing No. C04-111 *Controlling Parameter Mold Draft Angle Top Mold Draft Angle Bottom Foot Angle Lead Width Lead Thickness β α c B φ .003 .009 .006 .012 Dimension Limits Overall Height Molded Package Thickness Molded Package Width Overall Length Foot Length Standoff Overall Width Number of Pins Pitch A L D E .016 .024 .118 BSC .118 BSC .000 .030 .193 TYP. .033 MIN p n Units .026 BSC NOM INCHES

0.95 REF

.009 .016 0.08 0.22 0.23 0.40 MILLIMETERS*

0.65 BSC

0.85

3.00 BSC

0.60

4.90 BSC

.043 .031 .037 .006 0.40 0.00 0.75 MIN MAX NOM 1.10 0.80 0.15 0.95 MAX 15° 15° JEDEC Equivalent: MO-187 15° 15°

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 16 © 2005 Microchip Technology Inc. 6-Lead Plastic Small Outline Transistor (OT) (SOT-23) β Mold Draft Angle Bottom α Mold Draft Angle Top 0.50 0.43 0.35 .020 .017 .014 B Lead Width 0.20 0.15 0.09 .008 .006 .004 c Lead Thickness φ Foot Angle 0.55 0.45 0.35 .022 .018 .014 L Foot Length 3.10 2.95 2.80 .122 .116 .110 D Overall Length 1.75 1.63 1.50 .069 .064 .059 Molded Package Width 3.00 2.80 2.60 .118 .110 .102 E Overall Width 0.15 0.08 0.00 .006 .003 .000 Standoff 1.30 1.10 0.90 .051 .043 .035 Molded Package Thickness 1.45 1.18 0.90 .057 .046 .035 A Overall Height 1.90 .075 Outside lead pitch (basic) 0.95 .038 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units D B n E L c β φ α A exceed .005" (0.127mm) per side. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not Notes: JEITA (formerly EIAJ) equivalent: SC-74A Drawing No. C04-120 *Controlling Parameter

© 2005 Microchip Technology Inc. DS21795C-page 17 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) B A L p α E eB β c n D Units INCHES* MILLIMETERS Dimension Limits MIN NOM MAX MIN NOM MAX Number of Pins n Pitch p .100 2.54 Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32 Molded Package Thickness .115 .130 .145 2.92 3.30 3.68 Base to Seating Plane .015 0.38 Shoulder to Shoulder Width E .300 .313 .325 7.62 7.94 8.26 Molded Package Width .240 .250 .260 6.10 6.35 6.60 Overall Length D .360 .373 .385 9.14 9.46 9.78 Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43 Lead Thickness c .008 .012 .015 0.20 0.29 0.38 Upper Lead Width .045 .058 .070 1.14 1.46 1.78 Lower Lead Width B .014 .018 .022 0.36 0.46 0.56 Overall Row Spacing eB .310 .370 .430 7.87 9.40 10.92 Mold Draft Angle Top α Mold Draft Angle Bottom β * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed JEDEC Equivalent: MS-001 Drawing No. C04-018 .010” (0.254mm) per side. § Significant Characteristic

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 18 © 2005 Microchip Technology Inc. 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) Foot Angle φ β Mold Draft Angle Bottom α Mold Draft Angle Top 0.51 0.42 0.33 .020 .017 .013 B Lead Width 0.25 0.23 0.20 .010 .009 .008 c Lead Thickness 0.76 0.62 0.48 .030 .025 .019 L Foot Length 0.51 0.38 0.25 .020 .015 .010 h Chamfer Distance 5.00 4.90 4.80 .197 .193 .189 D Overall Length 3.99 3.91 3.71 .157 .154 .146 Molded Package Width 6.20 6.02 5.79 .244 .237 .228 E Overall Width 0.25 0.18 0.10 .010 .007 .004 Standoff 1.55 1.42 1.32 .061 .056 .052 Molded Package Thickness 1.75 1.55 1.35 .069 .061 .053 A Overall Height 1.27 .050 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS INCHES* Units D n p B E h L β c 45° φ α A * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 § Significant Characteristic

© 2005 Microchip Technology Inc. DS21795C-page 19 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C 8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP) β Mold Draft Angle Bottom α Mold Draft Angle Top 0.30 0.25 0.19 .012 .010 .007 B Lead Width 0.20 0.15 0.09 .008 .006 .004 c Lead Thickness 0.70 0.60 0.50 .028 .024 .020 L Foot Length 3.10 3.00 2.90 .122 .118 .114 D Molded Package Length 4.50 4.40 4.30 .177 .173 .169 Molded Package Width 6.50 6.38 6.25 .256 .251 .246 E Overall Width 0.15 0.10 0.05 .006 .004 .002 Standoff 0.95 0.90 0.85 .037 .035 .033 Molded Package Thickness 1.10 .043 A Overall Height 0.65 .026 p Pitch n Number of Pins MAX NOM MIN MAX NOM MIN Dimension Limits MILLIMETERS* INCHES Units α A L c β φ D n p B E Foot Angle φ * Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005” (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086 § Significant Characteristic

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 20 © 2005 Microchip Technology Inc. 8-Lead Plastic Dual Flat No Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated Exposed Pad Width Exposed Pad Length Contact Length *Controlling Parameter Contact Width Drawing No. C04-123 Notes: Exposed pad dimensions vary with paddle size. Overall Width L b E .016 .012 .008 .047 .055 .010 .118 BSC Number of Pins Standoff Contact Thickness Overall Length Overall Height Pitch p n Units A D Dimension Limits .000 .001 .008 REF. .079 BSC .031 .020 BSC MIN INCHES NOM 0.40 0.25 0.30 .020 .071 .012 .064 0.20 1.20 1.39 0.50 0.30 1.80 1.62 0.02 0.80

2.00 BSC

0.20 REF.

0.50 BSC

MILLIMETERS* .002 .039 0.00 MIN MAX NOM 0.05 1.00 MAX Package may have one or more exposed tie bars at ends. Pin 1 visual index feature may vary, but must be located within the hatched area. 0.90 .035 (Note 3) (Note 3) 4. JEDEC equivalent: MO-229 L A TOP VIEW D E EXPOSED PAD METAL BOTTOM VIEW b p n (NOTE 1) EXPOSED TIE BAR PIN 1 (NOTE 2) ID INDEX AREA Revised 05/24/04

© 2005 Microchip Technology Inc. DS21795C-page 21 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C APPENDIX A:

REVISION HISTORY

Corrections to Section 1.0, Electrical Characteristics. Section 4.1, 6-Lead SOT-23 package to OT. Revision C Added DFN package.

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 22 © 2005 Microchip Technology Inc. NOTES:

© 2005 Microchip Technology Inc. DS21795C-page 23 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C THE MICROCHIP WEB SITE Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:

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• Development Systems Information Line Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com In addition, there is a Development Systems Information Line which lists the latest versions of Microchip’s development systems software products. This line also provides information on how customers can receive currently available upgrade kits. The Development Systems Information Line numbers are: 1-800-755-2345 – United States and most of Canada 1-480-792-7302 – Other International Locations

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 24 © 2005 Microchip Technology Inc. READER RESPONSE It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod- uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150. Please list the following information, and use this outline to provide us with your comments about this document. To: Technical Publications Manager RE: Reader Response From: Name Company Address City / State / ZIP / Country Application (optional): Would you like a reply? Y N Device: Literature Number: Questions: DS21795C 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C What are the best features of this document? How does this document meet your hardware and software development needs? Do you find the organization of this document easy to follow? If not, why? What additions to the document do you think would enhance the structure and subject? What deletions from the document could be made without affecting the overall usefulness? Is there any incorrect or misleading information (what and where)? How would you improve this document?

© 2003 Microchip Technology Inc. DS21795C-page 25 93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Note 1: Most products manufactured after January 2005 will have a Matte Tin (Pb-free) finish. Most products manufactured before January 2005 will have a finish of approximately 63% Sn and 37% Pb (Sn/Pb). Please visit www.microchip.com for the latest information on Pb-free conversion, including conversion date codes. Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. Device: 93AA66A: 4K 1.8V Microwire Serial EEPROM 93AA66B: 4K 1.8V Microwire Serial EEPROM 93AA66C: 4K 1.8V Microwire Serial EEPROM w/ORG 93LC66A: 4K 2.5V Microwire Serial EEPROM 93LC66B: 4K 2.5V Microwire Serial EEPROM 93LC66C: 4K 2.5V Microwire Serial EEPROM w/ORG 93C66A: 4K 5.0V Microwire Serial EEPROM 93C66B: 4K 5.0V Microwire Serial EEPROM 93C66C: 4K 5.0V Microwire Serial EEPROM w/ORG Pinout: Blank Standard pinout X Rotated pinout Tape & Reel: Blank Standard packaging T Tape & Reel Temperature Range: I -40°C to +85°C E -40°C to +125°C Package: MS Plastic MSOP (Micro Small outline, 8-lead) OT SOT-23, 6-lead (Tape & Reel only) P Plastic DIP (300 mil body), 8-lead SN Plastic SOIC (150 mil body), 8-lead ST TSSOP, 8-lead MC 2x3 DFN, 8-lead Lead Finish: Blank Pb-free – Matte Tin (see Note 1) G Pb-free – Matte Tin only Examples: 93AA66C-I/MS: 4K, 512x8 or 256x16 Serial EEPROM, MSOP package, 1.8V 93AA66B-I/MS: 4K, 256x16 Serial EEPROM, MSOP package, 1.8V 93AA66AT-I/OT: 4K, 512x8 Serial EEPROM, SOT-23 package, tape and reel, 1.8V 93AA66CT-I/MS: 4K, 512x8 or 256x16 Serial EEPROM, MSOP package, tape and reel, 1.8V 93LC66A-I/MS: 4K, 512x8 Serial EEPROM, MSOP package, 2.5V 93LC66BT-I/OT: 4K, 256x16 Serial EEPROM, SOT-23 package, tape and reel, 2.5V 93LC66B-I/MS: 4K, 256x16 Serial EEPROM, MSOP package, 2.5V 93C66B-I/MS: 4K, 256x16 Serial EEPROM, MSOP package, 5.0V 93C66C-I/MS: 4K, 512x8 or 256x16 Serial EEPROM, MSOP package, 5.0V 93C66AT-I/OT: 4K, 512x8 Serial EEPROM, SOT-23 package, tape and reel, 5.0V PART NO. X /XX Package Temperature Range Device X Lead Finish X Tape & Reel X Pinout

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C DS21795C-page 26 © 2003 Microchip Technology Inc. NOTES:

© 2005 Microchip Technology Inc. DS21795C-page 27 Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WAR- RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.

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