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9316,DM9316 9316/DM9316 Synchronous 4-Bit Counters Literature Number: SNOS379A
9316/DM9316 Synchronous 4-Bit Counters June 1989 9316/DM9316 Synchronous 4-Bit Counters General Description These synchronous, presettable counters feature an inter- nal carry look-ahead for application in high-speed counting designs. The 9316 is a 4-bit binary counter. The carry output is decoded by means of a NOR gate, thus preventing spikes during the normal counting mode of operation. Synchronous operation is provided by having all flip-flops clocked simulta- neously so that the outputs change coincident with each other when so instructed by the count-enables inputs and internal gating. This mode of operating eliminates the output counting spikes which are normally associated with asyn- chronous (ripple clock) counters. A buffered clock input trig- gers the four flip-flops on the rising (positive-going) edge of the clock input waveform. These counters are fully programmable; that is, the outputs may be preset to either level. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the enable input. Low-to-high transitions at the load input are perfectly acceptable regardless of the logic levels on the clock or enable inputs. The clear function is asynchronous and a low level at the clear input sets of the flip-flop outputs low re- gardless of the levels of clock, load, or enable inputs. The carry look-ahead circuitry provides for cascading coun- ters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a ripple carry output. Both count- enable inputs (P and T) must be high to count, and input T is fed-forward to enable the ripple carry output. The ripple car- ry output thus enabled will produce a high-level output pulse with a duration approximately equal to the high-level portion of the Q A output. This high-level overflow ripple carry pulse can be used to enable successive cascaded stages. High- to-low level transitions at the enable P or T inputs may occur regardless of the logic level in the clock.
Features
Y Internal look-ahead for fast counting Y Carry output for n-bit cascading Y Synchronous counting Y Load control line Y Diode-clamped inputs Y Typical clock frequency 35 MHz Y Pin-for-pin replacements popular 54/74 counters 5416A/7416A (binary) Y Alternate Military/Aerospace device (9316) is available. Contact a National Semiconductor Sales Office/Distrib- utor for specifications. Connection Diagram Dual-In-Line Package TL/F/6606–1 Order Number 9316DMQB, 9316FMQB, DM9316J DM9316W or DM9316N See NS Package Number J16A, N16E or W16A C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Absolute Maximum Ratings (Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range Military b55§Ct o a125§C Commercial 0 §Ct o a70§C Storage Temperature Range b65§Ct o a150§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter Military Commercial Units Min Nom Max Min Nom Max VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V VIH High Level Input Voltage 2 2 V VIL Low Level Input Voltage 0.8 0.8 V IOH High Level Output Current b0.8 b0.8 mA IOL Low Level Output Current 16 16 mA fCLK Clock Frequency (Note 6) 0 25 0 25 MHz tW Pulse Width Clock 25 25 ns(Note 6) Clear 20 20 tSU Setup Time Data 20 20 (Note 6) Enable P 20 20 ns Load 25 25 Clear 20 20 tH Any Hold Time (Note s1&6 ) 0 0 n s TA Free Air Operating Temperature b55 125 0 70 §C Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units(Note 2) VI Input Clamp Voltage V CC e Min, I I eb 12 mA b1.5 V VOH High Level Output V CC e Min, I OH e Max 2.4 3.4 VVoltage V IL e Max, V IH e Min VOL Low Level Output V CC e Min, I OL e Max 0.2 0.4 VVoltage V IH e Min, V IL e Max II Input Current @ Max V CC e Max, V I e 5.5V 1m AInput Voltage IIH High Level Input V CC e Max Clock 80 Current V I e 2.4 V Enable T 80 mA Other 40 IIL Low Level Input V CC e Max Clock b3.2 Current V I e 0.4V Enable T b3.2 mA Other b1.6 IOS Short Circuit V CC e Max MIL b20 b57 mAOutput Current (Note 3) COM b18 b57 ICCH Supply Current with V CC e Max MIL 59 85 mAOutputs High (Note 4) COM 59 94 ICCL Supply Current with V CC e Max MIL 63 91 mAOutputs Low (Note 5) COM 63 101 Note 1: The minimum HOLD time is as specified or as long as the CLOCK input takes to rise from 0.8V to 2V, whichever is longer. Note 2: All typicals are at V CC e 5V, T A e 25§C. Note 3: Not more than one output should be shorted at a time. Note 4: ICCH is measured with the LOAD input high, then again with the LOAD input low, with all other inputs high and all outputs open. Note 5: ICCL is measured with the CLOCK input high, then again with the CLOCK input low, with all other inputs low and all outputs open. Note 6: TA e 25§C and V CC e 5V.
Switching Characteristics at V CC e 5V and T A e 25§C (See Section 1 for Test Waveforms and Output Load) Symbol Parameter From (Input) R L e 400X,C L e 15 pF UnitsTo (Output) Min Max fMAX Maximum Clock Frequency 25 MHz tPLH Propagation Delay Time Clock 27 nsLow to High Level Output to RC tPHL Propagation Delay Time Clock 24 nsHigh to Low Level Output to RC tPLH Propagation Delay Time Clock 20 nsLow to High Level Output to Q tPHL Propagation Delay Time Clock 23 nsHigh to Low Level Output to Q tPLH Propagation Delay Time Clock 21 nsLow to High Level Output to Q tPHL Propagation Delay Time Clock 25 nsHigh to Low Level Output to Q tPLH Propagation Delay Time ENT 15 nsLow to High Level Output to RC tPHL Propagation Delay Time ENT 16 nsHigh to Low Level Output to RC tPHL Propagation Delay Time Clear 36 nsHigh to Low Level Output to Q
TL/F/6606–2
9316 Synchronous Binary Counters
Typical Clear, Preset, Count and Inhibit Sequences TL/F/6606–3 Sequence: (1) Clear outputs to zero. (2) Preset to binary twelve. (3) Count to thirteen, fourteen, fifteen, zero, one, and two. (4) Inhibit
Parameter Measurement Information Switching Time Waveforms TL/F/6606–4 Note A: The input pulses are supplied by a generator having the following characteristics: PRR s 1 MHz, duty cycle s 50%, Z OUT & 50X,t r s 10 ns, t f s 10 ns. Vary PRR to measure f MAX. Note B: Outputs Q D and carry are tested at t n a 16 for 9316/8316, where t n is the bit time when all outputs are low. Note C: VREF e 1.5V.
Parameter Measurement Information (Continued) Switching Time Waveforms TL/F/6606–5 Note A: The input pulses are supplied by generators having the following characteristics: PRR s 1 MHz, duty cycle s 50%, Z OUT & 50X,t r s 10 ns, t f s 10 ns. Note B: Enable P and Enable T setup times are measured at t n a 16 for 8316/9316. Note C: VREF e 1.5V.
Physical Dimensions inches (millimeters) 16-Lead Ceramic Dual-In-Line Package (J) Order Number 9316DMQB or DM9316J 16-Lead Molded Dual-In-Line Package (N) Order Number DM9316N
9316/DM9316 Synchronous 4-Bit Counters Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flat Package (W) Order Number 9316FMQB or DM9316W LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.
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a49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309 Arlington, TX 76017 Email: cnjwge @ tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408 Tel: 1(800) 272-9959 Deutsch Tel: ( a49) 0-180-530 85 85 Tsimshatsui, Kowloon Fax: 1(800) 737-7018 English Tel: ( a49) 0-180-532 78 32 Hong Kong Fran3ais Tel: ( a49) 0-180-532 93 58 Tel: (852) 2737-1600 Italiano Tel: ( a49) 0-180-534 16 80 Fax: (852) 2736-9960 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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