9314

9314 NSC | Alldatasheet

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Technical content

The ’9314 is a multifunctional 4-bit latch designed for gener- al purpose storage applications in high speed digital sys- tems. All outputs have active pull-up circuitry to provide high capacitance drive and to provide low impedance in both logic states for good noise immunity. Connection Diagram Dual-In-Line Package TL/F/9788–1 Order Number 9314DMQB, 9314FMQB or DM9314N See NS Package Number J16A, N16E or W16A Logic Symbol TL/F/9788–2 VCC e Pin 16 GND e Pin 8 Pin Names Description E Enable Input (Active LOW) D0–D3 Data Inputs S 0–S 3 Set Inputs (Active LOW) MR Master Reset Input (Active LOW) Q0–Q3 Latch Outputs C1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.

Absolute Maximum Ratings (Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range Military b55§Ct o a125§C Commercial 0 §Ct o a70§C Storage Temperature Range b65§Ct o a150§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter Military Commercial Units Min Nom Max Min Nom Max VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V VIH High Level Input Voltage 2 2 V VIL Low Level Input Voltage 0.8 0.8 V IOH High Level Output Current b0.8 b0.8 mA IOL Low Level Output Current 16 16 mA TA Free Air Operating Temperature b55 125 0 70 §C ts (H) Setup Time HIGH or LOW 5.0 5.0 nsts (L) D n to E 18 18 th (H) Hold Time HIGH or LOW 0 0 nsth (L) D n to E 5.0 5.0 ts (H) Setup Time HIGH, D n to S n 8.0 8.0 ns th (L) Hold Time LOW, D n to S n 8.0 8.0 ns tw (L) E Pulse Width LOW 18 18 ns tw (L) MR Pulse Width LOW 18 18 ns trec Recovery Time, MR to E 00n s

Electrical Characteristics

Over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units(Note 1) VI Input Clamp Voltage V CC e Min, I I eb 12 mA b1.5 V VOH High Level Output Voltage V CC e Min, I OH e Max 2.4 3.4 VVIL e Max VOL Low Level Output Voltage V CC e Min, I OL e Max 0.2 0.4 VVIH e Min II Input Current @ Max V CC e Min, V I e 5.5V 1m AInput Voltage IIH High Level Input Current V CC e Max, V I e 2.4V 40 mA Data Inputs 60 IIL Low Level Input Current V CC e Max, V I e 0.4V b1.6 mA Data Inputs b2.7 IOS Short Circuit V CC e Max MIL b20 b70 mAOutput Current (Note 2) COM b20 b70 ICC Supply Current V CC e Max 55 mA Note 1: All typicals are at V CC e 5V, T A e 25§C. Note 2: Not more than one output should be shorted at a time.

Switching Characteristics VCC ea 5.0V, T A ea 25§C (See Section 1 for waveforms and load configurations) Symbol Parameter CL e 15 pF Units Min Max tPLH Propagation Delay 24 nstPHL E to Q n 24 tPLH Propagation Delay 12 nstPHL Dn to Q n 24 tPLH Propagation Delay 18 nsMR to Q n tPHL Propagation Delay 24 nsSn to Q n Functional Description The ’9314 consists of four latches with a common active LOW Enable input and active LOW Master Reset input. When the Enable goes HIGH, data present in the latches is stored and the state of the latch is no longer affected by the S n and D n inputs. The Master Reset when activated over- rides all other input conditions forcing all latch outputs LOW. Each of the four latches can be operated in one of two modes: D-TYPE LATCHÐFor D-type operation the S input of a latch is held LOW. While the common Enable is active the latch output follows the D input. Information present at the latch output is stored in the latch when the Enable goes HIGH. SET/RESET LATCHÐDuring set/reset operation when the common Enable is LOW a latch is reset by a LOW on the D input, and can be set by a LOW on the S input if the D input is HIGH. If both S and D inputs are LOW, the D input will dominate and the latch will be reset. When the Enable goes HIGH, the latch remains in the last state prior to disable- ment. The two modes of latch operation are shown in the Truth Table. Truth Table MR E DS Qn Operation H L L L L D Mode HL H L H HH X X Q nb1 H L L L L R/S Mode HL H L H HL L H L H LHHQ nb1 HH X X Q nb1 L X X X L Reset H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Qnb1 e Previous Output State Qn e Present Output State

TL/F/9788–3

Physical Dimensions inches (millimeters) 16-Lead Ceramic Dual-In-Line Package (J) Order Number 9314DMQB 16-Lead Molded Dual-In-Line Package (N) Order Number DM9314N

Physical Dimensions inches (millimeters) (Continued) 16-Lead Ceramic Flat Package (W) Order Number 9314FMQB LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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