9308

9308 NSC | Alldatasheet

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9308/DM9308 Dual 4-Bit Latch June 1989 9308/DM9308 Dual 4-Bit Latch General Description The 9308 is a dual 4-bit D-type latch designed for general purpose storage applications in digital systems. Each latch contains both an active LOW Master Reset input an active LOW Enable inputs. The 74116 is a pin for pin equivalent of the 9308. Connection Diagram Dual-In-Line Package TL/F/10208–1 Order Number 9308DMQB, 9308FMQB or DM9308N See NS Package Number J24A, N24A or W24C Logic Symbol TL/F/10208–2 VCC e Pin 24 GND e Pin 12 Pin Names Description D0a –D3a Parallel Latch InputsD0b –D3b ( E0a,E 1a,E 0b,E 1b AND Enable Inputs (Active LOW) MRa,M R b Master Reset Inputs (Active LOW) Q0a –Q3a Parallel Latch OutputsQ0b –Q3b ( C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Note) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage 7V Input Voltage 5.5V Operating Free Air Temperature Range MIL b55§Ct o a125§C COM 0 §Ct o a70§C Storage Temperature Range b65§Ct o a150§C Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaran- teed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter Military Commercial Units Min Nom Max Min Nom Max VCC Supply Voltage 4.5 5 5.5 4.75 5 5.25 V VIH High Level Input 22 VVoltage VIL Low Level Input 0.8 0.8 VVoltage IOH High Level Output b0.8 b0.8 mACurrent IOL Low Level Output 16 16 mACurrent TA Free Air Operating b55 125 0 70 §CTemperature ts (H) Setup Time HIGH, D n to E n 61 0n s th (H) Hold Time HIGH, D n to E n 4 b2.0 ns ts (L) Setup Time LOW, D n to E n 10 12 ns th (L) Hold Time LOW, D n to E n 48n s tw (L) E n Pulse Width LOW 18 18 ns tw (L) MR Pulse Width LOW 18 18 ns trec Recovery Time, MR to E n 10 8 ns Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units(Note 1) VI Input Clamp Voltage V CC e Min, I I eb 18 mA b1.5 V VOH High Level Output V CC e Min, I OH e Max, 2.4 VVoltage V IL e Max, V IH e Min VOL Low Level Output V CC e Min, I OL e Max 0.4 VVoltage V IH e Min, V IL e Max II Input Current @ Max V CC e Max, V I e 5.5V 1m AInput Voltage IIH High Level Input V CC e Max, V I e 2.4V 40 mACurrent IIL Low Level Input V CC e Max, V I e 0.4V b1.6 mACurrent IOS Short Circuit V CC e Max MIL b20 b70 mAOutput Current (Note 2) COM b20 b57 ICC Supply Current V CC e Max (Note 3) 100 mA Note 1: All typicals are at V CC e 5V, T A e 25§C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: ICC is measured with all outputs open and all inputs grounded.

Data can be entered into the latch when both of the enable inputs are LOW. As long as this logic condition exists, the output of the latch will follow the input. If either of the enable inputs goes HIGH, the data present in the latch at that time is held in the latch and is no longer affected by data input. The master reset overrides all other input conditions and forces the outputs of all the latches LOW when a LOW sig- nal is applied to the Master Reset input. Truth Table MR E0E 1 D Qn Operation H L L L L Data Entry H L L H H Data Entry HL H X Q n b1 Hold HHL X Q n b1 Hold HH H X Q n b1 Hold L X X X L Reset Qnb1 e Previous Output State Qn e Present Output State H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial Logic Diagram TL/F/10208–3 Switching Characteristics VCC ea 5.0V, T A ea 25§C (See Section 5 for test waveforms and output load.) 9308 Symbol Parameter CL e 15 pF UnitsRL e 400X Min Max tPLH Propagation Delay 30 nstPHL Ent oQ n 2 2 tPLH Propagation Delay 15 nstPHL Dn to Qn 18 tPHL Propagation Delay 22 nsMR to Qn

Physical Dimensions inches (millimeters) 24-Lead Ceramic Dual-In-Line Package (J) Order Number 9308DMQB 24-Lead Molded Dual-In-Line Package (N) Order Number DM9308N

9308/DM9308 Dual 4-Bit Latch Physical Dimensions inches (millimeters) (Continued) 24-Lead Ceramic Flat Package (W) Order Number 9308FMQB LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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