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Document overview

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  • PDF pages: 9

Technical content

Features

  • Zero input - output delay
  • Frequency range 10 - 133 MHz (3.3V)
  • 5V tolerant input REF
  • High loop filter bandwidth ideal for Spread Spectrum

applications

  • Less than 200 ps Jitter between outputs
  • Skew controlled outputs
  • Skew less than 250 ps between outputs
  • Available in 8 pin 150 mil SOIC & 173 mil TSSOP packages
  • 3.3V ±10% operation
  • Supports industrial temperature range -40°C to 85°C Block Diagram

HIGH PERFORMANCE COMMUNICATION BUFFER IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 2 ICS91305I REV G 090612 Pin Configuration Pin Descriptions

HIGH PERFORMANCE COMMUNICATION BUFFER IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 3 ICS91305I REV G 090612 Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS91305I. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Electrical Characteristics at 3.3V Notes: 1.Guaranteed by design and characterization. Not subject to 100% test. 2.All Skew specifications are mesured with a 50Ω transmission line, load teminated with 50Ω to 1.4V. 3.Duty cycle measured at 1.4V. 4.Skew measured at 1.4V on rising edges. Loading must be equal on outputs. DC Characteristics PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS Input Low Voltage VIL 0.8 V Input High Voltage VIH 2.0 V Input Low Current IIL VIN=0V 19 100.0 µA Input High Current IIH VIN=VDD 0.10 250.0 µA Output Low Voltage1 VOL IOL = 12mA 0.25 0.4 V Output High Voltage1 VOH IOH = -12mA 2.4 2.9 V Power Down Supply Current IDD REF = 0 MHz 0.3 100.0 µA Supply Current IDD Unloaded oututs at 66.66 MHz SEL inputs at VDD or GND 30.0 80.0 mA

HIGH PERFORMANCE COMMUNICATION BUFFER IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 4 ICS91305I REV G 090612 Switching Characteristics Notes: 1. Guaranteed by design and characterization. Not subject to 100% test. 2. REF input has a threshold voltage of 1.4V 3. All parameters expected with loaded outputs PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS Output period t1 With CL=30pF 100.00 (10) 7.5 (133) ns (MHz) Input period t1 With CL=30pF 100.00 (10) 7.5 (133) ns (MHz) Duty Cycle1 Dt1 Measured at 1.4V; CL=30pF 40.0 50 60 % Duty Cycle1 Dt2 Measured at VDD/2 Fout <66.6MHz 45 50 55 % Rise Time1 tr1 Measured between 0.8V and 2.0V: CL=30pF 1.2 1.5 ns Fall Time1 tf1 Measured between 2.0V and 0.8V; CL=30pF 1.2 1.5 ns Delay, REF Rising Edge to CLKOUT Rising Edge1, 2 Dr1 Measured at 1.4V 0 ±350 ps Output to Output Skew1 Tskew All outputs equally loaded, CL=20pF 250 ps Device to Device Skew1 Tdsk-Tdsk Measured at VDD/2 on the CLKOUT pins of devices 0 700 ps Cycle to Cycle Jitter1 Tcyc-Tcyc Measured at 66.66 MHz, loaded outputs 200 ps PLL Lock Time1 tLOCK Stable power supply, valid clock presented on REF pin 1.0 ms Jitter; Absolute Jitter1 Tjabs @ 10,000 cycles CL = 30pF -200 70 200 ps Jitter; 1 - Sigma1 Tj1s @ 10,000 cycles CL = 30pF 14 60 ps

HIGH PERFORMANCE COMMUNICATION BUFFER IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 5 ICS91305I REV G 090612 Output to Output Skew The skew between CLKOUT and the CLK(1-4) outputs is not dynamically adjusted by the PLL. Since CLKOUT is one of the inputs to the PLL, zero phase difference is maintained from REF to CLKOUT. If all outputs are equally loaded, zero phase difference will maintained from REF to all outputs. If applications requiring zero output-output skew, all the outputs must equally loaded. If the CLK(1-4) outputs are less loaded than CLKOUT, CLK(1-4) outputs will lead it; and if the CLK(1-4) is more loaded than CLKOUT, CLK(1-4) will lag the CLKOUT. Since the CLKOUT and the CLK(1-4) outputs are identical, they all start at the same time, but different loads cause them to have different rise times and different times crossing the measurement thresholds. Timing diagrams with different loading configurations

HIGH PERFORMANCE COMMUNICATION BUFFER IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 6 ICS91305I REV G 090612 Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 INDEX AREA 1 2 D E SEATING PLANE A e - C - B .10 (.004) C C L H h x 45 Millimeters Inches Symbol Min Max Min Max A 1.35 1.75 .0532 .0688 A1 0.10 0.25 .0040 .0098 B 0.33 0.51 .013 .020 C 0.19 0.25 .0075 .0098 D 4.80 5.00 .1890 .1968 E 3.80 4.00 .1497 .1574 e 1.27 BASIC 0.050 BASIC H 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 L 0.40 1.27 .016 .050 α 0° 8° 0° 8°

HIGH PERFORMANCE COMMUNICATION BUFFER IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 7 ICS91305I REV G 090612 Package Outline and Package Dimensions (8-pin TSSOP, 4.4 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95

Ordering Information

"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. “A” is the device revision designator (will not correlate with the datasheet revision). While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. Part / Order Number Marking Shipping Packaging Package Temperature 91305AMILF 305AMILF Tubes 8-pin SOIC -40 to +85 ° C 91305AMILFT 305AMILF Tape and Reel 8-pin SOIC -40 to +85 ° C 91305AGILF 305IL Tubes 8-pin TSSOP -40 to +85 ° C 91305AGILFT 305IL Tape and Reel 8-pin TSSOP -40 to +85 ° C INDEX AREA 1 2 D E1 E SEATING PLANE A AA e - C - b aaa C c L Millimeters Inches S y m b o l M i nM a xM i nM a x A -- 1.20 -- 0.047 A1 0.05 0.15 0.002 0.006 A2 0.80 1.05 0.032 0.041 b 0.19 0.30 0.007 0.012 C 0.09 0.20 0.0035 0.008 D 2.90 3.10 0.114 0.122 E 6.40 BASIC 0.252 BASIC E1 4.30 4.50 0.169 0.177 e 0.65 Basic 0.0256 Basic L 0.45 0.75 0.018 0.030 α 0° 8° 0° 8° aaa - 0.10 - 0.004

HIGH PERFORMANCE COMMUNICATION BUFFER IDT® HIGH PERFORMANCE COMMUNICATION BUFFER 8 ICS91305I REV G 090612

Revision History

Rev. Originator Date Description of Change G D. Chan 09/06/12 1. Updated ordering information to inlclude “I” for industrial temp range in ordering scheme. 2. Re-created datasheet in latest template.

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