IDT8N4S271 RENESAS | Alldatasheet
Document overview
- Manufacturer or author: epieczon
- PDF pages: 19
Technical content
Features
- Fourth generation FemtoClock® NG technology
- Factory-programmable clock output frequency from 15.476MHz to 866.67MHz and from 975MHz to 1,300MHz
- Frequency programming resolution is 218Hz and better
- One 2.5V, 3.3V LVDS clock output
- Output enable control (positive polarity), LVCMOS/LVTTL compatible
- RMS phase jitter @ 231.25MHz (12kHz - 20MHz): 0.48ps (typical), integer PLL feedback configuration
- RMS phase jitter @ 231.25MHz (1kHz - 40MHz): 0.50ps (typical), integer PLL feedback configuration
- 2.5V or 3.3V supply
- -40°C to 85°C ambient operating temperature
- Available in a lead-free (RoHS 6) 6-pin ceramic package IDT8N4S271 6-lead ceramic 5mm x 7mm x 1.55mm package body Top View Pin AssignmentBlock Diagram nQOSC fXTAL ÷MINT, MFRAC PFD LPF FemtoClock® NG VCO 1950-2600MHz Configuration Register (ROM) 25 7 OE Pullup
6 VDD
IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 2 ©2012 Integrated Device Technology, Inc. NOTE: Pullup refers to an internal input resistor. See Table 2, Pin Characteristics, for typical values.
0 Outputs Q, nQ are in hi gh-impedance state
NOTE: OE is an asynchronous control. Table 1. Pin Descriptions 1D N U Do not use (factory use only). 2 OE Input Pullup Output enable pin. See Table 3A for function. LVCMOS/LVTTL interface levels. 3 GND Power Power supply ground. 4, 5 Q, nQ Output Differential clock output pair. LVDS interface levels. 6 VDD Power Power supply pin. Table 2. Pin Characteristics
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 3 ©2012 Integrated Device Technology, Inc. Principles of Operation The block diagram consists of the internal 3rd overtone crystal and oscillator which provide the reference clock fXTAL of either 114.285MHz or 100MHz. The PLL includes the FemtoClock NG VCO along with the Pre-divider (P), the feedback divider (M) and the post divider (N). The P, M, and N dividers determine the output frequency based on the f XTAL reference. The feedback divider is fractional supporting a huge number of output frequencies. The configuration of the feedback divider to integer-only values results in an improved output phase noise characteristics at the expense of the range of output frequencies. Internal registers are used to hold one factory pre-set P, M, and N configuration setting. The P, M, and N frequency configuration supports an output frequency range from 15.476MHz to 866.67MHz and from 975MHz to 1,300MHz. The devices use the fractional feedback divider with a delta-sigma modulator f or noise shaping and robust frequency synthesis capability. The relatively high reference frequency minimizes phase noise generated by frequency multiplication and allows more efficient shaping of noise by the delta-sigma modulator. The output frequency is determined b y the 2-bit pre-divider (P), the feedback divider (M) and the 7-bit post divider (N). The feedback divider (M) consists of both a 7-bit integer portion (MINT) and an 18-bit fractional portion (MFRAC) and provides the means for high-resolution frequency generation. The output frequency fOUT is calculated by: fOUT fXTAL Frequency Configuration An order code is assigned to each frequency configuration programmed by the factory (default frequencies). For more information on the available default frequencies and order codes, please see the Ordering Information section in this document. For available order codes, see the FemtoClock NG Ceramic-Package XO and VCXO Ordering Product Information document. For more information on programming capabilities of the device for custom freque ncy and pull-range configurations, see the FemtoClock NG Ceramic 5x7 Module Programming Guide.
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 4 ©2012 Integrated Device Technology, Inc. Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Supply Voltage, VDD 3.63V Inputs, VI -0.5V to VDD + 0.5V Outputs, IO (LVDS) Continuous Current Surge Current 10mA 15mA Package Thermal Impedance, JA 49.4C/W (0 mps) Storage Temperature, TSTG -65C to 150C Table 4A. Power Supply DC Characteristics, VDD = 3.3V ± 5%, TA = -40°C to 85°C Table 4B. Power Supply DC Characteristics, VDD = 2.5V ± 5%, TA = -40°C to 85°C Table 4C. LVCMOS/LVTTL DC Characteristic, VDD = 3.3V ± 5% or 2.5V ± 5%, TA = -40°C to 85°C Item Rating Symbol Parameter Test Conditions Minimum Typical Maximum Units VDD Power Supply Voltage 3.135 3.3 3.465 V IDD Power Supply Current 134 160 mA Symbol Parameter Test Conditions Minimum Typical Maximum Units VDD Power Supply Voltage 2.375 2.5 2.625 V IDD Power Supply Current 129 155 mA Symbol Parameter Test Conditions Minimum Typical Maximum Units VIH Input High Voltage OE VDD = 3.3V 2 VDD + 0.3 V VDD = 2.5V 1.7 VDD + 0.3 V VIL Input Low Voltage OE VDD = 3.3V -0.3 0.8 V VDD = 2.5V -0.3 0.7 V IIH Input High Current OE VDD = VIN = 3.465V or 2.625V 10 µA IIL Input Low Current OE V DD = 3.465V or 2.625V, VIN = 0V -150 µA
IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 5 ©2012 Integrated Device Technology, Inc. Table 5. AC Characteristics, VDD = 3.3V ± 5% or 2.5V ± 5%, TA = -40°C to 85°C
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 6 ©2012 Integrated Device Technology, Inc. NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE: XTAL parameters (initial accuracy, temperature stability, aging and total stability) are guaranteed by manufacturing. NOTE 1: This parameter is defined in accordance with JEDEC standard 65. NOTE 2: Refer to the phase noise plot. NOTE 3: See the FemtoClock NG Ceramic 5x7 Modules Programming guide for more information on PLL feedback modes and the optimum configuration for phase noise. Integer PLL feedback is the default operation for the dddd = 1xxx order codes. NOTE 5: Applies to output frequencies: 75MHz, 100MHz, 106.25MHz, 125MHz, 156.25MHz, 425MHz, 500MHz, 625MHz, 975MHz and 1300MHz. tjit(Ø) RMS Phase Jitter (Random); Fractional PLL feedback and f XTAL=100.000MHz (2xxx order codes), NOTES 2, 3, 4 17MHz fOUT 1300MHz, Integration range: 12kHz-20MHz 0.497 0.882 ps RMS Phase Jitter (Random); Integer PLL feedback and fXTAL=100.00MHz (1xxx order codes), NOTES 2, 3, 5 500MHz fOUT 1300MHz, Integration range: 12kHz-20MHz 0.232 0.322 ps 125MHz fOUT 500MHz, Integration range: 12kHz-20MHz 0.250 0.450 ps 17MHz fOUT 125MHz, Integration range: 12kHz-20MHz 0.275 0.405 ps fOUT 156.25MHz, Integration range: 12kHz-20MHz 0.242 0.311 ps fOUT 231.25MHz, Integration range: 12kHz-20MHz 0.476 0.680 ps fOUT 156.25MHz, Integration range: 12kHz-20MHz 0.275 0.359 ps fOUT 231.25MHz, Integration range: 12kHz-20MHz 0.504 0.700 ps RMS Phase Jitter (Random) Fractional PLL feedback and fXTAL=114.285MHz (0xxx order codes), NOTES 2, 3, 6 17MHz fOUT 1300MHz, Integration range: 12kHz-20MHz 0.474 0.986 ps N(100) Single-side Band Phase Noise, 100Hz from Carrier fOUT 231.25MHz -88 dBc/Hz N(1k) Single-side Band Phase Noise, 1kHz from Carrier fOUT 231.25MHz -110 dBc/Hz N(10k) Single-side Band Phase Noise, 10kHz from Carrier fOUT 231.25MHz -123 dBc/Hz N(100k) Single-side Band Phase Noise, 100kHz from Carrier fOUT 231.25MHz -125 dBc/Hz N(1M) Single-side Band Phase Noise, 1MHz from Carrier fOUT 231.25MHz -137 dBc/Hz N(10M) Single-side band phase noise, 10MHz from Carrier fOUT 231.25MHz -141 dBc/Hz tR / tF Output Rise/Fall Time 20% to 80% 50 450 ps odc Output Duty Cycle 47 53 % tSTARTUP Device Startup Time After Power Up 20 ms Symbol Parameter Test Conditions Minimum Typical Maximum Units Table 5 (continued). AC Characteristics, VDD = 3.3V ± 5% or 2.5V ± 5%, TA = -40°C to 85°C
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 7 ©2012 Integrated Device Technology, Inc. Typical Phase Noise at 231.25MHz (12kHz - 20MHz) Noise Power dBc/Hz Offset Frequency (Hz)
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 8 ©2012 Integrated Device Technology, Inc. Parameter Measurement Information 2.5V LVDS Output Load Test Circuit RMS Phase Jitter Cycle-to-Cycle Jitter 3.3V LVDS Output Load Test Circuit RMS Period Jitter Output Duty Cycle/Pulse Width/Period SCOPE Q nQ 2.5V±5% POWER SUPPL Y +–Float GND VDD Offset Frequencyf1 f2 Phase Noise Plot Area Under Curve Defined by the Offset Frequency Markers RMS Phase Jitter = Noise Power 2 * * ƒ 1 * nQ Q ➤➤ ➤➤tcycle n tcycle n+1 tjit(cc) = |tcycle n – tcycle n+1|
1000 Cycles
Q nQ 3.3V±5% POWER SUPPL Y +–Float GND VDD VOH VREF VOL Mean Period (First edge after trigger) Reference Point (Trigger Edge) 1σ contains 68.26% of all measurements 2σ contains 95.4% of all measurements 3σ contains 99.73% of all measurements 4σ contains 99.99366% of all measurements 6σ contains (100-1.973x10-7)% of all measurements Histogram tPW tPERIOD tPW tPERIOD odc = x 100% nQ Q
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 9 ©2012 Integrated Device Technology, Inc. Parameter Measurement Information, continued Output Rise/Fall Time Differential Output Voltage Setup Offset Voltage Setup 20% 80% 80% 20% tR tF VOD nQ Q 100 out out DC Input VDD LVDS out out LVDSDC Input ä VOS/Δ VOS VDD
IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 12 ©2012 Integrated Device Technology, Inc. Equations and example calculations are also provided. is the power dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results. wire and bond pad temperature remains below 125°C. a multi-layer board, the appropriate value is 49.4°C/W per Table 6 below. Table 6. Thermal Resistance JA for 6 Lead Ceramic 5mm x 7mm Package, Forced Convection
IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 13 ©2012 Integrated Device Technology, Inc. Table 7. JA vs. Air Flow Table for a 6-lead Ceramic 5mm x 7mm Package
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 14 ©2012 Integrated Device Technology, Inc. Package Outline and Package Dimensions
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 15 ©2012 Integrated Device Technology, Inc. Ordering Information for FemtoClock NG Ceramic-Package XO and VCXO Products The programmable VCXO and XO devices support a variety of devices options such as the output type, number of default frequen- cies, internal crystal frequency, power supply voltage, ambient temperature range and the frequency accuracy. The device options, default frequencies and default VCXO pull range must be specified at the time of order and are programmed by IDT before the shipment. The table below specifies the available order codes, including the device options and default frequency configurations. Example part number: the order code 8N3QV01FG-0001CDI specifies a programmable, quad default-frequency VCXO with a voltage supply of 2.5V, a LVPECL output, a 50ppm crystal frequency accuracy, contains a 114.285MHz internal crystal as frequency source, industrial temperature range, a lead-free (6/6 RoHS) 6-lead ceramic 5mm x 7mm x 1.55mm package and is factory-programmed to the default frequencies of 100MHz, 122.88MHz, 125MHz and 156.25MHz and to the VCXO pull range of min. 100ppm. Other default frequencies and order codes are available from IDT on requ est. For more information on available default frequencies, see the FemtoClock NG Ceramic-Package XO and VCXO Ordering Product Information document. Shipping Package 8: Tape & Reel (no letter): Tray Ambient Temperature Range “I”: Industrial: (T A = -40°C to 85°C) (no letter) : (T A = 0°C to 70°C) Package Code CD: Lead-Free, 6/10-lead ceramic 5mm x 7mm x 1.55mm Die Revision C Option Code (Supply Voltage and Frequency-Stability) A: V CC = 3.3V±5%, ±100ppm B: VCC = 2.5V±5%, ±100ppm E: VCC = 3.3V±5%, ±50ppm F: VCC = 2.5V±5%, ±50ppm K: VCC = 3.3V±5%, ±20ppm L: VCC = 2.5V±5%, ±20ppm Default-Frequency and VCXO Pull Range See document FemtoClock NG Ceramic-Package XO and VCXO Ordering Product Information. Last digit = L: configuration pre-programmed and not changeable dddd f XTAL (MHz) PLL Feedback Use for 0000 to 0999 114.285 Fractional VCXO, XO 1000 to 1999 100.000 Integer XO 2000 to 2999 Fractional XO FemtoClock NG I/O Identifier 0: LVCMOS 3: LVPECL 4: LVDS Number of Default Frequencies S: 1: Single D: 2: Dual Q: 4: Quad Part Number Function #pins OE fct. at pin
001 XO 10 OE@2
003 XO 10 OE@1
V01 VCXO 10 OE@2 V03 VCXO 10 OE@1 V75 VCXO 6 OE@2 V76 VCXO 6 nOE@2 V85 VCXO 6 —
085 XO 6 OE@1
270 XO 6 OE@1
271 XO 6 OE@2
272 XO 6 nOE@2
273 XO 6 nOE@1
8N X X XXX X X - dddd XX X X Part/Order Numbers
IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 16 ©2012 Integrated Device Technology, Inc. Table 9. Device Marking
IDT8N4S271 Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR IDT8N4S271CCD REVISION A NOVEMBER 29, 2012 17 ©2012 Integrated Device Technology, Inc. Revision History Sheet Rev Table Page Description of Change Date A T9 Ordering Information Table - corrected Die Revision from “G” to “C”. Marking Table - corrected marking. 11/29/2012
IDT8N4S271Data Sheet LVDS FREQUENCY-PROGRAMMABLE CRYSTAL OSCILLATOR DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsid iaries reserve the right to modify the products and/or specif ications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subj ect to change without notice. Performance specifications and the operating parameters of the de scribed products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without re presentation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merc hantability, or non-infringement of the in tellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in applications involving extreme invironmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to signifi- cantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. Copyright 2012. All rights reserved.
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