8731AE

MAX8731A MAXIM | Alldatasheet

Document overview

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Technical content

Features

♦ 0.5% Battery Voltage Accuracy ♦ 3% Input Current-Limit Accuracy ♦ 3% Charge-Current Accuracy ♦ SMBus 2-Wire Serial Interface ♦ Cycle-by-Cycle Current Limit Battery Short-Circuit Protection Fast Response for Pulse Charging Fast System-Load-Transient Response ♦ Dual-Remote-Sense Inputs ♦ Monitor Outputs for Adapter Current (4% Accuracy) AC Adapter Detection ♦ 11-Bit Battery Voltage Setting ♦ 6-Bit Charge-Current/Input-Current Setting ♦ 8A (max) Battery Charger Current ♦ 11A (max) Input Current ♦ +8V to +26V Input Voltage Range ♦ Charges Li+, NiMH, and NiCd Battery Chemistries MAX8731A SMBus Level 2 Battery Charger with Remote Sense

Ordering Information

19-0756; Rev 0; 1/07 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. SMBus is a trademark of Intel Corp. +Indicates a lead-free package. EVALUATION KIT AVAILABLE PART TEMP RANGE PIN- PACKAGE PKG CODE MAX8731AETI+ -40 °C to +85°C 28 Thin QFN (5mm x 5mm) T2855-6 EXTERNAL LOAD DCIN GND REF ACIN BATSEL BATTERY A BATTERY B SCL SDA VDD GND ACOK VCC LDO FBSB FBSA BST PGND CSIN CSIP DLO LX DHI OPTIONAL IINP CCV DAC CCS CSSP CSSN SELECTOR BATSEL CCI HOST SCL SDA VDD N NMAX8731A MAX8731A THIN QFN 5mm x 5mm TOP VIEW ACIN CCS CCI CCV DAC GND DLO CSIP CSIN LDO FBSB FBSA BST 4567 2021 19 17 16 15 VCC CSSN GND VDD SCL SDA REF PGND 28 8CSSP IINP *EXPOSED PADDLE DHI 23 13 ACOKLX 22 14 BATSELDCIN Pin Configuration

SMBus Level 2 Battery Charger with Remote Sense ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS

(VDCIN = VLX = VCSSP = VCSSN = 19V, VBST - VLX = 4.5V, VFBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF, V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. BST + 0.3)V CCI, CCS, CCV, DAC, REF, VCC + 0.3)V VDD, SCL, SDA, BATSEL, ACIN, ACOK, VCC to GND, Continuous Power Dissipation (TA = +70°C) 28-Pin Thin QFN PARAMETER CONDITIONS MIN TYP MAX UNITS CHARGE-VOLTAGE REGULATION 8.333 8.4 8.467 V ChargingVoltage() = 0x20D0 -0.8 +0.8 % 4.150 4.192 4.234 V Battery Full-Charge Voltage and Accuracy ChargingVoltage() = 0x1060 -1.0 +1.0 % Battery Undervoltage-Lockout Trip Point for Trickle Charge 2.5 V CHARGE-CURRENT REGULATION CSIP-to-CSIN Full-Scale Current- Sense Voltage 78.22 80.64 83.06 mV 7.822 8.064 8.306 A RS2, Figure 1 = 10mΩ; ChargingCurrent() = 0x1f80 -3 +3 % 3.809 3.968 4.126 A RS2, Figure 1 = 10mΩ; ChargingCurrent() = 0x0f80 -4 +4 % Charge Current and Accuracy RS2, Figure 1 = 10mΩ; ChargingCurrent() = 0x0080 (128mA) 64 400 mA Charge-Current Gain Error Based on ChargeCurrent() = 128mA and 8.064A -2 +2 % FBSA/FBSB/CSIP/CSIN Input Voltage Range 0 19 V MAX8731A

SMBus Level 2 Battery Charger with Remote Sense ELECTRICAL CHARACTERISTICS (continued) (VDCIN = VLX = VCSSP = VCSSN = 19V, VBST - VLX = 4.5V, VFBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF, V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS Adapter present, not charging, ICSIP + ICSIN + ILX + IFBS, VFBS_ = VLX = VCSIN = VCSIP = 19V 2 5 Battery Quiescent Current Ad ap ter ab sent, IC S I P + IC S I N + ILX + IFBS A + IFBS B + IC S S P + IC S S N , V FBS _ = V LX = V C S I N = V C S I P = 19V , V D C I N = 0V +1 µA VAdapter = 26V, VBattery = 16.8V, not charging 200 500 µA Charging 0.4 1 mA VAdapter = 19V, VBattery = 16.8V Not charging 200 500 µA Charging 0.4 1 mA Adapter Quiescent Current IDCIN + ICSSP + ICSSN VAdapter = 8V, VBattery = 4V Not charging 200 500 µA INPUT-CURRENT REGULATION CSSP-to-CSSN Full-Scale Current-Sense Voltage VFBS_ = 19V 106.7 110 113.3 mV RS1, Figure 1 = 10mΩ, InputCurrent() = 11004mA or 3584mA -3 +3 Input Current Accuracy RS1, Figure 1 = 10mΩ, InputCurrent() = 2048mA -5 +5 POR Input Current RS1, Figure 1 = 10mΩ 256 mA Input Current-Limit Gain Error -2 +2 % Input Current-Limit Offset Based on InputCurrent() = 1024mA and 11004mA -1 +1 mV CSSP/CSSN Input Voltage Range 8 26 V IINP Transconductance VCSSP - CSSN = 110mV 2.85 3.0 3.15 mA/V IINP Offset Based on VCSSP - CSSN = 110mV and 20mV -1.5 +1.5 mV VCSSP - CSSN = 110mV -5 +5 VCSSP - CSSN = 55mV or 35mV -4 +4 IINP Accuracy VCSSP - CSSN = 20mV -10 +10 IINP Output Voltage Range 0 3.5 V SUPPLY AND LINEAR REGULATOR DCIN, Input Voltage Range 8.0 26.0 V DCIN falling 7 7.4 DCIN Undervoltage-Lockout Trip Point DCIN rising 7.5 7.85 V VCSSP - VCSIN falling 9 15 21 Power-Fail Threshold VCSSP - VCSIN rising 160 210 271 mV

SMBus Level 2 Battery Charger with Remote Sense ELECTRICAL CHARACTERISTICS (continued) (VDCIN = VLX = VCSSP = VCSSN = 19V, VBST - VLX = 4.5V, VFBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF, V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER CONDITIONS MIN TYP MAX UNITS LDO Output Voltage 8.0V < VDCIN < 28V, no load 5.25 5.4 5.55 V LDO Load Regulation 0 < ILDO < 30mA 34 100 mV LDO Undervoltage-Lockout Threshold VDCIN = 8.0V, VLDO falling 3.20 4.00 5.15 V VDD Range 2.7 5.5 V VDD UVLO Rising 2.5 2.7 V VDD UVLO Hysteresis 100 mV VDD Quiescent Current DCIN < 6V, VDD = 5.5V, SCL = SDA = 5.5V 16 27 µA REFERENCE REF Output Voltage 0 < IREF < 500µA 4.071 4.096 4.120 V REF Undervoltage-Lockout Trip Point REF falling 3.1 3.9 V ACOK ACOK Sink Current VACOK = 0.4V, ACIN = 1.5V 1 mA ACOK Leakage Current VACOK = 5.5V, ACIN = 2.5V 1 µA ACIN ACIN Threshold 2.007 2.048 2.089 V ACIN Threshold Hysteresis 10 20 30 mV ACIN Input Bias Current -1 +1 µA REMOTE-SENSE INPUTS FBS_ Range VCSIN - VFBS 0 200 mV FBS_ Gain ΔVCSIN / Δ(VCSIN - VFBS_) 0.95 1.00 1.05 V/V CSIN-FBS_ Clamp Voltage 225 250 275 mV FBS_ Bias Current Charger switching, FBS_ selected 14 µA FBS_ Bias Current Charger not switching or FBS_ not selected -2 +2 µA SWITCHING REGULATOR VCSIN = 16.0V, VCSSP = 19V 360 400 440 Off-Time VCSIN = 16.0V, VCSSP = 17V 260 300 360 ns BST Supply Current DHI high 500 800 µA LX Input Bias Current VDCIN = 28V, VCSIN = VLX = 20V, DHI low 2 µA Maximum Discontinuous-Mode Peak Current (IMIN) 0.5 A DHI On-Resistance Low IDHI = -10mA 1 3 Ω DHI On-Resistance High IDHI = 10mA 3 5 Ω DLO On-Resistance High IDLO = 10mA 3 5 Ω DLO On-Resistance Low IDLO = -10mA 1 3 Ω

ELECTRICAL CHARACTERISTICS (continued) (VDCIN = VLX = VCSSP = VCSSN = 19V, VBST - VLX = 4.5V, VFBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF, V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) MAX8731A SMBus Level 2 Battery Charger with Remote Sense PARAMETER CONDITIONS MIN TYP MAX UNITS ERROR AMPLIFIERS GMI Amplifier Transconductance ChargingCurrent() = 3968mA, VCSIP - VCSIN = 39.68mV 0.5 1.0 2.0 mA/V GMS Amplifier Transconductance InputCurrent() = 3968mA, VCSSP - VCSSN = 79.36mV 0.5 1.0 2.0 mA/V CCI/CCS/CCV Clamp Voltage 0.25V < VCCI/S/V < 2.0V 120 250 600 mV LOGIC LEVELS SDA/SCL Input-Low_Voltage V DD = 2.7V to 5.5V 0.8 V SDA/SCL Input-High_Voltage V DD = 2.7V to 5.5V 2.1 V SDA/SCL Input Bias Current V DD = 2.7V to 5.5V -1 +1 µA BATSEL Input-Low_Voltage 0.8 V BATSEL Input-High_Voltage 2.1 V BATSEL Input Bias Current -1 +1 µA SDA, Output Sink Current V (SDA) = 0.4V 6 mA SMBus TIMING SPECIFICATIONS (VDD = 2.7V to 5.5V) (see Figures 4 and 5) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS SMBus Frequency f SMB 10 100 kHz Bus Free Time t BUF 4.7 µs Start Condition Hold Time from SCL tHD:STA 4 µs Start Condition Setup Time from SCL tSU:STA 4.7 µs Stop Condition Setup Time from SCL tSU:STO 4 µs SDA Hold Time from SCL tHD:DAT 300 ns SDA Setup Time from SCL tSU:DAT 250 ns SCL Low Timeout tTIMEOUT (Note 1) 25 35 ms SCL Low Period T LOW 4.7 µs SCL High Period T HIGH 4 µs Maximum Charging Period Without a ChargeVoltage() or ChargeCurrent() Command 140 175 210 s

SMBus Level 2 Battery Charger with Remote Sense (VDCIN = VLX = VCSSP = VCSSN = 19V, V BST - VLX = 4.5V, V FBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF , V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS CHARGE-VOLTAGE REGULATION 16.632 16.968 V ChargingVoltage() = 0x41A0 -1 +1 % 12.466 12.717 V ChargingVoltage() = 0x3130 -1 +1 % 8.316 8.484 V ChargingVoltage() = 0x20D0 -1 +1 % 4.129 4.255 V Battery Full-Charge Voltage and Accuracy ChargingVoltage() = 0x1060 -1.5 +1.5 % CHARGE-CURRENT REGULATION CSIP-to-CSIN Full-Scale Current- Sense Voltage 78.22 83.05 mV 7.822 8.305 A RS2, Figure 1 = 10mΩ; ChargingCurrent()= 0x1f80 -3 +3 % 3.809 4.126 A RS2, Figure 1 = 10mΩ; ChargingCurrent() = 0x0f80 -4 +4 % Charge Current and Accuracy RS2, Figure 1 =10mΩ; ChargingCurrent() = 0x0080 30 400 mA Charge-Current Gain Error Based on ChargeCurrent() = 128mA and 8.064A -2 +2 % FBSA/FBSB/CSIP/CSIN Input- Voltage Range 0 19 V Adapter present, not charging, ICSIP + ICSIN + ILX + IFBS, VFBS_ = VLX = VCSIN = VCSIP = 19V 5 Battery Quiescent Current Adapter absent, ICSIP + ICSIN + ILX + IFBSA + IFBSB + ICSSP + ICSSN, VFBS_= VLX = VCSIN = VCSIP = 19V, VDCIN = 0V µA V A d a p t er = 26V , V B at te r y = 16.8V , not char g i ng 500 µA Charging 1 mA VAdapter = 19V, VBattery = 16.8V Not charging 500 µA Charging 1 mA Adapter Quiescent Current IDCIN + ICSSP + ICSSN VAdapter = 8V, VBattery = 4V Not charging 500 µA

SMBus Level 2 Battery Charger with Remote Sense ELECTRICAL CHARACTERISTICS (continued) (VDCIN = VLX = VCSSP = VCSSN = 19V, V BST - VLX = 4.5V, V FBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF , V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS INPUT-CURRENT REGULATION CSSP-to-CSSN Full-Scale Current-Sense Voltage VFBS_ = 19V 103.3 116.6 mV RS1, Figure 1 = 10mΩ; InputCurrent() = 11004mA or 3584mA -6 +6 Input Current Accuracy RS1, Figure 1 = 10mΩ; InputCurrent() = 2048mA -5 +5 Input Current-Limit Gain Error Based on InputCurrent() = 1024mA and 11004mA -5 +5 % Input Current-Limit Offset Based on InputCurrent() = 1024mA and 11004mA -1 +1 mV CSSP/CSSN Input Voltage Range 8 26 V IINP Transconductance VCSSP - CSSN = 110mV 2.7 3.3 mA/V IINP Offset Based on VCSSP - CSSN = 110mV and 20mV -1.5 +1.5 mV VCSSP - CSSN = 110mV -5 +5 VCSSP - CSSN = 55mV or 35mV -4 +4 IINP Accuracy VCSSP - CSSN = 20mV -10 +10 IINP Output Voltage Range 0 3.5 V SUPPLY AND LINEAR REGULATOR DCIN, Input Voltage Range 8.0 26.0 V DCIN falling 7 DCIN Undervoltage-Lockout Trip Point DCIN rising 7.85 — VCSSP - VCSIN falling 9 21 POWER_FAIL Threshold VCSSP - VCSIN rising 160 271 mV LDO Output Voltage 8.0V < VDCIN < 28V, no load 5.25 5.55 V LDO Load Regulation 0 < ILDO < 30mA 100 mV LDO Undervoltage-Lockout Threshold VDCIN = 8.0V, VLDO falling 3.20 5.15 V VDD Range 2.7 5.5 V VDD UVLO Rising 2.7 V VDD Quiescent Current DCIN < 6V, VDD = 5.5V, SCL = SDA = 5.5V 27 µA REFERENCE REF Output Voltage 0 < IREF < 500µA 4.053 4.139 V REF Undervoltage-Lockout Trip Point REF falling 3.9 V ACOK ACOK Sink Current VACOK = 0.4V, ACIN = 1.5V 1 mA

SMBus Level 2 Battery Charger with Remote Sense ELECTRICAL CHARACTERISTICS (continued) (VDCIN = VLX = VCSSP = VCSSN = 19V, V BST - VLX = 4.5V, V FBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF , V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = -40°C to +85°C, unless otherwise noted.) (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS ACIN ACIN Threshold 2.007 2.089 V ACIN Threshold Hysteresis 10 30 mV REMOTE-SENSE INPUTS FBS_ Range VCSIN - VFBS 0 200 mV FBS_ Gain ΔVCSIN / Δ(VCSIN - VFBS_) 0.9 1.1 V/V CSIN-FBS_ Clamp Voltage 220 280 mV FBS_ Bias Current Charger switching, FBS_ selected 14 µA SWITCHING REGULATOR VCSIN = 16.0V, VCSSP = 19V 360 440 Off-Time VCSIN = 16.0V, VCSSP = 17V 260 350 ns BST Supply Current DHI high 800 µA DHI On-Resistance Low IDHI = -10mA 3 Ω DHI On-Resistance High IDHI = 10mA 5 Ω DLO On-Resistance High IDLO = 10mA 5 Ω DLO On-Resistance Low IDLO = -10mA 3 Ω ERROR AMPLIFIERS GMV Amplifier Transconductance C har g i ng V ol tag e( ) = 16.8V , V FBS_ = 16.8V 0.0625 0.2500 mA/V GMI Amplifier Transconductance ChargingCurrent() = 3968mA, VCSIP - VCSIN = 39.68mV 0.5 2.0 mA/V GMS Amplifier Transconductance InputCurrent() = 3968mA, VCSSP - VCSSN = 79.36mV 0.5 2.0 mA/V CCI/CCS/CCV Clamp Voltage 0.25V < VCCI/S/V < 2.0V 150 600 mV LOGIC LEVELS SDA/SCL Input Low Voltage V DD = 2.7V to 5.5V 0.8 V SDA/SCL Input High Voltage V DD = 2.7V to 5.5V 2.3 V BATSEL Input Low Voltage 0.8 V BATSEL Input High Voltage 2.3 V SDA, Output Sink Current V (SDA) = 0.4V 6 mA

SMBus Level 2 Battery Charger with Remote Sense ELECTRICAL CHARACTERISTICS (continued) (VDCIN = VLX = VCSSP = VCSSN = 19V, V BST - VLX = 4.5V, V FBSA = VFBSB = VCSIP = VCSIN = 16.8V, BATSEL = GND = PGND = 0, CLDO = 1µF, V CC = LDO, C REF = 1µF, C DAC = 0.1µF , V DD = 3.3V, ACIN = 2.5V; pins CCI, CCV, and CCS are compensated per Figure 1; TA = -40°C to +85°C, unless otherwise noted.) (Note 2) SMB TIMING SPECIFICATION (VDD = 2.7V to 5.5V) (see Figures 4 and 5) PARAMETERS SYMBOL CONDITIONS MIN TYP MAX UNITS SMBus Frequency f SMB 10 100 kHz Bus Free Time t BUF 4.7 µs START Condition Hold Time from SCL tHD:STA 4 µs START Condition Setup Time from SCL tSU:STA 4.7 µs STOP Condition Setup Time from SCL tSU:STO 4 µs SDA Hold Time from SCL tHD:DAT 300 ns SDA Setup Time from SCL tSU:DAT 250 ns SCL Low Timeout tTIMEOUT (Note 1) 25 35 ms SCL Low Period T LOW 4.7 µs SCL High Period T HIGH 4 µs Maximum Charging Period Without a ChargeVoltage() or ChargeCurrent() Command 140 210 s Note 1: Devices participating in a transfer time out when any clock low exceeds the 25ms minimum timeout period. Devices that have detected a timeout condition must reset the communication no later than the 35ms maximum timeout period. Both a master and a slave must adhere to the maximum value specified as it incorporates the cumulative stretch limit for both a master (10ms) and a slave (25ms). Note 2: Specifications to -40°C are guaranteed by design, not production tested.

SMBus Level 2 Battery Charger with Remote Sense Typical Operating Characteristics (Circuit of Figure 1, adapter = 19.5V, ChargeVoltage() = 16.8V, ChargeCurrent() = 3.854A, InputCurrent() = 3.584A, T A = +25°C, unless otherwise noted.) INPUT CURRENT-LIMIT ERROR vs. INPUT CURRENT-LIMIT SETTING INPUT CURRENT-LIMIT SETTING (A) INPUT CURRENT-LIMIT ERROR (%) MAX8731A toc01 02468 1 0 MAXIMUM MINIMUM TYPICAL INPUT CURRENT-LIMIT ERROR vs. SYSTEM CURRENT SYSTEM CURRENT (A) INPUT CURRENT-LIMIT ERROR (%) MAX8731A toc02 01234 -0.4 -0.2 0.2 0.4 INPUT CURRENT LIMIT = 2.048A INPUT CURRENT LIMIT = 3.584A INPUT CURRENT LIMIT = 4.096A INPUT CURRENT-LIMIT ERROR vs. SYSTEM CURRENT SYSTEM CURRENT (A) INPUT CURRENT-LIMIT ERROR (%) MAX8731A toc03 01234 -1.0 -0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 1.0 VBATT = 8.4V VBATT = 16.8V VBATT = 12.6V INPUT CURRENT LIMIT = 3.584A IINP ERROR vs. SYSTEM CURRENT SYSTEM CURRENT (A) IINP ERROR (%) MAX8731A toc04 -1.0 -0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 1.0 INPUT CURRENT LIMIT = 2.048A INPUT CURRENT LIMIT = 3.584A INPUT CURRENT LIMIT = 4.096A OPERATING AT INPUT CURRENT LIMIT IINP ERROR vs. SYSTEM CURRENT SYSTEM CURRENT (A) IINP ERROR (%) MAX8731A toc05 01234 0.5 1.0 1.5 2.0 2.5 VBATT = 8.4V VBATT = 12.6V VBATT = 16.8V INPUT CURRENT LIMIT = 3.584A IINP ERROR vs. INPUT CURRENT INPUT CURRENT (A) IINP ERROR (%) MAX8731A toc06 0123456 -10 MAXIMUM MINIMUM TYPICAL NOT SWITCHING CHARGE-CURRENT ERROR vs. CHARGE CURRENT-LIMIT SETTING CHARGE-CURRENT SETTING (A) CHARGE-CURRENT LIMIT ERROR (%) MAX8731A toc07 024 8 6 -10 MAXIMUM MINIMUM TYPICAL CHARGE-CURRENT ERROR vs. BATTERY VOLTAGE BATTERY VOLTAGE (V) CHARGE-CURRENT ERROR (%) MAX8731A toc08 3 6 9 12 15 18 3.072A 3.968A 8.064A TRICKLE-CHARGE CURRENT ERROR vs. BATTERY VOLTAGE BATTERY VOLTAGE (V) TRICKLE-CHARGE CURRENT ERROR (%) MAX8731A toc09 0 3 6 9 12 15 18 -30 -25 -15 -20 -10 ChargeCurrent( ) = 128mA

vs. CHARGE-VOLTAGE SETTING CHARGE-VOLTAGE SETTING (V) CHARGE-VOLTAGE ERROR (%) MAX8731A toc10 4 8 12 16 20 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 BATTERY-VOLTAGE ERROR vs. CHARGE CURRENT CHARGE CURRENT (A) BATTERY-VOLTAGE ERROR (%) MAX8731A toc11 0123456 -0.3 -0.2 -0.1 0.1 0.2 0.3

3 CELLS

2 CELLS

4 CELLS

20μs/div MAX8731A toc12 13.5V 13.0V 12.5V VOUT OUTPUT CAPACITOR = 22μF ChargeVoltage( ) = 12.6V VOUT OUTPUT CAPACITOR = 10μF SYSTEM LOAD TRANSIENT 200μs/div MAX8731A toc13 LOAD CURRENT ADAPTER CURRENT INDUCTOR CURRENT CCS VOLTAGE 500mV/div CCI VOLTAGE 500mV/div 500mV/div 500mV/divCCI CCS CCI CCS EFFICIENCY vs. CHARGE CURRENT CHARGE CURRENT (A) EFFICIENCY (%) MAX8731A toc14 02468 100

3 CELLS 4 CELLS

ILDO (mA) LDO ERROR (mV) MAX8731A toc15 0 2 04 06 08 0 1 0 0 -40 -35 -30 -25 -20 -15 -10 CHARGER OFF MAX8731A SMBus Level 2 Battery Charger with Remote Sense Typical Operating Characteristics (continued) (Circuit of Figure 1, adapter = 19.5V, ChargeVoltage() = 16.8V, ChargeCurrent() = 3.854A, InputCurrent() = 3.584A, T A = +25°C, unless otherwise noted.)

Typical Operating Characteristics (continued) (Circuit of Figure 1, adapter = 19.5V, ChargeVoltage() = 16.8V, ChargeCurrent() = 3.854A, InputCurrent() = 3.584A, T A = +25°C, unless otherwise noted.) MAX8731A SMBus Level 2 Battery Charger with Remote Sense SWITCHING FREQUENCY VADAPTER - VBATTERY (V) FREQUENCY (kHz) MAX8731A toc19 0 5 10 15 20 150 200 250 300 350 400 450 BATTERY-CHARGE CURVE TIME (h) CHARGE CURRENT (A) MAX8731A toc20 BATTERY VOLTAGE (V) 10.0 10.5 11.0 11.5 12.0 12.5 13.0 0123456 BATTERY VOLTAGE CHARGE CURRENT 2.8Ah x 3S3P BATTERY ADAPTER CURRENT vs. ADAPTER VOLTAGE ADAPTER VOLTAGE (V) ADAPTER CURRENT (mA) MAX8731A toc21 0 5 10 15 20 25 30 0.5 1.0 1.5 2.0 2.5 3.0 NOT SWITCHING SWITCHING, NO LOAD ChargeVoltage( ) = 4.192V BATTERY-LEAKAGE CURRENT vs. BATTERY VOLTAGE BATTERY VOLTAGE (V) BATTERY CURRENT (μA) MAX8731A toc22 0 5 10 15 20 0.5 1.0 1.5 2.0 2.5 ADAPTER PRESENT OR ABSENT LDO LINE REGULATION VDCIN (V) LDO ERROR (mV) MAX8731A toc16 8 1 31 82 3 NOT SWITCHING REF LOAD REGULATION IREF (mA) REF ERROR (%) MAX8731A toc17 -0.20 -0.15 -0.10 -0.05 0.05 0.10 0.15 0.20 NOT SWITCHING REF ERROR vs. TEMPERATURE TEMPERATURE (°C) REF ERROR (%) MAX8731A toc18 -40 -20 0 20 40 60 80 -0.3 -0.2 -0.1 0.1 0.2 0.3

SMBus Level 2 Battery Charger with Remote Sense Pin Description PIN NAME FUNCTION 1, 12 GND Analog Ground. Connect directly to the paddle. 2 ACIN AC Adapter Detect Input. ACIN is the input to an uncommitted comparator. 3 REF 4.096V Voltage Reference. Bypass REF with a 1µF capacitor to GND. 4 CCS Input Current Regulation Loop-Compensation Point. Connect 0.01µF from CCS to GND. 5 CCI Output Current Regulation Loop-Compensation Point. Connect 0.01µF from CCI to GND. 6 CCV Voltage Regulation Loop-Compensation Point. Connect 10kΩ in series with 0.01µF to GND. 7 DAC DAC Voltage Output. Bypass with 0.1µF from DAC to GND. 8 IINP Input Current Monitor Output. IINP sources the current proportional to the current sensed across CSSP and CSSN. The transconductance from (CSSP - CSSN) to IINP is 3mA/V. 9 SDA S M Bus D ata I/O. Op en- d r ai n outp ut. C onnect an exter nal p ul l up r esi stor accor d i ng to S M Bus sp eci fi cati ons. 10 SCL SMBus Clock Input. Connect an external pullup resistor according to SMBus specifications. 11 VDD Logic Circuitry Supply-Voltage Input. Bypass with a 0.1µF capacitor to GND.

13 ACOK

AC D etect Outp ut. Thi s op en- d r ai n outp ut i s hi g h i m p ed ance w hen AC IN i s g r eater than RE F/2. The AC O K outp ut r em ai ns l ow w hen the M AX 8731A i s p ow er ed d ow n. C onnect a 10kΩ p ul l up r esi stor fr om V C C to AC O K. 14 BATSEL Batter y V ol tag e S el ect Inp ut. D r i ve BATS E L hi g h to sel ect b atter y B, or d r i ve BATS E L l ow to sel ect b atter y A. Any chang e of BATS E L i m m ed i atel y stop s char g i ng . C har g i ng b eg i ns ag ai n i n ap p r oxi m atel y 10m s. 15 FBSA Remote-Sense Input for the Output Voltage of Battery A. Connect a 100Ω resistor from FBSA to the battery connector, and a 10nF capacitor from FBSA to PGND. 16 FBSB Remote-Sense Input for the Output Voltage of Battery B. Connect a 100Ω resistor from FBSB to the battery connector, and a 10nF capacitor from FBSB to PGND.

17 CSIN Charge Current-Sense Negative Input

18 CSIP C har g e C ur r ent- S ense P osi ti ve Inp ut. C onnect a 10m Ω cur r ent- sense r esi stor b etw een C S IP and C S IN .

19 PGND Power Ground

20 DLO Low-Side Power MOSFET Driver Output. Connect to low-side n-channel MOSFET. DLO drives between LDO and PGND.

21 LDO

Linear-Regulator Output. LDO is the output of the 5.4V linear regulator supplied from DCIN. LDO also directly supplies the DLO driver and the BST charge pump. Bypass with a 1µF ceramic capacitor from LDO to PGND. 22 DCIN Charger Bias Supply Input. Bypass DCIN with a 0.1µF capacitor to PGND. 23 LX H i g h- S i d e P ow er M OS FE T D r i ver S our ce C onnecti on. C onnect to the sour ce of the hi g h- si d e n- channel M OS FE T. 24 DHI High-Side Power MOSFET Driver Output. Connect to the high-side n-channel MOSFET gate. 25 BST H i g h- S i d e P ow er M OS FE T D r i ver P ow er - S up p l y C onnecti on. C onnect a 0.1µF cap aci tor fr om BS T to LX . 26 VCC D evi ce P ow er - S up p l y Inp ut. C onnect to LD O thr oug h an RC fi l ter as show n i n Fi g ur e 1.

27 CSSN Input Current-Sense Negative Input

28 CSSP Inp ut C ur r ent- S ense P osi ti ve Inp ut. C onnect a 10m Ω cur r ent- sense r esi stor b etw een C S S P and C S S N . — BP Backside Paddle. Connect the backside paddle to analog ground.

Figure 1. Typical Dual-Battery Application Circuit allowing the use of small-valued sense resistors. (CCV) and two current-regulation loops (CCI and CCS).

Figure 2. Functional Diagram A functional diagram is shown in Figure 2.

0 — Not used. Normally a 1mV weight. 1 — Not used. Normally a 2mV weight. 2 — Not used. Normally a 4mV weight. 3 — Not used. Normally a 8mV weight. 4 Charge voltage, DACV 0 0 = Adds 0mV of charger voltage compliance, 1024mV min. 1 = Adds 16mV of charger voltage compliance. 5 Charge voltage, DACV 1 0 = Adds 0mV of charger voltage compliance, 1024mV min. 1 = Adds 32mV of charger voltage compliance. 6 Charge voltage, DACV 2 0 = Adds 0mV of charger voltage compliance, 1024mV min. 1 = Adds 64mV of charger voltage compliance. 7 Charge voltage, DACV 3 0 = Adds 0mV of charger voltage compliance, 1024mV min. 1 = Adds 128mV of charger voltage compliance. 8 Charge voltage, DACV 4 0 = Adds 0mV of charger voltage compliance, 1024mV min. 1 = Adds 256mV of charger voltage compliance. 9 Charge voltage, DACV 5 0 = Adds 0mV of charger voltage compliance, 1024mV min. 1 = Adds 512mV of charger voltage compliance. 10 Charge voltage, DACV 6 0 = Adds 0mA of charger voltage compliance. 1 = Adds 1024mV of charger voltage compliance. 11 Charge voltage, DACV 7 0 = Adds 0mV of charger voltage compliance. 1 = Adds 2048mV of charger voltage compliance. 12 Charge voltage, DACV 8 0 = Adds 0mV of charger voltage compliance. 1 = Adds 4096mV of charger voltage compliance. 13 Charge voltage, DACV 9 0 = Adds 0mV of charger voltage compliance. 1 = Adds 8192mV of charger voltage compliance. 14 Charge voltage, DACV 10 0 = Adds 0mV of charger voltage compliance. 1 = Adds 16,384mV of charger voltage compliance, 19,200mV max. 15 — Not used. Normally a 32,768mV weight. Table 1. ChargeVoltage () (0x15) Table 1. The ChargeVoltage() command uses the Write- remain low until the charger is restarted.

0 — Not used. Normally a 1mA weight. 1 — Not used. Normally a 2mA weight. 2 — Not used. Normally a 4mA weight. 3 — Not used. Normally an 8mA weight. 4 — Not used. Normally a 16mA weight. 5 — Not used. Normally a 32mA weight. 6 — Not used. Normally a 64mA weight. 7 Charge Current, DACI 0 0 = Adds 0mA of charger current compliance. 1 = Adds 128mA of charger current compliance. 8 Charge Current, DACI 1 0 = Adds 0mA of charger current compliance. 1 = Adds 256mA of charger current compliance. 9 Charge Current, DACI 2 0 = Adds 0mA of charger current compliance. 1 = Adds 512mA of charger current compliance. 10 Charge Current, DACI 3 0 = Adds 0mA of charger current compliance. 1 = Adds 1024mA of charger current compliance. 11 Charge Current, DACI 4 0 = Adds 0mA of charger current compliance. 1 = Adds 2048mA of charger current compliance. 12 Charge Current, DACI 5 0 = Adds 0mA of charger current compliance. 1 = Adds 4096mA of charger current compliance, 8064mA max. 13 — Not used. Normally a 8192mA weight. 14 — Not used. Normally a 16,386mA weight. 15 — Not used. Normally a 32,772mA weight. Table 2. ChargeCurrent() (0x14) (10mΩ Sense Resistor, RS2) the total input current can increase without limit. the charger input current, and the system load current.

0 — Not used. Normally a 2mA weight. 1 — Not used. Normally a 4mA weight. 2 — Not used. Normally an 8mA weight. 3 — Not used. Normally a 16mA weight. 4 — Not used. Normally a 32mA weight. 5 — Not used. Normally a 64mA weight. 6 — Not used. Normally a 128mA weight. 7 Input Current, DACS 0 0 = Adds 0mA of input current compliance. 1 = Adds 256mA of input current compliance. 8 Input Current, DACS 1 0 = Adds 0mA of input current compliance. 1 = Adds 512mA of input current compliance. 9 Input Current, DACS 2 0 = Adds 0mA of input current compliance. 1 = Adds 1024mA of input current compliance. 10 Input Current, DACS 3 0 = Adds 0mA of input current compliance. 1 = Adds 2048mA of input current compliance. 11 Input Current, DACS 4 0 = Adds 0mA of input current compliance. 1 = Adds 4096mA of input current compliance. 12 Input Current, DACS 5 0 = Adds 0mA of input current compliance. 1 = Adds 8192mA of input current compliance, 11,004mA max. 13 — Not used. Normally a 16,384mA weight. 14 — Not used. Normally a 32,768mA weight. 15 — Not used. Normally a 65,536mA weight. Table 3. InputCurrent() (0x3F) (10mΩ Sense Resistor, RS1) commands must be resent to reenable charging. connect BATSEL directly to GND and use only FBSA.

SMBus Level 2 Battery Charger with Remote Sense where RPack is the total resistance in the battery pack, RBoard is the board resistance in series with the battery charge path, t CV0 is the constant-voltage charge time without remote sense, and t CVRS is the constant-volt- age charge time with remote sense. The MAX8731A includes a safety feature, which limits the charge voltage when FBS_ or the selector is dis- connected. The MAX8731A guarantees that CSIN does not regulate more than 250mV above the selected charging voltage. This also limits the extent to which remote sense can cancel charge-path impedance. Input Current Measurement Use IINP to monitor the system-input current sensed across CSSP and CSSN. The voltage at IINP is propor- tional to the input current by the equation: V IINP = IINPUT x RS1 x GIINP x R8 where I INPUT is the DC current supplied by the AC adapter, GIINP is the transconductance of IINP (3mA/V typ), and R8 is the resistor connected between IINP and ground. Typically, IINP has a 0 to 3.5V output volt- age range. Leave IINP open if not used. LDO Regulator An integrated low-dropout (LDO) linear regulator pro- vides a 5.4V supply derived from DCIN, and delivers over 30mA of load current. The LDO powers the gate drivers of the n-channel MOSFETs. See the MOSFET Drivers section. LDO has a minimum current limit of 35mA. This allows the MAX8731A to work with 87nC of total gate charge (both high-side and low-side MOSFETs). Bypass LDO to PGND with a 1µF or greater ceramic capacitor. AC Adapter Detection The MAX8731A includes a hysteretic comparator that detects the presence of an AC power adapter. When ACIN is greater than 2.048V, the open-drain ACOK out- put becomes high impedance. Connect 10k Ω pullup resistance between LDO and ACOK. Use a resistive voltage-divider from the adapter’s output to the ACIN pin to set the appropriate detection threshold. Select the resistive voltage-divider not to exceed the 6V absolute maximum rating of ACIN. VDD Supply The VDD input provides power to the SMBus interface. Connect V DD to LDO, or apply an external supply to VDD to keep the SMBus interface active while the sup- ply to DCIN is removed. When V DD is biased the inter- nal registers are maintained. Bypass V DD to GND with a 0.1µF or greater ceramic capacitor. Operating Conditions The MAX8731A has the following operating states:

• Adapter Present: When DCIN is greater than 7.5V, the adapter is considered to be present. In this con- dition, both the LDO and REF function properly and battery charging is allowed: a) Charging: The total MAX8731A quiescent current when charging is 1mA (max) plus the current required to drive the MOSFETs. b) Not Charging: To disable charging, set either ChargeCurrent() or ChargeVoltage() to zero. When the adapter is present and charging is disabled, the total adapter quiescent current is less than 1mA and the total battery quiescent current is less than 5µA.
• Adapter Absent (Power Fail): When V CSSP is less than VCSIN + 10mV, the MAX8731A is in the power- fail state, since the DC-DC converter is in dropout. The charger does not attempt to charge in the power-fail state. Typically, this occurs when the adapter is absent. When the adapter is absent, the total MAX8731A quiescent battery current is less than 1µA (max). DD Undervoltage (POR): When V DD is less than 2.5V, the VDD supply is in an undervoltage state and the internal registers are in their POR state. The SMBus interface does not respond to commands. When V DD rises above 2.5V, the MAX8731A is in a power-on reset state. Charging does not occur until the ChargeVoltage() and ChargeCurrent() com- mands are sent. When V DD is greater than 2.5V, SMBus registers are preserved. The MAX8731A allows charging under the following conditions: 1) DCIN > 7.5V, LDO > 4V, REF > 3.1V 2) V CSSP > VCSIN + 210mV (15mV falling threshold) 3) V DD > 2.5V

7 BITS 8 BITS1b

8 BITS

7 BITS

Figure 3. SMBus Write-Word and Read-Word Protocols register and a 16-bit manufacturer ID register (0xFF). times according to the SMBus specifications. high. The bus is then free for another transmission. commands as described in Table 4.

switch and an n-channel low-side synchronous rectifier. compares the control signal (LVC) against 100mV (typ). IMAX comparator’s output goes low. Table 4. Battery-Charger Command Summary Figure 6. DC-DC Converter Functional Diagram

SMBus Level 2 Battery Charger with Remote Sense control point. Clamping the other two control loops close to the lowest control loop ensures fast transition with minimal overshoot when switching between differ- ent control loops (see the Compensation section). Continuous-Conduction Mode With sufficient charge current, the MAX8731A’s induc- tor current never crosses zero, which is defined as con- tinuous-conduction mode. The regulator switches at 400kHz (nominal) if V CSIN < 0.88 x V CSSP. The con- troller starts a new cycle by turning on the high-side MOSFET and turning off the low-side MOSFET. When the charge-current feedback signal (CSI) is greater than the control point (LVC), the CCMP comparator out- put goes high and the controller initiates the off-time by turning off the high-side MOSFET and turning on the low-side MOSFET. The operating frequency is gov- erned by the off-time and is dependent upon V CSIN and VCSSP. The off-time is set by the following equation: The on-time can be determined using the following equation: where: The switching frequency can then be calculated: These equations describe the controller’s pseudo- fixed-frequency performance over the most common operating conditions. At the end of the fixed off-time, the controller initiates a new cycle if the control point (LVC) is greater than 100mV and the peak charge current is less than the cycle-by-cycle current limit. Restated another way, IMIN must be high, IMAX must be low, and OVP must be low for the controller to initiate a new cycle. If the peak inductor current exceeds the IMAX comparator threshold or the output voltage exceeds the OVP threshold, then the on-time is terminated. The cycle-by- cycle current limit effectively protects against overcur- rent and short-circuit faults. If during the off-time the inductor current goes to zero, the ZCMP comparator output pulls high, turning off the low-side MOSFET. Both the high- and low-side MOSFETs are turned off until another cycle is ready to begin. ZCOMP causes the MAX8731A to enter into dis- continuous-conduction mode (see the Discontinuous Conduction section). There is a 0.3µs minimum off-time when the (V CSSP - VCSIN) differential becomes too small. If V CSIN ≥ 0.88 x VCSSP, the threshold for the 0.3µs minimum off-time is reached. The switching frequency in this mode varies according to the equation: Discontinuous Conduction The MAX8731A can also operate in discontinuous-con- duction mode to ensure that the inductor current is always positive. The MAX8731A enters discontinuous- conduction mode when the output of the LVC control point falls below 100mV. This corresponds to peak inductor current = 500mA: charge current for RS2 = 10mΩ. In discontinuous mode, a new cycle is not started until the LVC voltage rises above 100mV. Discontinuous- mode operation can occur during conditioning charge of overdischarged battery packs, when the charge cur- rent has been reduced sufficiently by the CCS control loop, or when the charger is in constant-voltage mode with a nearly full battery pack. I mV RS mACHG =× × =1 100 20 2 250 f LI VV sRIPPLE CSSN BATT = × + 03. μ f ttSW ON OFF = + I Vt LRIPPLE BATT OFF= × t LI VVON RIPPLE CSSN BATT = × ts VV VOFF CSSP CSIN CSSP 25. μ

inates the parallel impedance near crossover. Figure 7. CCV Loop Diagram CCV Pole Lowest frequency pole created by CCV and GMV’s finite output resistance. stability of the system or the crossover frequency. capacitor with an ESR zero greater than the crossover frequency. Table 5. CCV Loop Poles and Zeros

Figure 10. CCI Loop Response Figure 11. CCS Loop Diagram response using the values calculated above.

pation limits often limits how small the MOSFET can be. Figure 12. CCS Loop Response

SMBus Level 2 Battery Charger with Remote Sense where tTRANS is the driver’s transition time and can be calculated as follows: IGATE is the peak gate-drive current. The following is the power dissipated due to the high- side n-channel MOSFET’s output capacitance (CRSS): The following high-side MOSFET’s loss is due to the reverse-recovery charge of the low-side MOSFET’s body diode: PD QRR(HighSide) = QRR2 x VDCIN x fSW x 0.5 Ignore PD QRR (HighSide) if a Schottky diode is used parallel to the low-side MOSFET. The total high-side MOSFET power dissipation is: +PDQRR (HighSide) Switching losses in the high-side MOSFET can become an insidious heat problem when maximum AC adapter voltages are applied. If the high-side MOSFET chosen for adequate R DS(ON) at low-battery voltages becomes hot when biased from V IN(MAX) , consider choosing another MOSFET with lower parasitic capacitance. For the low-side MOSFET (N2), the worst-case power dissi- pation always occurs at maximum input voltage: The following additional loss occurs in the low-side MOSFET due to the body diode conduction losses: The total power low-side MOSFET dissipation is: These calculations provide an estimate and are not a sub- stitute for breadboard evaluation, preferably including a verification using a thermocouple mounted on the MOSFET. Inductor Selection The charge current, ripple, and operating frequency (off-time) determine the inductor characteristics. For optimum efficiency, choose the inductance according to the following equation: This sets the ripple current to 1/3 the charge current and results in a good balance between inductor size and efficiency. Higher inductor values decrease the rip- ple current. Smaller inductor values save cost but require higher saturation current capabilities and degrade efficiency. Inductor L1 must have a saturation current rating of at least the maximum charge current plus 1/2 the ripple current (ΔIL): I SAT = ICHG + (1/2) ΔIL The ripple current is determined by: ΔIL = VBATT × tOFF / L where: t OFF = 2.5µs (VDCIN - VBATT) / VDCIN for VBATT < 0.88 VDCIN or during dropout: tOFF = 0.3µs for VBATT > 0.88 VDCIN L Vt I BATT OFF CHG = × ×03. PD LowSide PD LowSide PD LowSide TOTAL CONDUCTION BDY () () PD Low Side I VBDY PEAK() . . =× ×00 5 04 PD LowSide V V IR CONDUCTION FBS CSSP CHG DS ON =−⎛ PD HighSide PD HighSide PD HighSide PD HighSide TOTAL CONDUCTION SWITCHING COSS () () () () PD HighSide VC f COSS DCIN RSS SW() ≈ ××2 t II Q I and f kHzTRANS Gsrc Gsnk G GATE SW=+⎛ ⎠⎟ ×≈112 400,

requirement (IRMS) imposed by the switching currents. input capacitors according to the worst-case conditions. capacitor’s ESR is much lower than the battery’s ESR. good voltage ratings and resilience to surge currents. tion of the smart-battery system (SBS) specifications. 0.95, or approximately 4.14A. Bypass DCIN with a 1µF ceramic to ground ( Figure 1). and REF as shown in Figure 1. Figure 13. Typical Smart-Battery System

SMBus Level 2 Battery Charger with Remote Sense Good PCB layout is required to achieve specified noise immunity, efficiency, and stable performance. The PCB layout artist must be given explicit instructions—prefer- ably, a sketch showing the placement of the power- switching components and high-current routing. Refer to the PCB layout in the MAX8731A evaluation kit for exam- ples. A ground plane is essential for optimum perfor- mance. In most applications, the circuit will be located on a multilayer board, and full use of the four or more copper layers is recommended. Use the top layer for high-current connections, the bottom layer for quiet con- nections, and the inner layers for uninterrupted ground planes. Use the following step-by-step guide: 1) Place the high-power connections first, with their grounds adjacent: a) Minimize the current-sense resistor trace lengths, and ensure accurate current sensing with Kelvin connections. b) Minimize ground trace lengths in the high-cur- rent paths. c) Minimize other trace lengths in the high-current paths. Use > 5mm wide traces in the high-current paths. d) Connect C1 and C2 to high-side MOSFET (10mm max length). Place the input capacitor between the input current-sense resistor and drain of the high-side MOSFET. e) Minimize the LX node (MOSFETs, rectifier cath- ode, inductor (15mm max length)). Keep LX on one side of the PCB to reduce EMI radiation. f) Since the return path of DHI is LX, route DHI near LX. Optimally, LX and DHI should overlap. The same principle is applied to DLO and PGND. g) Ideally, surface-mount power components are flush against one another with their ground termi- nals almost touching. These high-current grounds are then connected to each other with a wide, filled zone of top-layer copper, so they do not go through vias. The resulting top-layer sub- ground plane is connected to the normal inner- layer ground plane at the paddle. Other high-current paths should also be minimized, but focusing primarily on short ground and current- sense connections eliminates approximately 90% of all PCB layout problems. 2) Place the IC and signal components. Keep the main switching node (LX node) away from sensitive analog components (current-sense traces and REF capacitor). Important: The IC must be no further than 10mm from the current-sense resistors. Quiet connections to REF, CCS, DAC, CCV, CCI, ACIN, and VCC should be returned to a separate ground (GND) island. The analog ground is separately worked from power ground in Figure 1. There is very little current flowing in these traces, so the ground island need not be very large. When placed on an inner layer, a sizable ground island can help simplify the layout because the low-current connections can be made through vias. The ground pad on the back- side of the package should also be connected to this quiet ground island. 3) Keep the gate-drive traces (DHI and DLO) as short as possible (L < 20mm), and route them away from the current-sense lines and REF. These traces should also be relatively wide (W > 1.25mm). 4) Place ceramic bypass capacitors close to the IC. The bulk capacitors can be placed further away. Place the current-sense input filter capacitors under the part, connected directly to the GND pin. 5) Use a single-point star ground placed directly below the part at the PGND pin. Connect the power ground (ground plane) and the quiet ground island at this location. Chip Information TRANSISTOR COUNT: 10,234 PROCESS: BiCMOS

SMBus Level 2 Battery Charger with Remote Sense

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline info rmation go to www.maxim-ic.com/packages.) QFN THIN.EPS PACKAGE OUTLINE, 21-0140 2 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm

SMBus Level 2 Battery Charger with Remote Sense Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circu it patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2007 Maxim Integrated Products is a registered trademark of Maxim Integrated Products. Inc. PACKAGE OUTLINE, 21-0140 2 16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline info rmation go to www.maxim-ic.com/packages.)