UC1526_07 TI | Alldatasheet

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Technical content

DESCRIPTION

The UC1526 is a high performance monolithic pulse width modulator circuit designed for fixed-frequency switching regulators and other power control applications. Included in an 18-pin dual-in-line pack- age are a temperature compensated voltage reference, sawtooth os- cillator, error amplifier, pulse width modulator, pulse metering and setting logic, and two low impedance power drivers. Also included are protective features such as soft-start and under-voltage lockout, digital current limiting, double pulse inhibit, a data latch for single pulse metering, adjustable deadtime, and provision for symmetry cor- rection inputs. For ease of interface, all digital control ports are TTL and B-series CMOS compatible. Active LOW logic design allows wired-OR connections for maximum flexibility. This versatile device can be used to implement single-ended or push-pull switching regu- lators of either polarity, both transformerless and transformer cou- pled. The UC1526 is characterized for operation over the full military temperature range of -55°C to +125°C. The UC2526 is characterized for operation from -25°C to +85°C, and the UC3526 is characterized for operation from 0° to +70°C. Regulating Pulse Width Modulator

FEATURES

  • 8 To 35V Operation
  • 5V Reference Trimmed To ±1%
  • 1Hz To 400kHz Oscillator Range
  • Dual 100mA Source/Sink Outputs
  • Digital Current Limiting
  • Double Pulse Suppression
  • Programmable Deadtime
  • Under-Voltage Lockout
  • Single Pulse Metering
  • Programmable Soft-Start
  • Wide Current Limit Common Mode Range
  • TTL/CMOS Compatible Logic Ports
  • Symmetry Correction Capability
  • Guaranteed 6 Unit Synchronization BLOCK DIAGRAM

ABSOLUTE MAXIMUM RATINGS (Note 1, 2) IN Power Dissipation at T Note 1: Values beyond which damage may occur. Note 2: Consult packaging section of databook for thermal limitations and considerations of package. CONNECTION DIAGRAMS UC1526 UC2526 UC3526 DIL-18, SOIC-18 (TOP VIEW) J or N Package, DW Package RECOMMENDED OPERATING CONDITIONS (Note 3) Operating Ambient Temperature Range Note 3: Range over which the device is functional and parameter limits are guaranteed. PACKAGE PIN FUNCTION FUNCTION PIN N/C 1 +Error 2 -Error 3 Comp. 4 C SS 5 Reset - Current Sense 7 + Current Sense 8 Shutdown R TIMING 10 C T 11 R D 12 Sync 13 Output A 14 VC 15 N/C 16 Ground 17 Output B 18 +VIN 19 VREF 20 PLCC-20, LCC-20 (TOP VIEW) Q and L Packages ELECTRICAL CHARACTERISTICS: PARAMETER TEST CONDITIONS UC1526 / UC2526 UC3526 UNITS MIN TYP MAX MIN TYP MAX Reference Section (Note 4) Line Regulation +V IN = 8 to 35V 10 20 10 30 mV Load Regulation I L = 0 to 20mA 10 30 10 50 mV Temperature Stability Over Operating T J 15 50 15 50 mV Total Output Voltage Range Over Recommended Operating Conditions Short Circuit Current V REF = 0V 25 50 100 25 50 100 mA Under -Voltage Lockout RESET Note 4: IL = 0mA. +VIN = 15V, and over operating ambient temperature, unless otherwise specified, TA = TJ.

ELECTRICAL CHARACTERISTICS: PARAMETER TEST CONDITIONS UC1526 / UC2526 UC3526 UNITS MIN TYP MAX MIN TYP MAX Oscillator Section (Note 5) Initial Accuracy T J = + 25°C ±3 ±8 ±3 ±8% Voltage Stability +V IN = 8 to 35V 0.5 1 0.5 1 % Temperature Stability Over Operating T J 71 0 3 5% Minimum Frequency R T = 150kΩΩ , CT = 20µµF1 1 H z Maximum Frequency R T = 2kΩΩ , CT = 1.0nF 400 400 kHz Sawtooth Peak Voltage +V IN = 35V 3.0 3.5 3.0 3.5 V Sawtooth Valley Voltage +V IN = 8V 0.5 1.0 0.5 1.0 V Error Amplifier Section (Note 6) Input Offset Voltage R S ≤≤ 2kΩΩ 25 2 1 0 m V Input Bias Current -350 -1000 -350 -2000 nA Input Offset Current 35 100 35 200 nA DC Open Loop Gain R L ≥ 10MΩΩ 64 72 60 72 dB HIGH Output Voltage V PIN1-VPIN2 ≥≥ 150mV, ISOURCE = 100µµA 3.6 4.2 3.6 4.2 V LOW Output Voltage V PIN2-VPIN1 ≥≥ 150mV, ISINK = 100µµA 0.2 0.4 0.2 0.4 V Common Mode Rejection Rs ≤ 12kΩ 70 94 70 94 dB Supply Voltage Rejection +V IN = 12 to 18V 66 80 66 80 dB PWM Comparator (Note 5) Minimum Duty Cycle V COMPENSATION = +0.4V 0 0 % Maximum Duty Cycle V COMPENSATION = +3.6V 45 49 45 49 % Digital Ports (SYNC, SHUTDOWN, and RESET) HIGH Output Voltage I SOURCE =40µµA 2.4 4.0 2.4 4.0 V HIGH Input Current V IH = +2.4V -125 -200 -125 -200 µA LOW Input Current V IL = +0.4V -225 -360 -225 -360 µA Current LImit Comparator (Note 7) Sense Voltage R S ≤≤ 50ΩΩ 90 100 110 80 100 120 mV Input Bias Current -3 -10 -3 -10 µA Soft-Start Section Cs Charging Current RESET =+2.4V 50 100 150 50 100 150 µA Output Drivers (Each Output) (Note 8) HIGH Output Voltage I SOURCE = 20mA 12.5 13.5 12.5 13.5 V ISOURCE = 100mA 12 13 12 13 V LOW Output Voltage I SINK = 20mA 0.2 0.3 0.2 0.3 V ISINK = 100mA 1.2 2.0 1.2 2.0 V Collector Leakage V C = 40V 50 150 50 150 µA Rise Time C L = 1000pF 0.3 0.6 0.3 0.6 µs Fall Time C L = 1000pF 0.1 0.2 0.1 0.2 µs Power Consumption (Note 9) Standby Current SHUTDOWN = +0.4V 18 30 18 30 mA +VIN = 15V, and over operating ambient temperature, unless otherwise specified, TA = TJ. UC1526 UC2526 UC3526 Note 4: IL = 0mA. Note 5: FOSC = 40kHz (RT = 4.12kΩ ± 1%, CT = 0.1µF ± 1%, R D = 0Ω ) Note 6: VCM = 0 to +5.2V Note 8: VC = +15V Note 9: +VIN = +35V, RT = 4.12kΩ

UNITRODE INTEGRATED CIRCUITS 7 CONTINENTAL BL VD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 UC1526 UC2526 UC3526 TYPICAL CHARACTERISTICS Shutdown Delay Output Driver Saturation Voltage Output Driver Deadtime vs RD Value Under Voltage Lockout Characteristic Error Amplifier Open Loop Gain vs Frequency Current Limit Transfer Function

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 27-Sep-2005 Addendum-Page 2

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 85515012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type 8551501VA ACTIVE CDIP J 18 1 TBD A42 SNPB N / A for Pkg Type UC1526J ACTIVE CDIP J 18 1 TBD A42 SNPB N / A for Pkg Type UC1526J883B ACTIVE CDIP J 18 1 TBD A42 SNPB N / A for Pkg Type UC1526L ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type UC1526L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type UC2526AJ ACTIVE CDIP J 18 1 TBD A42 SNPB N / A for Pkg Type UC2526N ACTIVE PDIP N 18 20 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC2526NG4 ACTIVE PDIP N 18 20 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3526AJ ACTIVE CDIP J 18 1 TBD A42 SNPB N / A for Pkg Type UC3526DW ACTIVE SOIC DW 18 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3526DWG4 ACTIVE SOIC DW 18 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3526DWTR ACTIVE SOIC DW 18 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3526DWTRG4 ACTIVE SOIC DW 18 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR UC3526N ACTIVE PDIP N 18 20 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type UC3526NG4 ACTIVE PDIP N 18 20 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2007 Addendum-Page 1

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 9-Oct-2007 Addendum-Page 2

TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant UC3526DWTR DW 18 SITE 41 330 24 10.9 12.0 2.7 12 24 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2007 Pack Materials-Page 1

Device Package Pins Site Length (mm) Width (mm) Height (mm) UC3526DWTR DW 18 SITE 41 346.0 346.0 41.0 PACKAGE MATERIALS INFORMATION www.ti.com 5-Oct-2007 Pack Materials-Page 2

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