85506012A

SN54HCT245 TI | Alldatasheet

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SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS020E – MARCH 1984 – REVISED AUGUST 2003 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 Operating Voltage Range of 4.5 V to 5.5 V /C0068 High-Current 3-State Outputs Drive Bus Lines Directly or Up To 15 LSTTL Loads /C0068 Low Power Consumption, 80-µA Max ICC /C0068 Typical tpd = 14 ns /C0068 ±6-mA Output Drive at 5 V /C0068 Low Input Current of 1 µA Max /C0068 Inputs Are TTL-Voltage Compatible description/ordering information These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. The ’HCT245 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE ) input can be used to disable the device so that the buses are effectively isolated.

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING –40 C to 85C PDIP – N Tube of 20 SN74HCT245N SN74HCT245N –40 C to 85C SOIC – DW Tube of 25 SN74HCT245DW HCT245 –40 C to 85C SOIC – DW Reel of 2000 SN74HCT245DWR HCT245 –40°C to 85°C SOP – NS Reel of 2000 SN74HCT245NSR HCT245 –40°C to 85°C SSOP – DB Reel of 2000 SN74HCT245DBR HT245 TSSOP – PW Tube of 70 SN74HCT245PW HT245TSSOP – PW Reel of 2000 SN74HCT245PWR HT245 Reel of 250 SN74HCT245PWT –55 C to 125C CDIP – J Tube of 20 SNJ54HCT245J SNJ54HCT245J –55°C to 125°C CFP – W Tube of 85 SNJ54HCT245W SNJ54HCT245W LCCC – FK Tube of 55 SNJ54HCT245FK SNJ54HCT245FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 3 2 1 20 19 91 0 1 1 1 2 1 3 DIR B6 OE GND VCC SN54HCT245 . . . FK PACKAGE (TOP VIEW) DIR GND V CC OE SN54HCT245 ...J O R W PACKAGE SN74HCT245 . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) Copyright  2003, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS020E – MARCH 1984 – REVISED AUGUST 2003

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic) DIR OE To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.

SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS020E – MARCH 1984 – REVISED AUGUST 2003 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 3) SN54HCT245 SN74HCT245 UNIT MIN NOM MAX MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V VIH High-level input voltage VCC = 4.5 V to 5.5 V 2 2 V VIL Low-level input voltage VCC = 4.5 V to 5.5 V 0.8 0.8 V VI Input voltage 0 VCC 0 VCC V VO Output voltage 0 VCC 0 VCC V ∆t/∆v Input transition rise/fall time 500 500 ns TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C SN54HCT245 SN74HCT245 UNITPARAMETER TEST CONDITIONS VCC MIN TYP MAX MIN MAX MIN MAX UNIT VOH VI = VIH or VIL IOH = –20 µA 4.5 V 4.4 4.499 4.4 4.4 VVOH VI = VIH or VIL IOH = –6 mA 4.5 V 3.98 4.3 3.7 3.84 V VOL VI = VIH or VIL IOL = 20 µA 4.5 V 0.001 0.1 0.1 0.1 VVOL VI = VIH or VIL IOL = 6 mA 4.5 V 0.17 0.26 0.4 0.33 V II DIR or OE VI = VCC or 0 5.5 V ±0.1 ±100 ±1000 ±1000 nA IOZ A or B VO = VCC or 0 5.5 V ±0.01 ±0.5 ±10 ±5 µA ICC VI = VCC or 0, IO = 0 5.5 V 8 160 80 µA ∆ICC † One input at 0.5 V or 2.4 V, Other inputs at 0 or VCC 5.5 V 1.4 2.4 3 2.9 mA C i‡ DIR or OE 4.5 V to 5.5 V 3 10 10 10 pF † This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or VCC . ‡ Parameter Ci does not apply to transceiver I/O ports. switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM TO VCC TA = 25°C SN54HCT245 SN74HCT245 UNITPARAMETER FROM (INPUT) TO (OUTPUT) VCC MIN TYP MAX MIN MAX MIN MAX UNIT tpd A or B B or A

4.5 V 16 22 33 28

5.5 V 14 20 30 25

4.5 V 25 46 69 58

5.5 V 22 41 62 52

4.5 V 26 40 60 50

5.5 V 23 36 54 45

4.5 V 9 12 18 15

5.5 V 8 11 16 14

SN54HCT245, SN74HCT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS020E – MARCH 1984 – REVISED AUGUST 2003

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

switching characteristics over recommended operating free-air temperature range, CL = 150 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM TO VCC TA = 25°C SN54HCT245 SN74HCT245 UNITPARAMETER FROM (INPUT) TO (OUTPUT) VCC MIN TYP MAX MIN MAX MIN MAX UNIT tpd A or B B or A

4.5 V 20 30 45 38

5.5 V 18 27 41 34

4.5 V 36 59 89 74

5.5 V 30 53 80 67

4.5 V 17 42 63 53

5.5 V 14 38 57 48

operating characteristics, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT C pd Power dissipation capacitance per transceiver No load 40 pF

NOTES: A. C L includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-8550601VRA ACTIVE CDIP J 20 1 None Call TI Level-NC-NC-NC 5962-8550601VSA ACTIVE CFP W 20 1 None Call TI Level-NC-NC-NC 85506012A ACTIVE LCCC FK 20 1 None Call TI Level-NC-NC-NC 8550601RA ACTIVE CDIP J 20 1 None Call TI Level-NC-NC-NC JM38510/65553BRA ACTIVE CDIP J 20 1 None Call TI Level-NC-NC-NC JM38510/65553BSA ACTIVE CFP W 20 1 None Call TI Level-NC-NC-NC SN54HCT245J ACTIVE CDIP J 20 1 None Call TI Level-NC-NC-NC SN74HCT245DBLE OBSOLETE SSOP DB 20 None Call TI Call TI SN74HCT245DBR ACTIVE SSOP DB 20 2000 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM SN74HCT245DW ACTIVE SOIC DW 20 25 Pb-Free (RoHS) CU NIPDAU Level-2-250C-1 YEAR/ Level-1-235C-UNLIM SN74HCT245DWR ACTIVE SOIC DW 20 2000 Pb-Free (RoHS) CU NIPDAU Level-2-250C-1 YEAR/ Level-1-235C-UNLIM SN74HCT245N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SN74HCT245N3 OBSOLETE PDIP N 20 None Call TI Call TI SN74HCT245NSR ACTIVE SO NS 20 2000 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM SN74HCT245PW ACTIVE TSSOP PW 20 70 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74HCT245PWLE OBSOLETE TSSOP PW 20 None Call TI Call TI SN74HCT245PWR ACTIVE TSSOP PW 20 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74HCT245PWT ACTIVE TSSOP PW 20 250 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SNJ54HCT245FK ACTIVE LCCC FK 20 1 None Call TI Level-NC-NC-NC SNJ54HCT245J ACTIVE CDIP J 20 1 None Call TI Level-NC-NC-NC SNJ54HCT245W ACTIVE CFP W 20 1 None Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - May not be currently available - please checkhttp://www.ti.com/productcontentfor the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. PACKAGE OPTION ADDENDUM www.ti.com 28-Feb-2005 Addendum-Page 1

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 28-Feb-2005 Addendum-Page 2

MLCC006B – OCTOBER 1996 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/D 10/96

28 TERMINAL SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01

28 PINS SHOWN

8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,65 M0,10 0,10 0,25 0,50 0,75 0,15 NOM Gage Plane 9,80 9,60 7,90 7,70 2016 6,60 6,40 4040064/F 01/97 0,30 6,60 6,20 0,19 4,30 4,50 0,15 A 1,20 MAX 5,10 4,90 3,10 2,90 A MAX A MIN DIM PINS ** 0,05 4,90 5,10 Seating Plane 0°–8° NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

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