851010AYILF | DigiCamel IC Datasheet

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ICS851010I IDT | Alldatasheet

Document overview

Manufacturer or author: epieczon
PDF pages: 17

Technical content

Features

Ten differential HCSL outputs
Translates any differential input signal (LVPECL, LVHSTL, LVDS, HCSL) to HCSL levels without external bias networks
Maximum output frequency: 250MHz
Output skew: 165ps (maximum)
Output drift: 140ps (maximum)
VOH: 850mV (maximum)
Additive phase jitter, RMS: 0.19ps (typical)
Full 3.3V supply voltage
Available in lead-free (RoHS 6) package
-40°C to 85°C ambient operating temperature nQ0 nQ1 nQ2 nQ3 nQ4 nQ9 nQ8 nQ7 nQ6 nQ5 CLK nCLK IREF 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 nQ0 VDD nQ1 nQ2 VDD nQ7 VDD nQ6 nQ5 VDD GND IREF nQ3 VDD VDD nQ4 VDD nQ8 nCLK CLK GND nQ9 Pin AssignmentBlock Diagram ICS851010I 32-Lead TQFP, E-Pad 7mm x 7mm x1mm package body Y Package Top View

ICS851010AYI REVISION A AUGUST 2, 2010 2 ©2010 Integrated Device Technology, Inc. Table 1. Pin Descriptions with the current being set with a resistor from I REF to ground. Figure 1. HCSL Current Mirror and Output Drive 1, 2 Q0, nQ0 Output Differential output pair. Differential HCSL interface levels. 17, 22, 30 VDD Power Positive supply pins. 4, 5 Q1, nQ1 Output Differential output pair. Differential HCSL interface levels. 6, 7 Q2, nQ2 Output Differential output pair. Differential HCSL interface levels. 9, 25 GND Power Power supply ground. 10 IREF Input Reference current input. Used to set the output current. Connect to 950Ω resistor to ground. 11, 12 Q3, nQ3 Output Differential output pair. Differential HCSL interface levels. 15, 16 Q4, nQ4 Output Differential output pair. Differential HCSL interface levels. 18, 19 Q5, nQ5 Output Differential output pair. Differential HCSL interface levels. 20, 21 Q6, nQ6 Output Differential output pair. Differential HCSL interface levels. 23, 24 Q7, nQ7 Output Differential output pair. Differential HCSL interface levels. 26 CLK Input Non-inverting differential input. 27 nCLK Input Inverting differential clock input. 28, 29 Q8, nQ8 Output Differential output pair. Differential HCSL interface levels. 31, 32 Q98, nQ9 Output Differential output pair. Differential HCSL interface levels.

ICS851010I Data Sheet 1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER ICS851010AYI REVISION A AUGUST 2, 2010 3 ©2010 Integrated Device Technology, Inc. Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functio nal operation of product at these conditions or any conditions beyond those listed in the DC Cha racteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5V Outputs, IO -0.5V to VDD + 0.5V Package Thermal Impedance, θJA 32.2°C/W (0 mps) Storage Temperature, TSTG -65 ° C to 150 ° C Table 2A. Power Supply DC Characteristics, VDD = 3.3V±5%, TA = -40°C to 85°C NOTE 1: Measured using 200MHz input frequency. Table 2B. Differential DC Characteristics, VDD = 3.3V±5%, TA = -40°C to 85°C NOTE 1: VIL should not be less than -0.3V. NOTE 2: Common mode input voltage is defined as VIH. Item Rating Symbol Parameter Test Conditions Minimum Typical Maximum Units VDD Core Supply Voltage 3.135 3.3 3.465 V IDD Power Supply Current; NOTE 1 105 mA Symbol Parameter Test Conditions Minimum Typical Maximum Units IIH Input High Current CLK, nCLK VDD = VIN = 3.465V 5 µA IIL Input Low Current CLK, nCLK VDD = 3.465V, VIN = 0V 5 µA VPP Peak-to-Peak Voltage; NOTE 1 0.15 1.3 V VCMR Common Mode Input Voltage; NOTE 1, 2 GND + 0.5 VDD – 0.85 V

ICS851010AYI REVISION A AUGUST 2, 2010 4 ©2010 Integrated Device Technology, Inc. Table 3. HCSL AC Characteristics, VDD = 3.3V±5%, TA = -40°C to 85°C has been reached under these conditions. NOTE: Current adjust set for VOH = 0.7V. Measurements refer to PCIEX outputs only. NOTE: Characterized using an RREF value of 950Ω resistor. NOTE 1: Measured from the differential input cross point to the differential output crossing point. NOTE 3: This parameter is defined in accordance with JEDEC Standard 65. with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross point. a change in temperature and supply voltage. Measured at the differential cross point. NOTE 6: Measurement using RREF = to 950Ω, RLOAD = to 50Ω. NOTE 7: Measurement taken from single-ended waveform. NOTE 8: Measured at crossing point where the instantaneous voltage value of the rising edge of Qx equals the falling edge of nQx. See Parameter Measurement Information Section. points for this measurement. See Parameter Measurement Information Section. VCROSS for any particular system. See Parameter Measurement Information Section. NOTE 11: Measurement taken from differential waveform. through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero crossing. NOTE 13: Assuming 50% input duty cycle. Data taken at ƒ ≤ 200MHz, unless otherwise specified.

ICS851010I Data Sheet 1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER ICS851010AYI REVISION A AUGUST 2, 2010 5 ©2010 Integrated Device Technology, Inc. Parameter Measurement Information HCSL Output Load AC Test Circuit Differential Input Levels Part-to-Part Skew HCSL Output Load AC Test Circuit Output Skew Propagation Delay Measurement Point33Ω 50Ω 50Ω33Ω Measurement Point 49.9Ω 49.9Ω HCSL GND 2pF 2pF VDD VDD V CMR Cross Points VPP VDD GND nCLK CLK nQx Qx nQy Qy tsk(pp) Part 1 Part 2 950Ω 50Ω 50Ω HCSL GND SCOPE IREF This load condition is used for IDD,tsk(pp), tjit(Ø), tPD and tsk(o) measurements. 3.3V±5% VDD nQx Qx nQy Qy tsk(o) tPD nCLK CLK nQ[0:9] Q[0:9]

ICS851010I Data Sheet 1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER ICS851010AYI REVISION A AUGUST 2, 2010 6 ©2010 Integrated Device Technology, Inc. Parameter Measurement Information, continued Differential Measurement Points for Duty Cycle/Period Single-ended Measurement Points for Delta Cross Point Single-ended Measurement Points for Absolute Cross Point and Swing Differential Measurement Points for Rise/Fall Edge Rate Clock Period (Differential) Positive Duty Cycle (Differential) Negative Duty Cycle (Differential) Q - nQ 0.0V Q nQ ∆VCROSS nQ Q VCROSS_MAX VCROSS_MIN VMAX VMIN Q - nQ -150mV +150mV 0.0V Fall Edge RateRise Edge Rate

ICS851010AYI REVISION A AUGUST 2, 2010 9 ©2010 Integrated Device Technology, Inc. and the inner edges of pad pattern for the leads to avoid any shorts. Enhance Leadframe Base Package, Amkor Technology. Figure 4. Assembly for Exposed Pad Thermal Release Path - Side View (drawing not to scale)

ICS851010AYI REVISION A AUGUST 2, 2010 11 ©2010 Integrated Device Technology, Inc. This section provides information on power dissipation and junction temperature for the ICS851010I. Equations and example calculations are also provided. dissipation for VDD = 3.3V + 5% = 3.465V, which gives worst case results. wire and bond pad temperature remains below 125°C. a multi-layer board, the appropriate value is 32.2°C/W per Table 4 below. Table 4. Thermal Resistance θJA for 32 Lead TQFP, E-Pad, Forced Convection

ICS851010AYI REVISION A AUGUST 2, 2010 12 ©2010 Integrated Device Technology, Inc. The purpose of this section is to calculate power dissipation on the IC per HCSL output pair. HCSL output driver circuit and termination are shown in Figure 6. Figure 6. HCSL Driver Circuit and Termination use the following equations which assume a 50Ω load to ground. The highest power dissipation occurs when VDD_MAX.

0.20 TAB

Ordering Information

Table 7. Ordering Information devices or critical medical instruments.

ICS851010I Data Sheet 1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER ICS851010AYI REVISION A AUGUST 2, 2010 16 ©2010 Integrated Device Technology, Inc. Revision History Sheet Rev Table Page Description of Change Date A Corrected Output Driver Current. Updated Wiring the Differential Input to Accept Single-ended Levels. Updated Package Outline. Converted datasheet format. 7/21/10 A 5 Parameter Measurement Information - corrected label names on output skew and part-to-part skew. 8/2/10

ICS851010I Data Sheet 1-to-10 DIFFERENTIAL HCSL FANOUT BUFFER DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsid iaries reserve the right to modify the products and/or specif ications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features a nd performance, is subject to change wit hout notice. Performance specifications and the operating parameters of the de scribed products are determined in the independent state and are not guaranteed to perform the same way when in stalled in customer products. The informati on contained herein is provided without re presentation or warranty of any kind, whether express or implied, in cluding, but not limited to, the suitability of IDT’s products for any particular purpose, an im plied warranty of merchantability, or non-infringement of the in tellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. Copyright 2010. All rights reserved.

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Product Information

851010AYILF specifications and overview.

Summary

1-to-10, Differential HCSL Fanout Buffer

Description

1-to-10, Differential HCSL Fanout Buffer

Source title 851010AYILF Datasheet(PDF) - Integrated Device Technology

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