8442BYLFT

ICS8442B IDT | Alldatasheet

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ICS8442BY REVISION A NOVEMBER 18, 2013 1 ©2013 Integrated Device Technology, Inc. 700MHZ, CRYSTAL OSCILLATOR-TO- DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER GENERAL DESCRIPTION The ICS8442B is a general purpose, dual output Crystal-to- Differential LVDS High Frequency Synthesizer . The ICS8442B has a selectable TEST_CLK or crystal input. The TEST_CLK input accepts LVCMOS or LVTTL input levels and translates them to LVDS levels. The VCO operates at a frequency range of 250MHz to 700MHz.The VCO frequency is programmed in steps equal to the value of the input reference or crystal fre- quency. The VCO and output frequency can be programmed using the serial or parallel interface to the configuration logic. The low phase noise characteristics of the ICS8442B makes it an ideal clock source for Gigabit Ethernet and Sonet appli- cations. BLOCK DIAGRAM PIN ASSIGNMENT

FEATURES

• Dual differential LVDS outputs
• Selectable crystal oscillator interface or LVCMOS/LVTTL TEST_CLK
• Output frequency range: 31.25MHz to 700MHz
• Crystal input frequency range: 10MHz to 25MHz
• VCO range: 250MHz to 700MHz
• Parallel or serial interface for programming counter and output dividers
• RMS period jitter: 2.7ps (typical)
• Cycle-to-cycle jitter: 18ps (typical)
• 3.3V supply voltage
• 0°C to 85°C ambient operating temperature
• Lead-Free package fully RoHS compliant ICS 8442B 32-Lead LQFP 7mm x 7mm x 1.4mm package body Y Package Top View OSC VCO_SEL XT AL_SEL TEST_CLK XTAL_IN XTAL_OUT S_LOAD S_DATA S_CLOCK nP_LOAD M0:M8 N0:N1 VCO PLL FOUT0 nFOUT0 FOUT1 nFOUT1 TEST CONFIGURATION INTERFACE LOGIC ÷ M PHASE DETECTOR ÷ 1 ÷ 2 ÷ 4 ÷ 8 MR 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 XTAL_OUT TEST_CLK XTAL_SEL V DDA S_LOAD S_DA TA S_CLOCK MR nc GND GND nFOUT0 FOUT0 V DD nFOUT1 FOUT1 V DD TEST XT AL_IN nP_LOAD VCO_SEL ICS8442

ICS8442BY REVISION A NOVEMBER 18, 2013 3 ©2013 Integrated Device Technology, Inc. TABLE 1. PIN DESCRIPTIONS

15 Mt u p nIp u l l u P

4 M , 3 M , 2 M

TABLE 2. P IN CHARACTERISTICS

ICS8442BY REVISION A NOVEMBER 18, 2013 4 ©2013 Integrated Device Technology, Inc. ICS8442B Data Sheet 700MHz, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER TABLE 3A. PARALLEL AND SERIAL MODE FUNCTION TABLE TABLE 3B. P ROGRAMMABLE VCO F REQUENCY FUNCTION TABLE TABLE 3C. P ROGRAMMABLE OUTPUT DIVIDER FUNCTION TABLE s t u p n I e u l a V r e d i v i D N ) z H M ( y c n e u q e r F t u p t u O 1N0 Nm u m i n iMm u m i x a M 00 1 0 520 0 7 01 2 5 210 5 3 10 4 5 . 265 7 1 11 8 5 2 . 135 . 7 8 y c n e u q e r F O C V ) z H M ( e d i v i DM 6 528 214 62 36 18 4 2 1 8M7 M6 M5 M4 M3 M2 M1 M0 M 0 520 1 00000 10 10 5 721 1 000001011 0 566 2 0000 110 10 5 767 2 000011011 0 078 2 000011100 y c n e u q e r f t u p n i K L C _ T S E T r o l a t s y r c o t d n o p se r r o c s e i c n e u q e r f g n i t l u s e r e h t d n a s e u l a v e d i v i d M e s e h T : 1E T O N . z H M 5 2 f o s t u p n I s n o i t i d n o C RMD A O L _ PnM N D A O L _SK C O L C _SA T A D _ S HX X XX X X l a i t n e r e f f i d a o t s t u p t u o e h t s e c r o f , H G I H n e h W . t e s e R t u b , ) H G I H = x T U OF n d n a W O L = x T U O F ( e t a t s W O L . s e u l a v T d n a , N , M d e d a o l t c e f f e t o n s e o d LL a t aDa t aDX X X M e h t o t y l t c e r i d d e s s a p s t u p n i N d n a M n o a t a D . W O L d e c r o f t u p t u o T S E T . r e d i v i d t u p t u o N d n a r e d i v i d L ↑ a t aDa t aDL X X d e d a o l s n i a m e r d n a s r e t s i g e r t u p n i o t n i d e h c t a l s i a t a D . s r u c c o t n e v e l a i r e s a l i t n u r o n o i t i s n a r t W O L t x e n l i t n u LHX XL ↑ a t a D n o a t a d h t i w d e d a o l s i r e t s i g e r t f i h S . e d o m t u p n i l a i r e S . K C O L C _ S f o e g d e g n i s i r h c a e n o A T A D _ S LHX X ↑ La t a D e h t o t d e s s a p e r a r e t s i g e r t f i h s e h t f o s t n e t n o C . r e d i v i d t u p t u o N d n a r e d i vi d M LHX X ↓ La t aD. d e h c t a l e r a s e u l a v r e d i v i d t u p t u o N d n a r e d i v i d M LHX XL X X .s r e t s i g e r t f i h s t c e f f a t o n o d t u p n i l a i r e s r o l e l l a r a P LHX XH ↑ a t aD. d e k c o l c s i t i s a r e d i v i d M o t y l t c e r i d d e s s a p A T A D _ S W O L = L : E T O N H G I H = H e r a c t ' n o D = X ↑ n o i t i s n a r t e g d e g n i s i R = ↓ n o i t i s n a r t e g d e g n i l l a F =

ICS8442BY REVISION A NOVEMBER 18, 2013 5 ©2013 Integrated Device Technology, Inc. ICS8442B Data Sheet 700MHz, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, TA = 0°C TO 85°C TABLE 4B. LVCMOS / LVTTL DC CHARACTERISTICS, VDD = 3.3V±5%, TA = 0°C TO 85°C l o b m ySr e t e m a r aPs n o i t i d n o C t s eTm u m i n iMl a c i p yTm u m i x aMs t i n U V D D e g a t l o V y l p p u S e r o C 5 3 1 .33 .35 6 4 .3V V A D D e g a t l o V y l p p u S g o l a n A 5 3 1 .33 .35 6 4 .3V I D D t n e r r u C y l p p u S r e w o P 2 81A m I A D D t n e r r u C y l p p u S g o l a n A 61A m l o b m ySr e t e m a r aPs n o i t i d n o C t s eTm u m i n iMl a c i p yTm u m i x aMs t i n U V H I t u p n I e g a t l o V h g i H , D A O L _ P n , R M , 1 N , 0 N , 8 M - 0 M , D A O L _ S , A T A D _ S , K C O L C _ S L E S _ O C V , L E S _ L A T X 2V D D 3 . 0+V K L C _ T S ET2 V D D 3 . 0+V V L I t u p n I e g a t l o V w o L , D A O L _ P n , R M , 1 N , 0 N , 8 M - 0 M , D A O L _ S , A T A D _ S , K C O L C _ S L E S _ O C V , L E S _ L A T X 3 . 0-8 .0V K L C _ T S ET3 . 0-3 .1V I H I t u p n I t n e r r u C h g i H , R M , 1 N , 0 N , 8 M - 6 M , 4 M - 0 M , A T A D _ S , K C O L C _ S , D A O L _ P n , D A O L _ S V D D V =N I V 5 6 4 . 3=0 51A µ L E S _ O C V , L E S _ L A T X , 5MV D D V =N I V 5 6 4 . 3=5 I L I t u p n I t n e r r u C w o L , R M , 1 N , 0 N , 8 M - 6 M , 4 M - 0 M , A T A D _ S , K C O L C _ S , D A O L _ P n , D A O L _ S V D D , V 5 6 4 . 3 = V N I V 0 = 5-A µ L E S _ O C V , L E S _ L A T X , 5 MV D D , V 5 6 4 . 3 = V N I V 0 = 0 5 1 - V H O t u p t u O e g a t l o V h g i H1 E T O N ; T S ET6 .2V V L O t u p t u O e g a t l o V w o L 1 E T O N ; T S E T 5 .0V 0 5 h t i w d e t a n i m r e t s t u p t u O : 1 E T O NΩ V o tD D , n o i t c e s n o i t a m r o f n I t n e m e r u s a e M r e t e m a r a P e e S . 2 / . " t i u c r i C t s e T d a o L t u p t u O V 3 . 3 " ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5V Outputs, IO Continuous Current 10mA Surge Current 15mA Package Thermal Impedance, θJA 47.9°C/W (0 lfpm) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions be- yond those listed in the DC Characteristics or AC Character- istics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 4C. LVDS DC CHARACTERISTICS, VDD = 3.3V±5%, TA = 0°C TO 85°C l o b m ySr e t e m a r aPs n o i t i d n o C t s eTm u m i n iMl a c i p yTm u m i x aMs t i n U V D O e g a t l o V t u p t u O l a i t n e r e f f i D 0 520 540 06V m Δ V D O V D O e g n a h C e d u t i n g a M 05V m V S O e g a t l o V t e s f f O 5 2 1 .14 .16 .1V Δ V S O V S O e g n a h C e d u t i n g a M 05V m

ICS8442BY REVISION A NOVEMBER 18, 2013 6 ©2013 Integrated Device Technology, Inc. TABLE 5. INPUT FREQUENCY CHARACTERISTICS, VDD = 3.3V±5%, TA = 0°C TO 85°C TABLE 6. C RYSTAL C HARACTERISTICS TABLE 7. AC CHARACTERISTICS, VDD = 3.3V±5%, TA = 0°C TO 85°C

1 E T O N ; K L C _ T S ET0 15 2z H M

1 E T O N 015 2z H M

ICS8442BY REVISION A NOVEMBER 18, 2013 7 ©2013 Integrated Device Technology, Inc. ICS8442B Data Sheet 700MHz, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER PARAMETER MEASUREMENT INFORMATION OUTPUT SKEW OUTPUT D UTY C YCLE/PULSE WIDTH/PERIOD Cycle-to-Cycle Jitter Period Jitter VOH VREF VOL Mean Period (First edge after trigger) Reference Point (Trigger Edge) 1σ contains 68.26% of all measurements 2σ contains 95.4% of all measurements 3σ contains 99.73% of all measurements 4σ contains 99.99366% of all measurements 6σ contains (100-1.973x10-7)% of all measurements Histogram OUTPUT RISE/FALL TIME tPW tPERIOD tPW tPERIOD odc = x 100% nFOUT0, nFOUT1 FOUT0, FOUT1 ➤➤ ➤➤tcycle n tcycle n+1 tjit(cc) = tcycle n – tcycle n+1

1000 Cycles

nFOUT0, nFOUT1 FOUT0, FOUT1 t sk(o) nFOUTx FOUTx nFOUTy FOUTy OFFSET VOLTAGE SETUP DIFFERENTIAL OUTPUT VOLTAGE SETUP 3.3V OUTPUT LOAD TEST CIRCUIT out out LVDSDC Input ➤ VOS/Δ VOS VDD 100 out out LVDSDC Input VOD/Δ VOD VDD SCOPE Qx nQx LVDS Power Supply + - Float GND VDD 20% 80% 80% 20% tR tF VOD nFOUT0, nFOUT1 FOUT0, FOUT1

ICS8442BY REVISION A NOVEMBER 18, 2013 11 ©2013 Integrated Device Technology, Inc. ICS8442B Data Sheet 700MHz, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER The following component footprints are used in this layout example: All the resistors and capacitors are size 0603. POWER AND G ROUNDING Place the decoupling capacitors C14 and C15 as close as pos- sible to the power pins. If space allows, placing the decoupling capacitor at the component side is preferred. This can reduce unwanted inductance between the decoupling capacitor and the power pin generated by the via. Maximize the pad size of the power (ground) at the decoupling capacitor. Maximize the number of vias between power (ground) and the pads. This can reduce the inductance between the power (ground) plane and the component power (ground) pins. If VDDA shares the same power supply with V DD, insert the RC filter R7, C11, and C16 in between. Place this RC filter as close to the VDDA as possible. CLOCK TRACES AND TERMINATION The component placements, locations and orientations should be arranged to achieve the best clock signal quality. Poor clock signal quality can degrade the system performance or cause system failure. In the synchronous high-speed digital system, the clock signal is less tolerable to poor signal quality than other signals. Any ringing on the rising or falling edge or excessive ring back can cause system failure. The trace shape and the trace delay might be restricted by the available space on the board and the component location. While routing the traces, the clock signal traces should be routed first and should be locked prior to routing other signal traces.  The traces with 50 Ω transmission lines TL1 and TL2 at FOUT and nFOUT should have equal delay and run ad- jacent to each other. Avoid sharp angles on the clock trace. Sharp angle turns cause the characteristic impedance to change on the transmission lines.  Keep the clock trace on same layer. Whenever possible, avoid any vias on the clock traces. Any via on the trace can affect the trace characteristic impedance and hence degrade signal quality.  To prevent cross talk, avoid routing other signal traces in parallel with the clock traces. If running parallel traces is unavoidable, allow more space between the clock trace and the other signal trace.  Make sure no other signal trace is routed between the clock trace pair. The matching termination resistors R1 and R2 should be located as close to the receiver input pins as possible. Other termination scheme can also be used but is not shown in this example. CRYSTAL The crystal X1 should be located as close as possible to the pins 24 (XTAL_OUT) and 25 (XT AL_IN). The trace length between the X1 and U1 should be kept to a minimum to avoid unwanted para- sitic inductance and capacitance. Other signal traces should not be routed near the crystal traces. FIGURE 6B. PCB B OARD LAYOUT FOR ICS8442 VDD TL1 C15 C14 R1 Same requirement fo FOUT1/nFOUT1 VDDA Close to the input pins of the receiver For FOUT0/n FOUT0 output TL1, TL1N are

50 Ohm traces and

ICS8442BY REVISION A NOVEMBER 18, 2013 12 ©2013 Integrated Device Technology, Inc. TABLE 10. θJAVS. AIR FLOW TABLE FOR 32 LEAD LQFP NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.

ICS8442BY REVISION A NOVEMBER 18, 2013 13 ©2013 Integrated Device Technology, Inc. TABLE 11. P ACKAGE DIMENSIONS

ICS8442BY REVISION A NOVEMBER 18, 2013 14 ©2013 Integrated Device Technology, Inc. TABLE 12. O RDERING INFORMATION

ICS8442BY REVISION A NOVEMBER 18, 2013 15 ©2013 Integrated Device Technology, Inc. ICS8442B Data Sheet 700MHz, CRYSTAL OSCILLATOR-TO-DIFFERENTIAL LVDS FREQUENCY SYNTHESIZER T E E H S Y R O T S I H N O I S I V E R v eRe l b aTe g aPe g n a h C f o n o i t p i r c s e D e t a D A A 4 T 2 1 T 4 1 4 1 0 2 / 1 3 / 1 e t a d e v i t c e f f E 1 0 - 8 0 3 1 N : N C P r e P . t e e h s a t a d e h t t u o h g u o r h t B 2 4 4 8 S C I o t 2 4 4 8 S C I m o r f r e b m u n tr a p d e g n a h C I d e g n a h c - e l b a T s c i t s i r e t c a r a h C C D y l p p u S r e w o PD D d e g n a h c d n a ; x a m A m 2 8 1 o t . x a m A m 5 5 1 m o r f c e p s I A D D . x a m A m 6 1 o t . x a m A m 0 2 m o r f c e p s d e t e l e D . " B " o t " A " m o r f n o i s i v e r g n i k r a m d n a n o i t a m r o f n i g ni r e d r o d e g n a h c - e l b a T n o i t a m r o f n I g n i r e d r O . n o i t a m r o f n i t r a p d e d a e l 3 1 / 8 1 / 1 1

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