843031 RENESAS | Alldatasheet
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- Manufacturer or author: rdvorak
- PDF pages: 15
Technical content
FemtoClock® Crystal-to-3.3V LVPECL Clock Generator ICS843031 DATA SHEET
843031 REVISION A 11/5/15 1
The 843031 is a 1 Gigabit Ethernet Clock Generator. The 843031 can synthesize 1 Gigabit Ethernet, SONET, or Serial ATA reference clock frequencies with the appropriate choice of crystal and output divider. The 843031 has excellent phase jitter performance and is packaged in a small 8-pin TSSOP , making it ideal for use in systems with limited board space.
FEATURES
- One differential 3.3V LVPECL output
- Crystal oscillator interface designed for 18pF parallel resonant crystals
- Output frequency range: 290MHz - 350MHz
- VCO frequency range: 580MHz - 700MHz
- RMS phase jitter @312.5MHz (1.875MHz - 20MHz): 0.475ps (typical) RMS phase jitter @318.75MHz (1.875MHz - 20MHz): 0.475ps (typical)
- 3.3V operating supply
- 0°C to 70°C ambient operating temperature
- Available in lead-free (RoHS 6) package
- F or functional replacement part use 843031i-01 843031 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View VCC XTAL_OUT XTAL_IN VEE nQ0 V CC PWR_DN OSC Phase Detector VCO ÷24 (fixed) XTAL_IN XTAL-OUT nQ0 BLOCK DIAGRAM PIN ASSIGNMENT FREQUENCY TABLE PWR_DN Inputs M/N Ratio (Multiplier) Output Frequency (MHz)Crystal Frequency (MHz) 25.92 12 311.04 26.04166 12 312.5 26.5625 12 318.75
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TABLE 2. PIN CHARACTERISTICS TABLE 1. PIN DESCRIPTIONS 1, 6 V CC Power Core supply pin. 4V EE Power Negative supply pin. 5 PWR_DN Input Pullup Output state control input. High impedance when LOW (oscillator stops). LVCMOS/LVTTL interface levels. 7, 8 nQ0, Q0 Output Differential clock outputs. LVPECL interface levels. NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characterristics, for typical values.
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843031 Data Sheet FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VCC Core Supply Voltage 3.135 3.3 3.465 V IEE Power Supply Current PWR_DN = 1 105 mA PWR_DN = 0 <1 mA TABLE 3C. LVPECL DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VOH Output High Voltage; NOTE 1 VCC - 1.4 VCC - 0.9 V VOL Output Low Voltage; NOTE 1 VCC - 2.0 VCC - 1.7 V VSWING Peak-to-Peak Output Voltage Swing 0.6 1.0 V NOTE 1: Outputs terminated with 50Ω to VCC - 2V. ABSOLUTE MAXIMUM RATINGS Supply Voltage, V CC 4.6V Inputs, V I -0.5V to VCC + 0.5V Outputs, I O Continuous Current 50mA Surge Current 100mA Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifi cations only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Charac- teristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum Units VIH Input High Voltage 2 VCC + 0.3 V VIL Input Low Voltage -0.3 0.8 V IIH Input High Current PWR_DN VCC = VIN = 3.465V 5 µA IIL Input Low Current PWR_DN V CC = 3.465V, VIN = 0V -150 µA
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TABLE 4. CRYSTAL CHARACTERISTICS TABLE 5. AC CHARACTERISTICS, VCC = 3.3V±5%, TA=0°C TO 70°C NOTE 1: Please refer to the Phase Noise Plot.
843031 REVISION A 11/5/15 5
843031 Data Sheet FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR TYPICAL PHASE NOISE AT 312.5MHZ -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 312.5MHz RMS Phase Jitter (Random) 1.875Mhz to 20MHz = 0.475ps (typical) OFFSET FREQUENCY (HZ) NOISE POWER dBc Hz 318.75MHz RMS Phase Jitter (Random) 1.875Mhz to 20MHz = 0.475ps (typical) OFFSET FREQUENCY (HZ) NOISE POWER dBc Hz -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 TYPICAL PHASE NOISE AT 318.75MHZ Phase Noise Result by adding 1 Gigabit Ethernet Filter to raw data Raw Phase Noise Data
1 Gigabit Ethernet Filter
Phase Noise Result by adding 1 Gigabit Ethernet Filter to raw data Raw Phase Noise Data 100 1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M
843031 REVISION A 11/5/15 6
843031 Data Sheet FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD OUTPUT RISE/FALL TIME 3.3V OUTPUT LOAD AC TEST CIRCUIT RMS PHASE JITTER
843031 REVISION A 11/5/15 7
843031 Data Sheet FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
Figure 1. CRYSTAL INPUt INTERFACE for different board layouts. recommended only as guidelines. circuit and clock component process variations.
843031 REVISION A 11/5/15 8
This section provides information on power dissipation and junction temperature for the ICS843051. Equations and example calculations are also provided. The total power dissipation for the ICS843051 is the sum of the core power plus the power dissipated in the load(s). CC = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
- Power (core)MAX = VCC_MAX * IEE_TYP = 3.465V * 105mA = 363.83mW
- Power (outputs)MAX = 30mW/Loaded Output pair Total Power_MAX (3.465V, with all outputs switching) = 363.8mW + 30mW = 393.8mW 2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for the devices is 125°C. The equation for Tj is as follows: Tj = θ JA * Pd_total + TA Tj = J unction Temperature θJA = Junction-to-Ambient Thermal Resistance Pd_total = Total Device Power Dissipation (example calculation is in section 1 above) TA = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming a moderate air fl ow of 1 meter per second and a multi-layer board, the appropriate value is 90.5°C/W per Table 6 below. Therefore, Tj for an ambient temperature of 70°C with all outputs switching is: This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air fl ow, and the type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θJA FOR 8-PIN TSSOP, FORCED CONVECTION
843031 REVISION A 11/5/15 9
- Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load. LVPECL output driver circuit and termination are shown in Figure 4. Pd_H is power dissipation when the output drives high. Pd_L is the power dissipation when the output drives low. FIGURE 3. LVPECL DRIVER CIRCUIT AND TERMINATION
843031 REVISION A 11/5/15 10
TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP
843031 REVISION A 11/5/15 11
TABLE 8. PACKAGE DIMENSIONS
843031 REVISION A 11/5/15 12
TABLE 9. ORDERING INFORMATION NOTE: Parts that are ordered with an “LF” suffi x to the part number are the Pb-Free confi guration and are RoHS compliant.
843031 REVISION A 11/5/15 13
843031 Data Sheet FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR REVISION HISTORY SHEET Rev Table Page Description of Change Date A T9 Features Section - deleted duplicate phase jitter bullet. Ordering Information Table - deleted ICS prefi x from part order number. Added LF marking. Updated header/footer with IDT logo. 10/5/2011 Updated contact information. 10/14/15 A 1 Product Discontinuation Notice - Last time buy expires November 2, 2016.
ICS843031 Data Sheet FEMTOCLOCK® CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, California 95138 Sales 800-345-7015 or +408-284-8200 Fax: 408-284-2775 www.IDT.com Technical Support email: clocks@idt.com DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifi cations described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifi cations and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, wheth- er express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reason- ably expected to signifi cantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. Copyright 2015. All rights reserved.
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