TIBPAL20L8-15C_15 TI1 | Alldatasheet

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TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Copyright © 2010, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

  • High-Performance: fmax (w/o feedback) TIBPAL20R’ -15C Series . . . 45 MHz TIBPAL20R’ -20M Series . . . 41.6 MHz
  • High-Performance . . . 45 MHz Min
  • Reduced ICC of 180 mA Max
  • Functionally Equivalent, but Faster Than PAL20L8, PAL20R4, PAL20R6, PAL20R8
  • Power-Up Clear on Registered Devices (All Register Outputs are Set Low, but Voltage Levels at the Output Pins Go High)
  • Preload Capability on Output Registers Simplifies Testing
  • Package Options Include Both Plastic and Ceramic Chip Carriers in Addition to Plastic and Ceramic DIPs DEVICE I INPUTS 3-STATE O OUTPUTS REGISTERED Q OUTPUTS I/O PORT S PAL20L8 14 2 0 6 PAL20R4 12 0 4 (3-state buffers) 4 PAL20R6 12 0 6 (3-state buffers) 2 PAL20R8 12 0 8 (3-state buffers) 0

description

These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACT™ circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically results in a more compact circuit board. In addition, chip carriers are available for futher reduction in board space. Extra circuitry has been provided to allow loading of each register asynchronously to either a high or low state. This feature simplifies testing because the registers can be set to an initial state prior to executing the test sequence. The TIBPAL20’ C series is characterized from 0 °C to 75 °C. The TIBPAL20’ M series is characterized for operation over the full military temperature range of −55°C to 125°C. IMPACT is a trademark of Texas Instruments Incorporated. PAL is a registered trademark of Advanced Micro Devices Inc. I I I I I I I I I I I GND V CC I O I/O I/O I/O I/O I/O I/O O I I TIBPAL20L8’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE (TOP VIEW) 3212 8 2 7 12 13 I/O I/O I/O NC I/O I/O I/O I I I NC I I I 42 6 14 15 16 17 18 I I GND NC I I O I I I NC I O TIBPAL20L8’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE (TOP VIEW) NC − No internal connection Pin assignments in operating mode VCC

TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CLK I I I I I I I I I I GND I I/O I/O Q Q Q Q I/O I/O I V CC OE TIBPAL20R4’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE (TOP VIEW) I I GND NC I I/O I I CLK NC I I/O (TOP VIEW) VCC 11 19 12 13 14 15 16 17 18

5 I/O

I I I NC I I I Q Q NC Q Q I/O TIBPAL20R4’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE NC − No internal connection OE CLK I I I I I I I I I I GND I I/O Q Q Q Q Q Q I/O I 13 OE I I GND NC I I/O I I CLK NC I I/O VCC 11 19 12 13 14 15 16 17 18 3 2 1 2 82 72 6 I I I NC I I I Q Q NC Q Q Q OE VCC (TOP VIEW) TIBPAL20R6’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE (TOP VIEW) TIBPAL20R6’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE CLK I I I I I I I I I I GND I Q Q Q Q Q Q Q Q I 13 OE I I GND NC I Q I I CLK NC I Q VCC 11 19 12 13 14 15 16 17 18 3 2 1 2 82 72 6 I I I NC I I I Q Q NC Q Q Q OE VCC (TOP VIEW) TIBPAL20R8’ C SUFFIX . . . JT OR NT PACKAGE M SUFFIX . . . JT OR W PACKAGE (TOP VIEW) TIBPAL20R8’ C SUFFIX . . . FN PACKAGE M SUFFIX . . . FK PACKAGE Pin assignments in operating mode

TIBPAL20L8-15C, TIBPAL20R4-15C TIBPAL20L8-20M, TIBPAL20R4-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagrams (positive logic) O O I/O I/O I/O I/O I/O I/O I EN ≥1&

40 X 64

Q I/O I/O I/O I/O I EN 12 20 204 20 x Q Q Q I = 0 2 CLK C1 EN 2OE TIBPAL20L8’ TIBPAL20R4’

TIBPAL20R6-15C, TIBPAL20R8-15C TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagrams (positive logic) denotes fused inputs TIBPAL20R6’ TIBPAL20R8’ Q I/O I/O I EN 12 20 202 20 x Q Q Q I = 0 2 CLK C1 EN 2OE 8 Q 8 Q Q I 12 20 208 20 x Q Q Q I = 0 2 CLK C1 EN 2 8 Q 8 Q

Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. 120 160 200 240 280 320 360 400 440 480 520 560 600 640 680 720 760 800 840 880 920 960 1000 1040 1080 1120 1160 1200 1240 1280 1320 1360 1400 1440 1480 1520 1560 1600 1640 1680 1720 1760 1800 1840 1880 1920 1960 2000 2040 2080 2120 2160 2200 2240 2280 2320 2360 2400 2440 2480 2520 First Fuse Numbers 36 390 I 2 I23 I 11 I13 TIBPAL20L8-15C TIBPAL20L8-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic)

Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. 4 8 12 16 20 24 28 32 I 3 I 4 I 5 I 6 I 7 I 8 I 9 I 10 I/O22 I/O21 I/O16 I/O15 Increment 120 160 200 240 280 320 360 400 440 480 520 560 600 640 680 720 760 800 840 880 920 960 1000 1040 1080 1120 1160 1200 1240 1280 1320 1360 1400 1440 1480 1520 1560 1600 1640 1680 1720 1760 1800 1840 1880 1920 1960 2000 2040 2080 2120 2160 2200 2240 2280 2320 2360 2400 2440 2480 2520 First Fuse Numbers 36 390 I 2 I23 I 11 I14 Q20 Q19 Q18 Q17 I = 0 I = 0 I = 0 I = 0 OE CLK 1 TIBPAL20R4-15C TIBPAL20R4-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic)

Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. 4 8 12 16 20 24 28 32 I 3 I 4 I 5 I 6 I 7 I 8 I 9 I 10 I/O22 I/O15 Increment 120 160 200 240 280 320 360 400 440 480 520 560 600 640 680 720 760 800 840 880 920 960 1000 1040 1080 1120 1160 1200 1240 1280 1320 1360 1400 1440 1480 1520 1560 1600 1640 1680 1720 1760 1800 1840 1880 1920 1960 2000 2040 2080 2120 2160 2200 2240 2280 2320 2360 2400 2440 2480 2520 First Fuse Numbers 36 390 I 2 I23 I 11 I14 Q20 Q19 Q18 Q17 I = 0 I = 0 I = 0 I = 0 OE CLK 1 Q21 I = 0 Q16 I = 0 TIBPAL20R6-15C TIBPAL20R6-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic)

Fuse number = First fuse number + Increment Pin numbers shown are for JT, NT, and W packages. 4 8 12 16 20 24 28 32 I 3 I 4 I 5 I 6 I 7 I 8 I 9 I 10 Increment 120 160 200 240 280 320 360 400 440 480 520 560 600 640 680 720 760 800 840 880 920 960 1000 1040 1080 1120 1160 1200 1240 1280 1320 1360 1400 1440 1480 1520 1560 1600 1640 1680 1720 1760 1800 1840 1880 1920 1960 2000 2040 2080 2120 2160 2200 2240 2280 2320 2360 2400 2440 2480 2520 First Fuse Numbers 36 390 I 2 I23 I 11 I14 Q20 Q19 Q18 Q17 I = 0 I = 0 I = 0 I = 0 OE CLK 1 Q21 I = 0 Q16 I = 0 Q22 I = 0 Q15 I = 0 TIBPAL20R8-15C TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic diagram (positive logic)

TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) NOTE 1: These ratings apply except for programming pins during a programming cycle. recommended operating conditions MIN NOM MAX UNIT VCC Supply voltage 4.75 5 5.25 V VIH High-level input voltage 2 5.5 V VIL Low-level input voltage 0.8 V IOH High-level output current −3.2 mA IOL Low-level output current 24 mA fclock† Clock frequency 0 45 MHz High 10 Low 12 tsu† Setup time, input or feedback before clock↑ 15 ns th† Hold time, input or feedback after clock↑ 0 ns TA Operating free-air temperature 0 25 75 °C † fclock, tw, tsu, and th do not apply for TIBPAL20L8’. nsPulse duration, clock tw†

VO = 0.4 VIOZL VCC = 5.25 V, μA VO = 2.7 VIOZH VCC = 5.25 V, μA fmax¶ MHz TIBPAL20L8-15C, TIBPAL20R4-15C, TIBPAL20R6-15C, TIBPAL20R8-15C HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK VCC = 4.75 V, II = −18 mA −0.8 −1.5 V VOH VCC = 4.75 V, IOH = −3.2 mA 2.4 V VOL VCC = 4.75 V, IOL = 24 mA 0.3 0.5 V O, Q outputs 20 I/O ports 100 O, Q outputs −20 I/O ports −250 II VCC = 5.25 V, VI = 5.5 V 0.1 mA IIH‡ VCC = 5.25 V, VI = 2.7 V 25 μA IIL‡ VCC = 5.25 V, VI = 0.4 V −0.25 mA IOS§ VCC = 5.25 V, VO = 0.5 V −30 −70 −130 mA ICC VCC = 5.25 V, Outputs open, VI = 0, OE at VIH 120 180 mA switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITION MIN TYP† MAX UNIT With feedback 37 40 Without feedback 45 50 tpd I, I/O O, I/O R1 = 200 Ω, 12 15 ns tpd CLK↑ Q R2 = 390 Ω, 8 12 ns ten OE Q See Figure 3 10 15 ns tdis OE↑ Q 8 12 ns ten I, I/O O, I/O 12 18 ns tdis I, I/O O, I/O 12 15 ns † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second. fmax(with feedback) /C0043 1 tsu /C0041tpd (CLK to Q) fmax(without feedback) /C00431 tw high /C0041tw low fmax does not apply for TIBPAL20L8,.

TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) NOTE 1: These ratings apply except for programming pins during a programming cycle. recommended operating conditions MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 V VIH High-level input voltage 2 5.5 V VIL Low-level input voltage 0.8 V IOH High-level output current −2 mA IOL Low-level output current 12 mA fclock† Clock frequency 0 41.6 MHz High 12 Low 12 tsu† Setup time, input or feedback before clock↑ 20 ns th† Hold time, input or feedback after clock↑ 0 ns TA Operating free-air temperature −55 25 125 °C † fclock, tw, tsu, and th do not apply for TIBPAL20L8’. nsPulse duration, clock tw†

μAVI = 2.7 V VO = 0.4 V VCC = 5.5 V,IIH‡ IOZL‡ VCC = 5.5 V, μA fmax¶ MHz TIBPAL20L8-20M, TIBPAL20R4-20M, TIBPAL20R6-20M, TIBPAL20R8-20M HIGH-PERFORMANCE IMPACT/thin™ PAL® CIRCUITS SRPS021A − D2920, JUNE 1986 − REVISED DECEMBER 2010 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK VCC = 4.5 V, II = −18 mA −0.8 −1.5 V VOH VCC = 4.5 V, IOH = −2 mA 2.4 3.2 V VOL VCC = 4.5 V, IOL = 12 mA 0.3 0.5 V IOZH VCC = 5.5 V, VO = 2.7 V 100 μA O, Q outputs −20 I/O ports −250 II VCC = 5.5 V, VI = 5.5 V 1 mA I/O ports 100 All others 25 IIL‡ VCC = 5.5 V, VI = 0.4 V −0.25 mA IOS§ VCC = 5.5 V, VO = 0.5 V −30 −70 −250 mA ICC VCC = 5.5 V, Outputs open, VI = 0, OE = VIH 120 180 mA switching characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITION MIN TYP† MAX UNIT With feedback 28.5 40 Without feedback 41.6 50 tpd I, I/O O, I/O R1 = 390 Ω, 12 20 ns tpd CLK↑ Q R2 = 750 Ω, 8 15 ns ten OE Q See Figure 3 10 20 ns tdis OE↑ Q 8 20 ns ten I, I/O O, I/O 12 25 ns tdis I, I/O O, I/O 12 20 ns † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second. Set VO at 0.5 V to avoid test equipment ground degradation. fmax(with feedback) /C0043 1 tsu /C0041tpd (CLK to Q) fmax(without feedback) /C00431 tw high /C0041tw low fmax does not apply for TIBPAL20L8,.

inexpensive device programmers. distributor, or by calling Texas Instruments at (214) 997-5666. by following the steps given below. CC at 5 volts and Pin 1 at VIL, raise Pin 13 to VIHH. Step 2. Apply either V IL or VIH to the output corresponding to the register to be preloaded. Step 3. Pulse Pin 1, clocking in preload data. voltage level at the output pin. Figure 1. Preload Waveforms

occur until all applicable input and feedback setup times are met.

5 VVCC

† This is the power-up reset time and applies to registered outputs only. The values shown are from characterization data. ‡ This is the setup time for input or feedback. Figure 2. Power-Up Reset Waveforms

NOTES: A. C L includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis. is for an output with internal conditions such that the output is high except when disabled by the output control. D. When measuring propagation delay times of 3-state outputs, switch S1 is closed. E. Equivalent loads may be used for testing. Figure 3. Load Circuit and Voltage Waveforms

TOLL FREE: (800) 336-5236 OUTSIDE USA: (214) 995-6611 (8:00 a.m. − 5:00 p.m. CST) TI Die Processors Chip Supply (407) 298-7100 Elmo Semiconductor (818) 768-7400 Minco Technology Labs (512) 834-2022 ©1992 Texas Instruments Incorporated SRPS021 TI North American Sales Offices ALABAMA: Huntsville: (205) 837-7530 ARIZONA: Phoenix: (602) 995-1007 CALIFORNIA: Irvine: (714) 660-1200 San Diego: (619) 278-9600 Santa Clara: (408) 980-9000 Woodland Hills: (818) 704-8100 COLORADO: Aurora: (303) 368-8000 CONNECTICUT: Wallingford: (203) 269-0074 FLORIDA: Altamonte Springs: (407) 260-2116 Fort Lauderdale: (305) 973-8502 Tampa: (813) 885-7588 GEORGIA: Norcross: (404) 662-7967 ILLINOIS: Arlington Heights: (708) 640-3000 INDIANA: Carmel: (317) 573-6400 Fort Wayne: (219) 489-4697 KANSAS: Overland Park: (913) 451-4511 MARYLAND: Columbia: (410) 964-2003 MASSACHUSETTS: Waltham: (617) 895-9100 MICHIGAN: Farmington Hills: (313) 553-1581 MINNESOTA: Eden Prairie: (612) 828-9300 MISSOURI: St. Louis: (314) 821-8400 NEW JERSEY: Iselin: (908) 750-1050 NEW MEXICO: Albuquerque: (505) 345-2555 NEW YORK: East Syracuse: (315) 463-9291 Fishkill: (914) 897-2900 Melville: (516) 454-6600 Pittsford: (716) 385-6770 NORTH CAROLINA: Charlotte: (704) 527-0930 Raleigh: (919) 876-2725 OHIO: Beachwood: (216) 765-7258 Beavercreek: (513) 427-6200 OREGON: Beaverton: (503) 643-6758 PENNSYLVANIA: Blue Bell: (215) 825-9500 PUERTO RICO: Hato Rey: (809) 753-8700 TEXAS: Austin: (512) 250-6769 Dallas: (214) 917-1264 Houston: (713) 778-6592 Midland: (915) 561-7137 UTAH: Salt Lake CIty: (801) 466-8972 WISCONSIN: Waukesha: (414) 798-1001 CANADA: Nepean: (613) 726-1970 Richmond Hill: (416) 884-9181 St. Laurent: (514) 335-8392 TI Regional Technology Centers CALIFORNIA: Irvine: (714) 660-8140 Santa Clara: (408) 748-2222 GEORGIA: Norcross: (404) 662-7945 ILLINOIS: Arlington Heights: (708) 640-2909 INDIANA: Indianapolis: (317) 573-6400 MASSACHUSETTS: Waltham: (617) 895-9196 MEXICO: Mexico City: 491-70834 MINNESOTA: Minneapolis: (612) 828-9300 TEXAS: Dallas: (214) 917-3881 CANADA: Nepean: (613) 726-1970 Alliance Electronics, Inc. (military product only) Almac/Arrow Anthem Electronics Arrow/Schweber Future Electronics (Canada) GRS Electronics Co., Inc. Hall-Mark Electronics Marshall Industries Newark Electronics Rochester Electronics, Inc. (obsolete product only (508) 462-9332) Wyle Laboratories Zeus Components TI Distributors ALABAMA: Arrow/Schweber (205) 837-6955; Hall-Mark (205) 837-8700; Marshall (205) 881-9235. ARIZONA: Anthem (602) 966-6600; Arrow/Schweber (602) 437-0750; Hall-Mark (602) 431-0030; Marshall (602) 496-0290; Wyle (602) 437-2088. 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TEXAS: Austin: Arrow/Schweber (512) 835-4180; Hall-Mark (512) 258-8848; Marshall (512) 837-1991; Wyle (512) 345-8853; Dallas: Anthem (214) 238-7100; Arrow/Schweber (214) 380-6464; Hall-Mark (214) 553-4300; Marshall (214) 233-5200; Wyle (214) 235-9953; Zeus (214) 783-7010; Houston: Arrow/Schweber (713) 530-4700; Hall-Mark (713) 781-6100; Marshall (713) 467-1666; Wyle (713) 879-9953. UTAH: Anthem (801) 973-8555; Arrow/Schweber (801) 973-6913; Marshall (801) 973-2288; Wyle (801) 974-9953. WASHINGTON: Almac/Arrow (206) 643-9992, Anthem (206) 483-1700; Marshall (206) 486-5747; Wyle (206) 881-1150. WISCONSIN: Arrow/Schweber (414) 792-0150; Hall-Mark (414) 797-7844; Marshall (414) 797-8400. CANADA: Calgary: Future (403) 235-5325; Edmonton: Future (403) 438-2858; Montreal: Arrow/Schweber (514) 421-7411; Future (514) 694-7710; Marshall (514) 694-8142 Ottawa: Arrow/Schweber (613) 226-6903; Future (613) 820-8313. Quebec: Future (418) 897-6666. Toronto: Arrow/Schweber (416) 670-7769; Future (416) 612-9200; Marshall (416) 458-8046. Vancouver: Arrow/Schweber (604) 421-2333; Future (604) 294-1166.

www.ti.com 17-Dec-2015 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples 5962-87671013A ACTIVE LCCC FD 28 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 87671013A TIBPAL20 L8-20MFDB 5962-8767101KA ACTIVE CFP W 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767101KA TIBPAL20L8-20M WB 5962-8767101LA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767101LA TIBPAL20L8-20M JTB 5962-87671043A ACTIVE LCCC FD 28 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 87671043A TIBPAL20 R4-20MFDB 5962-8767104LA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767104LA TIBPAL20R4-20M JTB 8412901LA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 8412901LA TIBPAL20L8-20M JTB 8412901XA ACTIVE LCCC FK 28 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 8412901XA TIBPAL20 L8-20MFKB 8412902LA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 8412902LA TIBPAL20R8-20M JTB 8412903LA NRND CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 8412903LA TIBPAL20R6-20M JTB 8412904LA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 8412904LA TIBPAL20R4-20M JTB JM38510/50501BLA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 50501BLA JM38510/50502BLA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 50502BLA

www.ti.com 17-Dec-2015 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish (6) MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples JM38510/50503BLA OBSOLETE CDIP JT 24 TBD Call TI Call TI -55 to 125 JM38510/ 50503BLA JM38510/50504BLA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 50504BLA M38510/50501BLA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 50501BLA M38510/50502BLA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 50502BLA M38510/50503BLA OBSOLETE CDIP JT 24 TBD Call TI Call TI -55 to 125 M38510/50504BLA ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 50504BLA TIBPAL20L8-20MJT ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 TIBPAL20L8-20M JT TIBPAL20L8-20MJTB ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767101LA TIBPAL20L8-20M JTB TIBPAL20L8-20MWB ACTIVE CFP W 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767101KA TIBPAL20L8-20M WB TIBPAL20R4-20MJT ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 TIBPAL20R4-20M JT TIBPAL20R4-20MJTB ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767104LA TIBPAL20R4-20M JTB TIBPAL20R6-20MJTB NRND CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767103LA TIBPAL20R6-20M JTB TIBPAL20R8-20MJTB ACTIVE CDIP JT 24 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8767102LA TIBPAL20R8-20M JTB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

www.ti.com 17-Dec-2015 Addendum-Page 3 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

MCER004A – JANUARY 1995 – REVISED JANUARY 1997 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 JT (R-GDIP-T**) CERAMIC DUAL-IN-LINE

24 LEADS SHOWN

B 0.200 (5,08) MAX 0.320 (8,13) 0.290 (7,37) 0.130 (3,30) MIN 0.008 (0,20) 0.014 (0,36) Seating Plane 0.030 (0,76) 0.070 (1,78) 0.015 (0,38) MIN A 0.100 (2,54) MAX 0.023 (0,58) 0.015 (0,38) 0.100 (2,54) 0°–15° 1.440 (37,08) 1.460 0.285 (7,39) 0.291 (36,58) (7,24) 28PINS ** 1.280 1.240 0.300 0.245 (7,62) DIM B MAX A MAX A MIN B MIN (6,22) (32,51) (31,50) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification. E. Falls within MIL STD 1835 GDIP3-T24, GDIP4-T28, and JEDEC MO-058 AA, MO-058 AB

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