82C83H INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 6

Technical content

Features

  • Full 8-Bit Parallel Latching Buffer
  • Bipolar 8283 Compatible
  • Three-State Inverting Outputs
  • Gated Inputs - Reduce Operating Power - Eliminate the Need for Pull-Up Resistors
  • Single 5V Power Supply
  • Low Power Operation
  • Operating Temperature Ranges oC to +70oC

Description

The Intersil 82C83H is a high performance CMOS Octal Latching Buffer manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). The 82C83H provides an 8- bit parallel latch/buffer in a 20 lead pin package. The active high strobe (STB) input allows transparent transfer of data and latches data on the negative transition of this signal. The active low output enable (OE) permits simple interface to microprocessor systems. The 82C83H provides inverted data at the outputs. Pinouts 82C83H (PDIP, CERDIP) TOP VIEW 82C83H (PLCC, CLCC) TOP VIEW

Ordering Information

PART NO. PACKAGE TEMP RANGE PKG. NO CP82C83H 20 Ld PDIP 0 oC to +70oC E20.3 IP82C83H -40 oC to +85oC E20.3 CS82C83H 20 Ld PLCC 0 oC to +70oC N20.35 IS82C83H -40 oC to +85oC N20.35 CD82C83H 20 Ld CERDIP 0 oC to +70oC F20.3 ID82C83H -40 oC to +85oC F20.3 MD82C83H/B 0 oC to +70oC F20.3 8406702RA SMD# -55 oC to +125oC F20.3 MR82C83H/B 20 Pad CLCC -55 oC to +125oC J20.A 84067022A SMD# -55 oC to +125oC J20.A TRUTH TABLE STB OE DI DO X H X HI-Z HLLH HLHL ↓ LX † H = Logic One L = Logic Zero X = Don‘t Care HI-Z = High Impedance ↓ = Negative Transition † = Latched to Value of Last Data 1DI0 DI1 DI2 DI3 DI4 DI5 DI7 DI6 OE GND VCC DO 1 DO 2 DO 3 DO 0 DO 4 DO 5 DO 6 DO 7 STB PIN NAMES PIN DESCRIPTION DI0 - DI7 Data Input Pins DO 0 - DO7 Data Output Pins STB Active High Strobe OE Active Low Output Enable 193 2 201 9 10 11 12 13 DI4 DI5 DI6 DI7 DI3 OE GND STB DO 7 DO 6 DO 2 DO 3 DO 4 DO 5 DO 1 DI2 DI1 DI0 VCC DO 0 File Number 2971.1CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207| Copyright © Intersil Corporation 1999

Absolute Maximum Ratings Thermal Information Operating Conditions Operating Temperature Range oC to +70oC Thermal Resistance (Typical) θJAoC/W θJCoC/W oC to +150oC Lead Temperature (Soldering 10s) (PLCC - Lead Tips Only) . . +300oC Die Characteristics CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. TA = -40oC to +85oC (I82C83H); TA = -55oC to +125oC (M82C83H) SYMBOL PARAMETER MIN MAX UNITS TEST CONDITIONS VIH Logical One Input Voltage 2.0 2.2 - V C82C83H, I82C83H, M82C83H, (Note 1) VIL Logical Zero Input Voltage 0.8 V VOH Logical One Output Voltage 3.0 VCC -0.4V -V I OH = -8mA, IOH = -100mA,OE = GND VOL Logical Zero Output Voltage 0.45 V I OL = 20mA,OE = GND II Input Leakage Current -10 10 µAV IN = GND or VCC , DIP Pins 1-9,11 IO Output Leakage Current -10 10 µAV O = GND orOE ≥ VCC -0.5V DIP Pins 12-19 lCCSB Standby Power Supply Current - 10 µAV IN = VCC or GND VCC = 5.5V Outputs Open IC COP Operating Power Supply Current - 1 mA/ MHz TA = +25oC, VCC = 5V, Typical (See Note 2) NOTES: 1. VIH is measured by applying a pulse of magnitude = VlHMIN to one data Input at a time and checking the corresponding device output for a valid logical 1 - during valid input high time. Control pins (STB,CE) are tested separately with all device data input pins at VCC -0.4V. Capacitance TA = +25oC SYMBOL PARAMETER TYPICAL UNITS TEST CONDITIONS C IN Input Capacitance 13 pF FREQ = 1MHz, all measure- ments are referenced to device GNDC OUT Output Capacitance 20 pF 82C83H

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitehttp://www.intersil.com Die Characteristics DIE DIMENSIONS: 138.6 x 155.5 x 19± 1 mils METALLIZATION: Type: Silicon - Aluminum Thickness: 11k Å ± 2kÅ GLASSIVATION: Type: SiO2 Thickness: 8kÅ ± 1kÅ WORST CASE CURRENT DENSITY: 2.0 x 105 A/cm2 Metallization Mask Layout 82C83H DI2 DI1 DI2 VCC DO0 DO1 DO2 DO3 DO4 DO5 DO6DO7STBGNDOEDI7 DI6 DI5 DI4 DI3 82C83H