83904I-02 Final Data Sheet
Document overview
- Manufacturer or author: epieczon
- PDF pages: 16
Technical content
Features
- Four LVCMOS / LVTTL outputs, 19 output impedance at VDD = VDDO = 3.3V
- Two crystal oscillator input pairs LVCMOS / LVTTL clock input
- Crystal input frequency range: 12MHz – 38.88MHz
- Output frequency: 200MHz (maximum)
- Output skew: 40ps (maximum) at VDD = VDDO = 3.3V
- RMS phase jitter @ 25MHz output, using a 25MHz crystal, (100Hz – 1MHz): 0.16ps (typical) at V DD = VDDO = 3.3V
- RMS phase noise at 25MHz Offset Noise Power
- Power Supply Voltage Modes: Core / Output 3.3V / 3.3V 3.3V / 2.5V 3.3V / 1.8V 2.5V / 2.5V 2.5V / 1.8V
- -40°C to 85°C ambient operating temperature
- Available in lead-free (RoHS 6) packaging 83904I-02 16-Lead TSSOP 4.4mm x 5.0mm x 0.92mm package body G Package Top View CLK_SEL1 XTAL_OUT1 XTAL_IN1 VDD XTAL_OUT0 CLK_SEL0 GND VDDO XTAL_IN0 CLK OE VDDO Pin Assignment OSC OSC 0 0 0 1 1 0 1 1 OE CLK_SEL0 CLK_SEL1 CLK XTAL_IN0 XTAL_OUT0 XTAL_IN1 XTAL_OUT1 Pullup Pulldown Pulldown Pulldown Block Diagram Low Skew, 1-to-4, Crystal-to-LVCMOS/LVTTL Fanout Buffer 83904I-02 Datasheet
Table 1. Pin Descriptions NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values. Table 2. Pin Characteristics Table 3. Input Reference Function Table CLK_SEL1 Input Pulldown Clock select inputs. See Table 3, Input Reference Function Table. LVCMOS/LVTTL interface levels. 4V DD Power Power supply pin. 8 CLK Input Pulldown Single-ended clock input. LVCMOS/LVTTL interface levels. 9 OE Input Pullup Output enable pin. When LOW, outputs are in high-impedance state. When HIGH, outputs are active. LVCMOS/LVTTL interface levels. 10, 16 V DDO Power Output supply pins. 11, 12, 14, 15 Q3, Q2, Q1, Q0 Output Single-ended clock outputs. LVCMOS/LVTTL interface levels. 13 GND Power Power supply ground.
10 C L K
11 C L K
3©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Absolute Maximum Ratings NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. Table 4A. Power Supply DC Characteristics, VDD = VDDO = 3.3V±5%, TA = -40°C to 85°C Table 4B. Power Supply DC Characteristics, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = -40°C to 85°C Table 4C. Power Supply DC Characteristics, VDD = 3.3V±5%, VDDO = 1.8V±0.2V, TA = -40°C to 85°C Item Rating Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5V Outputs, VO -0.5V to VDDO + 0.5V Package Thermal Impedance, JA 100.3C/W (0 mps) Storage Temperature, TSTG -65C to 150C Symbol Parameter Test Conditio ns Minimum Typical Maximum Units VDD Power Supply Voltage 3.135 3.3 3.465 V VDDO Output Supply Voltage 3.135 3.3 3.465 V IDD Power Supply Current No Load & XTALx selected @ 12MHz 7 mA No Load & CLK selected 1 mA IDDO Output Supply Current No Load & CLK selected 1 mA Symbol Parameter Test Conditio ns Minimum Typical Maximum Units VDD Power Supply Voltage 3.135 3.3 3.465 V VDDO Output Supply Voltage 2.375 2.5 2.625 V IDD Power Supply Current No Load & XTALx selected @ 12MHz 7 mA No Load & CLK selected 1 mA IDDO Output Supply Current No Load & CLK selected 1 mA Symbol Parameter Test Conditio ns Minimum Typical Maximum Units VDD Power Supply Voltage 3.135 3.3 3.465 V VDDO Output Supply Voltage 1.6 1.8 2.0 V IDD Power Supply Current No Load & XTALx selected @ 12MHz 7 mA No Load & CLK selected 1 mA IDDO Output Supply Current No Load & CLK selected 1 mA
4©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Table 4D. Power Supply DC Characteristics, VDD = VDDO = 2.5V±5%, TA = -40°C to 85°C Table 4E. Power Supply DC Characteristics, VDD = 2.5V±5%, VDDO = 1.8V±0.2V, TA = -40°C to 85°C Table 4F. LVCMOS/LVTTL DC Characteristics, TA = -40°C to 85°C NOTE: Outputs terminated with 50 to VDDO/2. See Parameter Measurement section, Load Test Circuit diagram. Symbol Parameter Test Conditio ns Minimum Typical Maximum Units VDD Power Supply Voltage 2.375 2.5 2.625 V VDDO Output Supply Voltage 2.375 2.5 2.625 V IDD Power Supply Current No Load & XTALx selected @ 12MHz 3 mA No Load & CLK selected 1 mA IDDO Output Supply Current No Load & CLK selected 1 mA Symbol Parameter Test Conditio ns Minimum Typical Maximum Units VDD Power Supply Voltage 2.375 2.5 2.625 V VDDO Output Supply Voltage 1.6 1.8 2.0 V IDD Power Supply Current No Load & XTALx selected @ 12MHz 3 mA No Load & CLK selected 1 mA IDDO Output Supply Current No Load & CLK selected 1 mA Symbol Parameter Test Conditions Minimum Typical Maximum Units VIH Input High Voltage VDD = 3.3V ± 5% 2.2 V DD + 0.3 V VDD = 2.5V ± 5% 1.6 V DD + 0.3 V VIL Input Low Voltage IIH Input High Current CLK, CLK_SEL[0:1] VDD = VIN = 3.3V or 2.5V ± 5% 150 µA OE V DD = VIN = 3.3V or 2.5V ± 5% 5 µA IIL Input Low Current CLK, CLK_SEL[0:1] VDD = 33.3V or 2.5V ± 5%, VIN = 0V -5 µA OE VDD = 3.3V or 2.5V ± 5%, VIN = 0V -150 µA VOH Output High Voltage; NOTE 1 VDDO = 3.3V ± 5% 2.6 V VDDO = 2.5V ± 5% 1.8 V VDDO = 1.8V ± 0.2V 1.2 V VOL Output Low Voltage; NOTE 1 VDDO = 3.3V ± 5% 0.6 V VDDO = 2.5V ± 5% 0.5 V VDDO = 1.8V ± 0.2V 0.4 V
Table 5. Crystal Characteristics has been reached under these conditions. NOTE 1: Measured from the VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: This parameter is defined in accordance with JEDEC Standard 65. NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
6©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Table 6B. AC Characteristics, VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = -40°C to 85°C NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE 1: Measured from the V DD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: This parameter is defined in accordance with JEDEC Standard 65. NOTE 6: These parameters are guaranteed by characterization. Not tested in production. Table 6C. AC Characteristics, VDD = 3.3V ± 5%, VDDO = 1.8V ± 0.2V, TA = -40°C to 85°C NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE 1: Measured from the VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: This parameter is defined in accordance with JEDEC Standard 65. NOTE 6: These parameters are guaranteed by characterization. Not tested in production. Parameter Symbol Test Conditio ns Minimum Typical Maximum Units f OUT Output Frequency w/external XTAL 12 38.88 MHz w/external CLK 200 MHz tpLH Propagation Delay, Low to High; NOTE 1 1.5 2.0 2.5 ns tsk(o) Output Skew; NOTE 2, 5 40 ps tsk(pp) Part-to-Part Skew; NOTE 3, 5 700 ps tjit() RMS Phase Jitter, Random; 4, 5 25MHz, Integration Range: 100MHz – 1MHz 0.16 ps tR / tF Output Rise/Fall Time 20% to 80% 100 800 ps odc Output Duty Cycle w/external XTAL 45 55 % w/external CLK <150MHz 46 54 % tEN Output Enable Time; NOTE 6 10 ns tDIS Output Disable Time; NOTE 6 10 ns Parameter Symbol Test Conditio ns Minimum Typical Maximum Units fOUT Output Frequency w/external XTAL 12 38.88 MHz w/external CLK 200 MHz tpLH Propagation Delay, Low to High; NOTE 1 1.7 2.2 2.7 ns tsk(o) Output Skew; NOTE 2, 5 40 ps tsk(pp) Part-to-Part Skew; NOTE 3, 5 700 ps tjit() RMS Phase Jitter, Random; 4, 5 25MHz, Integration Range: 100MHz – 1MHz 0.16 ps tR / tF Output Rise/Fall Time 20% to 80% 100 1000 ps odc Output Duty Cycle w/external XTAL 45 55 % w/external CLK <150MHz 46 54 % tEN Output Enable Time; NOTE 6 10 ns tDIS Output Disable Time; NOTE 6 10 ns
7©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Table 6D. AC Characteristics, VDD = VDDO = 2.5V ± 5%, TA = -40°C to 85°C NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE 1: Measured from the V DD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: This parameter is defined in accordance with JEDEC Standard 65. NOTE 6: These parameters are guaranteed by characterization. Not tested in production. Table 6E. AC Characteristics, VDD = 2.5V ± 5%, VDDO = 1.8V ± 0.2V, TA = -40°C to 85°C NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE 1: Measured from the VDD/2 of the input to VDDO/2 of the output. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO/2. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and with equal load conditions. Using the same type of input on each device, the output is measured at VDDO/2. NOTE 4: Phase jitter is dependent on the input source used. NOTE 5: This parameter is defined in accordance with JEDEC Standard 65. NOTE 6: These parameters are guaranteed by characterization. Not tested in production. Parameter Symbol Test Conditio ns Minimum Typical Maximum Units f OUT Output Frequency w/external XTAL 12 38.88 MHz w/external CLK 200 MHz tpLH Propagation Delay, Low to High; NOTE 1 1.5 2.2 3.0 ns tsk(o) Output Skew; NOTE 2, 5 40 ps tsk(pp) Part-to-Part Skew; NOTE 3, 5 700 ps tjit() RMS Phase Jitter, Random; 4, 5 25MHz, Integration Range: 100MHz – 1MHz 0.20 ps tR / tF Output Rise/Fall Time 20% to 80% 100 800 ps odc Output Duty Cycle w/external XTAL 45 55 % w/external CLK <150MHz 46 54 % tEN Output Enable Time; NOTE 6 10 ns tDIS Output Disable Time; NOTE 6 10 ns Parameter Symbol Test Conditio ns Minimum Typical Maximum Units fOUT Output Frequency w/external XTAL 12 38.88 MHz w/external CLK 200 MHz tpLH Propagation Delay, Low to High; NOTE 1 1.7 2.5 3.3 ns tsk(o) Output Skew; NOTE 2, 5 40 ps tsk(pp) Part-to-Part Skew; NOTE 3, 5 700 ps tjit() RMS Phase Jitter, Random; 4, 5 25MHz, Integration Range: 100MHz – 1MHz 0.19 ps tR / tF Output Rise/Fall Time 20% to 80% 100 1000 ps odc Output Duty Cycle w/external XTAL 45 55 % w/external CLK <150MHz 46 54 % tEN Output Enable Time; NOTE 6 10 ns tDIS Output Disable Time; NOTE 6 10 ns
8©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Typical Phase Noise at 25MHz, 100Hz - 1MHz Noise Power (dBc/Hz) Offset Frequency (Hz) 25MHz RMS Phase Jitter 100Hz to 1MHz = 0.16ps (typical) Raw Phase Noise Data
9©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Parameter Measurement Information 3.3V Core/3.3V LVCMOS Output Load Test Circuit 3.3V Core/1.8V LVCMOS Output Load Test Circuit 2.5V Core/1.8V LVCMOS Output Load Test Circuit 3.3V Core/2.5V LVCMOS Output Load Test Circuit 2.5V Core/2.5V LVCMOS Output Load Test Circuit RMS Phase Jitter SCOPE Qx GND VDD, 1.65V±5% -1.65V±5% VDDO SCOPE Qx GND VDDO VDD 0.9V±0.1V -1.25V±5% 2.4V±0.065V SCOPE Qx GND VDDO VDD 0.9V±0.1V 1.6V±0.025V SCOPE Qx GND VDDO VDD 1.25V±5% -1.25V±5% 2.05V±5% SCOPE Qx GND VDD, 1.25V±5% -1.25V±5% VDDO
10©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Parameter Measurement Information, continued Output Skew Propagation Delay Output Duty Cycle/Pulse Width/Period Part-to-Part Skew Output Enable/Disable Time Output Rise/Fall Time tsk(o) VDDO VDDO Qx Qy t PD VDD VDDO 2Q[0:3] CLK Q[0:3] Qx Qy tsk(pp) VDDO VDDO Part 1 Part 2 VDD/2 V DD/2 VDD/2 V DD/2 VOH VDD tDIS tEN Output Qx OE (High-level enabling) Q[0:3]
Table 7. JA vs. Air Flow Table for a 16 Lead TSSOP
14©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet
Ordering Information
Table 9. Ordering Information
15©2016 Integrated Device Technology, Inc. Revision B, April 8, 2016 83904I-02 Datasheet Revision History Sheet Rev Table Page Description of Change Date B Deleted “ICS” prefix from part number throughout the datasheet. Updated datasheet header/footer. 4/8/16
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice. Performance specifications and the operating parameters of the described products are determined in the independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT’s products for any particular purpose, an implied warranty of merchantability, or non-infringement of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties. IDT’s products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This produ ct is intended for use in normal commercial applications. Any other applications, such as those requiring extended temperature ranges, high reliability or other extraordinary environmental requirements are not recomme nded without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Product specification subject to change without notice. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners. Copyright ©2016 Integrated Device Technology, Inc. All rights reserved. Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, CA 95138 USA Sales 1-800-345-7015 or 408-284-8200 Fax: 408-284-2775 www.IDT.com Tech Support email: clocks@idt.com