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2:1, Single-Ended Multiplexer ICS83052I DATA SHEET ICS83052I REVISION B DECEMBER 8, 2011 1 ©2011 Integrated Device Technology, Inc. GENERAL DESCRIPTION The ICS83052I is a low skew, 2:1, Single-ended Multiplexer. The ICS83052I has two selectable single-ended clock inputs and one single-ended clock output. The output has a V DDO pin which may be set at 3.3V, 2.5V, or 1.8V, making the device ideal for use in voltage trans-lation applications. An output enable pin places the output in a high impedance state which may be useful for testing or debug. The device operates up to 250MHz and is packaged in an 8 TSSOP. BLOCK DIAGRAM PIN ASSIGNMENT
FEATURES
- 2:1 single-ended multiplexer
- Q nominal output impedance: 15 Ω (VDDO = 3.3V)
- Maximum output frequency: 250MHz
- Propagation delay: 2.7ns (maximum), (V DD = VDDO = 3.3V)
- Input skew: 160ps (maximum), (VDD = VDDO = 3.3V)
- Part-to-part skew: 490ps (maximum), (V DD = VDDO = 3.3V)
- Additive phase jitter, RMS at 155.52MHz (12kHz - 20MHz): 0.18ps (typical), (VDD = VDDO = 3.3V)
- Operating supply modes: VDD/VDDO 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V
- -40°C to 85°C ambient operating temperature
- Available in standard (RoHS 5) and lead-free (RoHS 6) packages CLK0 CLK1 SEL0 OE Q ICS83052I 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View VDDO GND CLK1 VDD Q SEL0 CLK0 OE
ICS83052I REVISION B DECEMBER 8, 2011 2 ©2011 Integrated Device Technology, Inc. TABLE 1. PIN DESCRIPTIONS TABLE 2. PIN CHARACTERISTICS TABLE 3. CONTROL INPUT FUNCTION TABLE
00 KLC
11 KLC
ICS83052I REVISION B DECEMBER 8, 2011 3 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDDO + 0.5V Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional op- eration of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for ex- tended periods may affect product reliability. TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = 2.5V±5%, VDDO = 2.5V±5% OR 1.8V±5%, TA = -40°C TO 85°C lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU V DD egatloVylppuSeroC 531.33 .35 64.3V V ODD egatloVylppuStuptuO 531.33 .35 64.3V 573.25 .25 26.2V 17.18 .19 8.1V I DD tnerruCylppuSrewoP 04A m I ODD tnerruCylppuStuptuO 5A m lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU V DD egatloVylppuSeroC 573.25 .25 26.2V V ODD egatloVylppuStuptuO 573.25 .25 26.2V 17.18 .19 8.1V I DD tnerruCylppuSrewoP 63A m I ODD tnerruCylppuStuptuO 5A m
ICS83052I REVISION B DECEMBER 8, 2011 4 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER TABLE 5A. AC CHARACTERISTICS, VDD = VDDO = 3.3V ± 5%, TA = -40°C TO 85°C TABLE 4C. LVCMOS/LVTTL DC CHARACTERISTICS, TA = -40°C TO 85°C lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU V HI egatloVhgiHtupnI V DD %5±V3.3=2 V DD 3.0+V V DD %5±V5.2=7 .1V DD 3.0+V V LI egatloVwoLtupnI I HI tnerruChgiHtupnI ,1KLC,0KLC 0LES V DD %5±V5.2roV3.3=0 51A μ EOV DD %5±V5.2roV3.3=5 A μ I LI tnerruCwoLtupnI ,1KLC,0KLC 0LES V DD %5±V5.2roV3.3=5 -A μ EOV DD %5±V5.2roV3.3=0 51-A μ V HO hgiHtuptuOe gatloV V ODD 1ETON;%5±V3.3=6 .2V V ODD 1ETON;%5±V5.2=8 .1V V ODD 1ETON;%5±V8.1=V DD 3.0-V V LO egatloVwoLtuptuO V ODD 1ETON;%5±V3.3=5 .0V V ODD 1ETON;%5±V5.2=5 4.0V V ODD 1ETON;%5±V8.1=5 3.0V 05htiwdetanimretstuptuO:1ETON Ω Vot ODD .smargaid"tiucriCtseTdaoL",noitcestnemerusaeMretemaraPeeS.2/ lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU f XAM ycneuqerFtuptuO 052z HM pt HL ;hgiHotwoL,yaleDnoitagaporP 1ETON 0.24 .27 .2s n pt LH ;woLothgiH,yaleDnoitagaporP 1ETON 0.25 .29 .2s n t )i(ks 4ETON;wekStupnI 630 61s p t )pp(ks 4,2ETON;wekStraP-ot-traP 094s p t tij ;SMR,rettiJesahPevitiddAreffuB ,noitcesrettiJesahPevitiddAotrefer 3ETON ,zHM25.551 :egnaRnoitargetnI zHM02-zHk21 81.0s p tR t/ F emiTllaF/esiRtuptuO% 08ot%020 020 07s p cdoe lcyCytuDtuptuO 545 5% XUM NOITALOSI noitalosIXUM 54B d dehsilbatsesihcihw,egnarerutarepmetgnitarepotneibmadeificepsehtrevodeetnaraugerasretemaraplacirtcelE:ETON teemlliwecivedehT.mpfl005nahtretaergwolfriaesrevsnartdeniatniamhtiwtekcostsetanidetnuomsiecivedehtnehw .snoitidnocesehtrednudehcaerneebsahmuirbiliuqelamrehtretfasnoitacificeps VmorfderusaeM:1ETON DD Vottupniehtfo2/ ODD .tuptuoehtfo2/ dnasegatlovylppusemasehtagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:2ETON Vtaderusaemsituptuoeht,ecivedhcaenotupnifoepytemasehtgnisU.snoitidnocdaollauqehtiw ODD .2/ .kcolctupnienoylnognivirD:3ETON .56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON
ICS83052I REVISION B DECEMBER 8, 2011 5 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER TABLE 5B. AC CHARACTERISTICS, VDD = 3.3V ± 5%, VDDO = 2.5V ± 5%, TA = -40°C TO 85°C TABLE 5C. AC CHARACTERISTICS, VDD = 3.3V ± 5%, VDDO = 1.8V ± 5%, TA = -40°C TO 85°C lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU f XAM ycneuqerFtuptuO 052z HM pt HL ;hgiHotwoL,yaleDnoitagaporP 1ETON 3.21 .39 .3s n pt LH ;woLothgiH,yaleDnoitagaporP 1ETON 3.21 .39 .3s n t )i(ks 4ETON;wekStupnI 916 6s p t )pp(ks 4,2ETON;wekStraP-ot-traP 053s p t tij ;SMR,rettiJesahPevitiddAreffuB ,noitcesrettiJesahPevitiddAotrefer 3ETON ,zHM25.551 :egnaRnoitargetnI zHM02-zHk21 61.0s p tR t/ F emiTllaF/esiRtuptuO% 08ot%020 530 58s p cdoe lcyCytuDtuptuO 644 5% XUM NOITALOSI noitalosIXUM 54B d dehsilbatsesihcihw,egnarerutarepmetgnitarepotneibmadeificepsehtrevodeetnaraugerasretemaraplacirtcelE:ETON teemlliwecivedehT.mpfl005nahtretaergwolfriaesrevsnartdeniatniamhtiwtekcostsetanidetnuomsiecivedehtnehw .snoitidnocesehtrednudehcaerneebsahmuirbiliuqelamrehtretfasnoitacificeps VmorfderusaeM:1ETON DD Vottupniehtfo2/ ODD .tuptuoehtfo2/ dnasegatlovylppusemasehtagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:2ETON Vtaderusaemsituptuoeht,ecivedhcaenotupnifoepytemasehtgnisU.snoitidnocdaollauqehtiw ODD .2/ .kcolctupnienoylnognivirD:3ETON .56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU f XAM ycneuqerFtuptuO 052z HM pt HL ;hgiHotwoL,yaleDnoitagaporP 1ETON 3.26 .29 .2s n pt LH ;woLothgiH,yaleDnoitagaporP 1ETON 3.26 .29 .2s n t )i(ks 4ETON;wekStupnI 326 01s p t )pp(ks 4,2ETON;wekStraP-ot-traP 053s p t tij ;SMR,rettiJesahPevitiddAreffuB ,noitcesrettiJesahPevitiddAotrefer 3ETON ,zHM25.551 :egnaRnoitargetnI zHM02-zHk21 41.0s p tR t/ F emiTllaF/esiRtuptuO% 08ot%020 030 07s p cdoe lcyCytuDtuptuO 644 5% XUM NOITALOSI noitalosIXUM 54B d dehsilbatsesihcihw,egnarerutarepmetgnitarepotneibmadeificepsehtrevodeetnaraugerasretemaraplacirtcelE:ETON teemlliwecivedehT.mpfl005nahtretaergwolfriaesrevsnartdeniatniamhtiwtekcostsetanidetnuomsiecivedehtnehw .snoitidnocesehtrednudehcaerneebsahmuirbiliuqelamrehtretfasnoitacificeps VmorfderusaeM:1ETON DD Vottupniehtfo2/ ODD .tuptuoehtfo2/ dnasegatlovylppusemasehtagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:2ETON Vtaderusaemsituptuoeht,ecivedhcaenotupnifoepytemasehtgnisU.snoitidnocdaollauqehtiw ODD .2/ .kcolctupnienoylnognivirD:3ETON .56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON
ICS83052I REVISION B DECEMBER 8, 2011 6 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER TABLE 5D. AC CHARACTERISTICS, VDD = VDDO = 2.5V ± 5%, TA = -40°C TO 85°C TABLE 5E. AC CHARACTERISTICS, VDD = 2.5V ± 5%, VDDO = 1.8V ± 5%, TA = -40°C TO 85°C lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU f XAM ycneuqerFtuptuO 052z HM pt HL ;hgiHotwoL,yaleDnoitagaporP 1ETON 2.27 .22 .3s n pt LH ;woLothgiH,yaleDnoitagaporP 1ETON 2.27 .22 .3s n t )i(ks 4ETON;wekStupnI 823 21s p t )pp(ks 4,2ETON;wekStraP-ot-traP 004s p t tij ;SMR,rettiJesahPevitiddAreffuB ,noitcesrettiJesahPevitiddAotrefer 3ETON ,zHM25.551 :egnaRnoitargetnI zHM02-zHk21 22.0s p tR t/ F emiTllaF/esiRtuptuO% 08ot%020 030 07s p cdoe lcyCytuDtuptuO 545 5% XUM NOITALOSI noitalosIXUM 54B d dehsilbatsesihcihw,egnarerutarepmetgnitarepotneibmadeificepsehtrevodeetnaraugerasretemaraplacirtcelE:ETON teemlliwecivedehT.mpfl005nahtretaergwolfriaesrevsnartdeniatniamhtiwtekcostsetanidetnuomsiecivedehtnehw .snoitidnocesehtrednudehcaerneebsahmuirbiliuqelamrehtretfasnoitacificeps VmorfderusaeM:1ETON DD Vottupniehtfo2/ ODD .tuptuoehtfo2/ dnasegatlovylppusemasehtagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:2ETON Vtaderusaemsituptuoeht,ecivedhcaenotupnifoepytemasehtgnisU.snoitidnocdaollauqehtiw ODD .2/ .kcolctupnienoylnognivirD:3ETON .56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON lobmySr etemaraPs noitidnoCtseTm uminiMl acipyTm umixaMs tinU f XAM ycneuqerFtuptuO 052z HM pt HL ;hgiHotwoL,yaleDnoitagaporP 1ETON 1.21 .31 .4s n pt LH ;woLothgiH,yaleDnoitagaporP 1ETON 1.21 .32 .4s n t )i(ks 4ETON;wekStupnI 913 7s p t )pp(ks 4,2ETON;wekStraP-ot-traP 053s p t tij ;SMR,rettiJesahPevitiddAreffuB ,noitcesrettiJesahPevitiddAotrefer 3ETON ,zHM25.551 :egnaRnoitargetnI zHM02-zHk21 91.0s p tR t/ F emiTllaF/esiRtuptuO% 08ot%020 530 58s p cdoe lcyCytuDtuptuO 545 5% XUM NOITALOSI noitalosIXUM 54B d dehsilbatsesihcihw,egnarerutarepmetgnitarepotneibmadeificepsehtrevodeetnaraugerasretemaraplacirtcelE:ETON teemlliwecivedehT.mpfl005nahtretaergwolfriaesrevsnartdeniatniamhtiwtekcostsetanidetnuomsiecivedehtnehw .snoitidnocesehtrednudehcaerneebsahmuirbiliuqelamrehtretfasnoitacificeps VmorfderusaeM:1ETON DD Vottupniehtfo2/ ODD .tuptuoehtfo2/ dnasegatlovylppusemasehtagnitareposecivedtnereffidnostuptuoneewtebwekssadenifeD:2ETON Vtaderusaemsituptuoeht,ecivedhcaenotupnifoepytemasehtgnisU.snoitidnocdaollauqehtiw ODD .2/ .kcolctupnienoylnognivirD:3ETON .56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:4ETON
ICS83052I REVISION B DECEMBER 8, 2011 7 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER ADDITIVE PHASE JITTER Additive Phase Jitter (Random) at 155.52MHz (12kHz - 20MHz) = 0.18ps (typical) -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 The spectral purity in a band at a specific offset from the fundamental compared to the power of the fundamental is called the dBc Phase Noise. This value is normally expressed using a Phase noise plot and is most often the specified plot in many applications. Phase noise is defined as the ratio of the noise power present in a 1Hz band at a specified offset from the fundamental frequency to the power value of the fundamental. This ratio is expressed in decibels (dBm) or a ratio of the power in the 1Hz As with most timing specifications, phase noise measurements has issues relating to the limitations of the equipment. Often the noise floor of the equipment is higher than the noise floor of band to the power in the fundamental. When the required offset is specified, the phase noise is called a dBc value, which simply means dBm at a specified offset from the fundamental. By investigating jitter in the frequency domain, we get a better understanding of its effects on the desired application over the entire time record of the signal. It is mathematically possible to calculate an expected bit error rate given a phase noise plot. the device. This is illustrated above. The device meets the noise floor of what is shown, but can actually be lower. The phase noise is dependant on the input source and measurement equipment. OFFSET FROM CARRIER FREQUENCY (HZ) SSB PHASE NOISE dBc/HZ 1k 10k 100k 1M 10M 100M
ICS83052I REVISION B DECEMBER 8, 2011 8 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER PARAMETER MEASUREMENT INFORMATION SCOPE Qx LVCMOS GND 3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT 2.4±5% VDDO -0.9V±5% VDD 0.9V±5% SCOPE Qx LVCMOS GND 2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT 2.05V±5% VDDO -1.25V±5% VDD 1.25V±5% 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT SCOPE Qx LVCMOS GND 1.65V±5% -1.65V±5% 3.3V CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT 2.5 CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT PART-TO-PART SKEW SCOPE Qx LVCMOS GND 1.25V±5% -1.25V±5% SCOPE Qx LVCMOS GND 1.6V±5% VDDO -0.9V±5% VDD 0.9V±5% VDD, VDDO VDD, VDDO t sk(pp) VDDO VDDO 2Qy Qx Part 1 Part 2
ICS83052I REVISION B DECEMBER 8, 2011 9 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER Clock Outputs 20% 80% 80% 20% tR tF tPERIOD tPW tPERIOD odc = VDDO x 100% tPW Q tpLH tpHL VDDO VDD VDDO VDD 2CLK0, CLK1 Q INPUT SKEW OUTPUT RISE/FALL TIMEPROPAGATION DELAY OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD tPD1 tPD2 tsk(i) = ⏐tPD2 – tPD1⏐ CLKx Q CLKy Q
ICS83052I REVISION B DECEMBER 8, 2011 10 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER INPUTS: CLK INPUT: For applications not requiring the use of the test clock, it can be left floating. Though not required, but for additional protection, a 1kΩ resistor can be tied from the CLK input to ground. C ONTROL PINS: All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used. RECOMMENDATIONS FOR UNUSED INPUT PINS APPLICATIONS INFORMATION
ICS83052I REVISION B DECEMBER 8, 2011 11 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER POWER CONSIDERATIONS This section provides information on power dissipation and junction temperature for the ICS830521I. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS830521I is the sum of the core power plus the analog power plus the power dissipated in the load(s). The following is the power dissipation for V DD = 3.3V + 5% = 3.465V, which gives worst case results. Core and LVDS Output Power Dissipation
- Power (core) MAX = V DD_MAX * (I DD + I DDo ) = 3.4565V * (40mA + 5mA) = 155.93mW
- Output Impedance R OUT Power Dissipation due to Loading 50 Ω to V DD Output Current IOUT = VDDO_MAX / [2 * (50Ω + ROUT)] = 3.465 / [2 * (50Ω + 15Ω)] = 26.7mA
- Power Dissipation on the R OUT per LVCMOS output Power (ROUT) = ROUT * (IOUT)2 = 15Ω * (26.7mA)2 = 10.7mW Dynamic Power Dissipation at 250MHz
- Power (250MHz) = CPD * frequency * (VDD)2 = 18pF * 250MHz * (3.465V) 2 = 54.0mW Total Power Dissipation
- Total Power = Power (core)MAX + Power (ROUT) Total Power + Power (250MHz) = 155.93mW + 10.7mW + 54.0mW =220.6mW
ICS83052I REVISION B DECEMBER 8, 2011 12 ©2011 Integrated Device Technology, Inc. 125°C ensures that the bond wire and bond pad temperature remains below 125°C. Assuming no air flow and a multi-layer board, the appropriate value is 101.7°C/W per Table 6. flow, and the type of board (multi-layer). TABLE 6. θ
ICS83052I REVISION B DECEMBER 8, 2011 13 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER RELIABILITY INFORMATION TRANSISTOR COUNT The transistor count for ICS83052I is: 967
ICS83052I REVISION B DECEMBER 8, 2011 14 ©2011 Integrated Device Technology, Inc. TABLE 7. PACKAGE DIMENSIONS
ICS83052I REVISION B DECEMBER 8, 2011 15 ©2011 Integrated Device Technology, Inc. reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. TABLE 8. ORDERING INFORMATION
ICS83052I REVISION B DECEMBER 8, 2011 16 ©2011 Integrated Device Technology, Inc. ICS83052I Data Sheet 2:1, SINGLE ENDED MULTIPLEXER TEEHSYROTSIHNOISIVER veRe lbaTe gaPe gnahCfonoitpircseDe taD B B4,A4 Vdetcerroc-selbaTylppuSrewoP ODD .xam/nim .gnikrameerf-daeldedda-elbaTnoitamrofnIgniredrO 60/7/8 B8 T2 1. gnikrameerf-daeldetcerroc-elbaTnoitamrofnIgniredrO 70/61/3 BB 4T3 I rofstinudetcerroc-elbaTylppuSrewoPV5.2 DD I& ODD .8 0/52/6 B ,B5,A5T ,D5,C5 ,E5 ,llA 6,5,4 21,11 .retooFdnaredaeHdetadpU .noitamrofnItcatnoCdetadpU.selbaTotetoNdeddA .noitcessnoitaredisnoCrewoPdeddA .noitamrofnItcatnoCdetadpU 11/8/21
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