STM690_06 STMICROELECTRONICS | Alldatasheet
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Figure 1. Packages Table 1. Device Options
as MR is low and for trec after MR returns high. ed to ground with a switch. Leave open if unused. sees a rising or falling edge. lowing the WDI pin to float. triggers a reset, or MR goes from high to low. erwise, PFO remains high. Leave open if unused. to VOUT . Connect to VCC if no battery is used. requirements exceeding 75mA. able gating circuit. Connect to ground if unused. below VSO , VOUT switches from VCC to VBAT . to VCC if no battery is used. Table 3. Pin Description
1111 VOUT Supply Output for External LPSRAM
2222 VCC Supply Voltage
4333 VSS Ground
8888 VBAT Backup-Battery Input
CC < VRST if VBAT is greater than 1V.
- by toggling WDI (high-to-low or low-to-high),
SRAM to the back-up supply when VCC falls. nect VBAT to VOUT when VBAT is greater than VCC . to reliably retain data in most external SRAMs. ed to VCC through a 3Ω PMOS power switch. Table 4. I/O Status in Battery Back-up
Figure 15. Using a SuperCap™ pin provides additional transient immunity.
Figure 34. E to ECON Propagation Delay vs. Temperature Table 5. Absolute Maximum Ratings
STM690/704/795/802/804/805/806 ILI Input Leakage Current (MR) STM704/806 only; MR = 0V, VCC = 3V 20 75 350 µA Input Leakage Current (PFI) 0V = VIN = VCC –25 2 +25 nA Input Leakage Current (WDI) 0V = VIN = VCC –1 +1 µA ILO Output Leakage Current STM804/805/795; 0V = VIN = VCC (6) –1 +1 µA VIH Input High Voltage (MR, WDI) VRST (max) < VCC < 5.5V 0.7V CC V VIL Input Low Voltage (MR, WDI) VRST (max) < VCC < 5.5V 0.3V CC V VOL Output Low Voltage (PFO, RST , RST, Vccsw) VCC = VRST (max), ISINK = 3.2mA 0.3 V Output Low Voltage (ECON ) VCC = VRST (max), IOUT = 1.6mA, E = 0V 0.2VCC V VOL Output Low Voltage (RST) IOL = 40µA, VCC = 1.0V, VBA T = VCC , TA = 0°C to 85°C 0.3 V IOL = 200µA, VCC = 1.2V, VBAT = VCC 0.3 V VOH Output High Voltage (RST, RST)(7) ISOURCE = 1mA, VCC = VRST (max) 2.4 V Output High Voltage (ECON ) VCC = VRST (max), IOUT = 1.6mA, E = VCC 0.8VCC V Output High Voltage (PFO) ISOURCE = 75µA, VCC = VRST (max) 0.8VCC V VOHB VOH Battery Back-up (Vccsw, RST) ISOURCE = 100µA, VCC = 0V, VBA T = 2.8V 0.8VBA T V VOH Battery Back-up (ECON ) ISOURCE = 75µA, VCC = 0V, VBA T = 2.8V 0.8VBA T V Power-fail Comparator (NOT available on STM795) VPFI PFI Input Threshold PFI Falling (VCC < 3.6V) STM802/ 804/806 1.212 1.237 1.262 V STM690/ 704/805 1.187 1.237 1.287 V PFI Hysteresis PFI Rising (VCC < 3.6V) 10 20 mV tPFD PFI to PFO Propagation Delay 2µ s ISC PFO Output Short to GND Current VCC = 3.6V , PFO = 0V 0.1 0.75 2.0 mA Battery Switchover VSO Battery Back-up Switchover Voltage (8,9) Power-down VBA T > VSW VSW V VBA T < VSW VBA T V Power-up VBA T > VSW VSW V VBA T < VSW VBA T V VSW 2.4 V Hysteresis 40 mV Sym Alter- native Description Test Condition(1) Min Typ Max Unit
STM690/704/795/802/804/805/806 Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = VRST (max) to 5.5V; and VBAT = 2.8V (except where noted). 2. VCC supply current, logic input leakage, Watchdog functionality, Push-button Reset functionality, PFI functionality, state of RST and RST tested at VBAT = 3.6V, and VCC = 5.5V. The state of RST or RST and PFO is tested at VCC = VCC (min). Either VCC or VBAT can go to 0V if the other is greater than 2.0V. 3. VCC (min) = 1.0V for TA = 0°C to +85°C. 4. Tested at VBAT = 3.6V, VCC = 3.5V and 0V. 5. Guaranteed by design. 6. The leakage current measured on the RST pin (STM804/805) or RST pin (STM795) is tested with the reset output not asserted (output high impedance). 7. Not valid for STM795/804/805 (open drain). 8. When VBAT > VCC > VSW , VOUT remains connected to VCC until VCC drops below VSW . 9. When VSW > VCC > VBAT , VOUT remains connected to VCC until VCC drops below the battery voltage (VBAT ) – 75mV. 10. The reset threshold tolerance is wider for VCC rising than for VCC falling due to the 10mV (typ) hysteresis, which prevents internal oscillation. Reset Thresholds VRST (10) Reset Threshold STM690T/ 704T/795T/ 805T VCC Falling 3.00 3.075 3.15 V VCC Rising 3.00 3.085 3.17 V STM802T/ 804T/806T VCC Falling 3.00 3.075 3.12 V VCC Rising 3.00 3.085 3.14 V STM690S/ 704S/795S/ 805S VCC Falling 2.85 2.925 3.00 V VCC Rising 2.85 2.935 3.02 V STM802S/ 804S/806S VCC Falling 2.88 2.925 3.00 V VCC Rising 2.88 2.935 3.02 V STM690R/ 704R/795R/ 805R VCC Falling 2.55 2.625 2.70 V VCC Rising 2.55 2.635 2.72 V STM802R/ 804R/806R VCC Falling 2.59 2.625 2.70 V VCC Rising 2.59 2.635 2.72 V trec RST Pulse Width VCC < 3.6V 140 200 280 ms Push-button Reset Input (STM704/806) tMLMH tMR MR Pulse Width 100 20 ns tMLRL tMRD MR to RST Output Delay 60 500 ns Watchdog Timer (NOT available on STM704/795/806) tWD Watchdog Timeout Period VRST (max) < VCC < 3.6V 1.12 1.60 2.24 s WDI Pulse Width VRST (max) < VCC < 3.6V 100 20 ns Chip-Enable Gating (STM795 only) E-to-ECON Resistance V CC = VRST (max) 46 Ω E-to-ECON Propagation Delay V CC = VRST (max) 27 n s Reset-to-ECON High Delay 10 µs ISC ECON Short Circuit Current VCC = 3.6V, Disable Mode, ECON = 0V 0.1 0.75 2.0 mA Sym Alter- native Description Test Condition(1) Min Typ Max Unit
Figure 39. SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mech. Drawing Note: Drawing is not to scale. Table 8. SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data
Figure 40. TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Outline Note: Drawing is not to scale. Table 9. TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Mechanical Data
Table 10. Ordering Information Scheme Note: 1. Contact local ST sales office for availability.
Table 11. Marking Description
STM690/704/795/802/804/805/806
REVISION HISTORY
Table 12. Document Revision History
STM690/704/795/802/804/805/806 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America