80021012A

SN54LS245 TI | Alldatasheet

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SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 3-State Outputs Drive Bus Lines Directly /C0068 PNP Inputs Reduce dc Loading on Bus Lines /C0068 Hysteresis at Bus Inputs Improves Noise Margins /C0068 Typical Propagation Delay Times Port to Port, 8 ns TYPE IOL (SINK CURRENT) IOH (SOURCE CURRENT) SN54LS245 12 mA –12 mA SN74LS245 24 mA –15 mA

description

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE ) input can disable the device so that the buses are effectively isolated.

ORDERING INFORMATION

TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – N Tube SN74LS245N SN74LS245N SOIC – DW Tube SN74LS245DW LS245 0°C to 70°C SOIC – DW Tape and reel SN74LS245DWR LS245 SOP – NS Tape and reel SN74LS245NSR 74LS245 SSOP – DB Tape and reel SN74LS245DBR LS245 CDIP – J Tube SN54LS245J SN54LS245J –55°Ct o1 2 5°C CDIP – J Tube SNJ54LS245J SNJ54LS245J –55°C to 125°C CFP – W Tube SNJ54LS245W SNJ54LS245W LCCC – FK Tube SN54LS245FK SN54LS245FK † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Copyright  2002, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 3 2 1 20 19 91 0 1 1 1 2 1 3 DIR B6 OE GND VCC SN54LS245 . . . FK PACKAGE (TOP VIEW) DIR GND V CC OE SN54LS245 ...J O R W PACKAGE SN74LS245 ... DB, DW, N, OR NS PACKAGE (TOP VIEW) On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

schematics of inputs and outputs EQUIVALENT OF EACH INPUT VCC Input 9 kΩ NOM TYPICAL OF ALL OUTPUTS Output VCC 50 Ω NOM logic diagram (positive logic) DIR OE To Seven Other Channels

SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to GND. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions SN54LS245 SN74LS245 UNIT MIN NOM MAX MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V IOH High-level output current –12 –15 mA IOL Low-level output current 12 24 mA TA Operating free-air temperature –55 125 0 70 °C

SN54LS245, SN74LS245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SDLS146A – OCTOBER 1976 – REVISED FEBRUARY 2002

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS † SN54LS245 SN74LS245 UNITPARAMETER TEST CONDITIONS † MIN TYP ‡ MAX MIN TYP ‡ MAX UNIT VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.7 0.8 V VIK Input clamp voltage VCC = MIN, II = –18 mA –1.5 –1.5 V Hysteresis (VT+ – VT–) A or B VCC = MIN 0.2 0.4 0.2 0.4 V VOH High level output voltage VCC = MIN, VIH 2V IOH = –3 mA 2.4 3.4 2.4 3.4 VVOH High-level output voltage VIH = 2 V, VIL = VIL(max) IOH = MAX 2 2 V VOL Low level output voltage VCC = MIN, VIH 2V IOL = 12 mA 0.4 0.4 VVOL Low -level output voltage VIH = 2 V, VIL = VIL(max) IOL = 24 mA 0.5 V IOZH Off-state output current, high-level voltage applied VCC = MAX, OE at 2 V VO = 2.7 V 20 20 µA IOZL Off-state output current, low-level voltage applied VCC = MAX, OE at 2 V VO = 0.4 V –200 –200 µA II Input current at maximum input A or B VCC = MAX VI = 5.5 V 0.1 0.1 mAII max imum input voltage DIR or OE VCC = MAX VI = 7 V 0.1 0.1 mA IIH High-level input current VCC = MAX, VIH = 2.7 V 20 20 µA IIL Low-level input current VCC = MAX, VIL = 0.4 V –0.2 –0.2 mA IOS Short-circuit output current§ VCC = MAX –40 –225 40 –225 mA Total, outputs high 48 70 48 70 ICC Supply current Total, outputs lowVCC = MAX Outputs open 62 90 62 90 mA Outputs at high Z 64 95 64 95 † For conditions shown as MIN or MAX, use the appropriate values specified under recommended operating conditions. ‡ All typical values are at VCC = 5 V, TA = 25°C. § Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second. switching characteristics, VCC = 5 V, TA = 25°C (see Figure 1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low- to high-level output C4 5 p F R 667 /C0087 8 12 ns tPHL Propagation delay time high to low level output C L = 45 pF, R L = 667 /C0087 8 12 ns tPHL Propagation delay time, high- to low-level output 8 12 tPZL Output enable time to low level C L =4 5pF R L = 667/C0087 27 40 ns tPZH Output enable time to high level C L = 45 pF, R L = 667 /C0087 25 40 ns tPLZ Output disable time from low level C L =5 pF R L = 667/C0087 15 25 ns tPHZ Output disable time from high level C L = 5 pF, R L = 667 /C0087 15 28 ns

NOTES: A. C L includes probe and jig capacitance. B. All diodes are 1N3064 or equivalent. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. S1 and S2 are closed for tPLH , tPHL , tPHZ , and tPLZ ; S1 is open and S2 is closed for tPZH ; S1 is closed and S2 is open for tPZL . E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples. F. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω , tr ≤ 1.5 ns, tf ≤ 2.6 ns. G. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuits and Voltage Waveforms

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) 5962-8002101VRA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC 5962-8002101VSA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC 80021012A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC 8002101SA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC JM38510/32803B2A ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC JM38510/32803BRA ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC JM38510/32803BSA ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC SN54LS245J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC SN74LS245DBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245J OBSOLETE CDIP J 20 TBD Call TI Call TI SN74LS245N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SN74LS245N3 OBSOLETE PDIP N 20 TBD Call TI Call TI SN74LS245NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SN74LS245NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LS245NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54LS245FK ACTIVE LCCC FK 20 1 TBD Call TI Level-NC-NC-NC SNJ54LS245J ACTIVE CDIP J 20 1 TBD Call TI Level-NC-NC-NC SNJ54LS245W ACTIVE CFP W 20 1 TBD Call TI Level-NC-NC-NC (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered PACKAGE OPTION ADDENDUM www.ti.com 17-Oct-2005 Addendum-Page 1

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. PACKAGE OPTION ADDENDUM www.ti.com 17-Oct-2005 Addendum-Page 2

MLCC006B – OCTOBER 1996 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER 4040140/D 10/96

28 TERMINAL SHOWN

B 0.358 (9,09) MAX (11,63) 0.560 (14,22) 0.560 0.458 0.858 (21,8) 1.063 (27,0) (14,22) ANO. OF MINMAX 0.358 0.660 0.761 0.458 0.342 (8,69) MIN (11,23) (16,26) 0.640 0.739 0.442 (9,09) (11,63) (16,76) 0.962 1.165 (23,83) 0.938 (28,99) 1.141 (24,43) (29,59) (19,32)(18,78) 0.020 (0,51) TERMINALS 0.080 (2,03) 0.064 (1,63) (7,80) 0.307 (10,31) 0.406 (12,58) 0.495 (12,58) 0.495 (21,6) 0.850 (26,6) 1.047 0.045 (1,14) 0.045 (1,14) 0.035 (0,89) 0.035 (0,89) 0.010 (0,25) 121314151618 17 432 0.020 (0,51) 0.010 (0,25) 12826 27 B SQ A SQ 0.055 (1,40) 0.045 (1,14) 0.028 (0,71) 0.022 (0,54) 0.050 (1,27) NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01

28 PINS SHOWN

8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150

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