75CG38E

UPD7537A NEC | Alldatasheet

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4-Bit, Single-Chip NEC Electronics Inc. CMOS Microcomputers With FIP® Driver 2s SSSSSSSSSSSSSSSSSSSSSSSSSS Description © Can select either a pull-down resistor or open-drain . output per 31 high-voltage outputs (mask optional) Dre ce CMOS rennet KPOTSCRSRE ae D7500 O Vectored interrupts: one external, two internal " . 7 O &bit timer/event counter architecture and FIP direct-drive capability. OO &bit serial interface The »PD7537A contains a 2048 x &bit ROM and a © Standby function (HALT, STOP) 128 x 4-bit RAM. The »PD7538A contains a 4096 x 8-bit © Dataretention mode ROM and a 160 x 4-bit RAM. Oo Zero-cross detector on POg/INTO input (mask | optional) The uPD7537A/38A contains two 4-bit general purpose . x registers located outside RAM. The subroutine stack is 7 S¥Stem clock {xPD7537A/7836A/75CG38E}: on-chip implemented in RAM for greater depth and flexibility. C CMOS technolo The »PD7537A/38A typically executes 67 instructions © Low power consumption with a 5ys instruction cycle time. Cl Single power supply The »PD7537A/38A has one external and two internal —yuPD7537A/7538A: 2.7 V to 6.0V edge-triggered hardware-vectored interrupts. An 8-bit —uPD75CG38E: 5.0V + 10% timer/event counter and an &-bit serial interface help to reduce software requirements. Ordering Information Thirty-one high-voltage lines are organized intothe 3-bit Part Max Frequency output port 2, the 4-bit output ports 3, 8, and 9, and the 4- Number Pocksae Type ot Operation bit I/O ports 4, 5, 10, and 11. uPD7S37AC/38AC_-7 42-pin plastic DIP 610 KHz The low power consumption CMOS process allows the POPSTIC SN S Seoin paste srk oP _604Hz use of a power supply between 2.7V and 6.0V. Current —_-#PO7SCG38E 42-pin ceramic piggyback DIP SOOkHz consumption is less than 3.0 mA maximum, and can be further reduced in the halt and stop power-downmodes. Pin Configurations The pPD75CG38E is a piggyback EPROM version of PD7537A/38A 42-Pin Plastic DIP or Shrink DIP the uPD7537A/38A. Pin-compatible and function. or compatible with the final, masked versions of the reser uPD7537A/38A, the .PD75CG38E Is used for prototyp- cod: SB pacino ing and for aiding in program development. ced 3 40 FD) PoySCK Fe Verne Ch ¢ 39 F) Po2/so atures Yoav] 38 D poysi Pp O 67 instructions re ; apes C) Instruction cycle: Ps, 6 35D Pa — Internal clock: 3.3 ws/600 kHz, 5V P50 9 4 MD P35 — External clock: 3.3 8/600 kHz, 5V ee q ‘ z i 5 ee ia] Upwerdly compatible with the #PD7500 series myeroutdr & afer product fam: Pieais & pre. 0 4,096 x 8-bit ROM (uPD7538A/75CG38E) Pid, 14 » 3) Pte 2,048 x 8-bit ROM (uPD7537A) P10; 1s 2h pa, C160 x 4-bit RAM (uPD7538A/75CG38E) “ qt 27 Pte ‘ qi 26 Pay Put P9, DO 31high-voltage output lines that can directly drive a reed » 3 B Pe vacuum fluorescent diplay (FIP) Yoo C21 22 Pay FIP is the registered trademark for NEC's fluorescent indicator panel (vacuum 490011704 fluorescent display). 50277 (NECEL-510) 3-85

a Pin Configurations (cont) uPD75CG38E EPROM a Wo. ‘Symbol Function | = CO uPD75CG38E 42-Pin Ceramic Piggyback DIP 7 Voo Connection to pin 21 of xPD7SCG3E reser 7 Eh ves 2 NC No connection: cu] 2 porscosse «1 FL POO"NTO 310, 21, 24, 25 Ag-Aro EPROM address output cq 3 40 POvSCK Se ata read input from the EPROM vine © Voy save BPS 113, 15-19 Ig-lz Data read input from the EPROM neds “0 0 38 f Poy/st 4 Vss Connection to EPROM GND pin pss 6 NCO 2 270MSEL 37 Pao ec ted? gree es 20 CE Chip enable output pis ue : ao 38D P32 22 Vss Supplies EPROM OE signal | ess OO en q e MO 6 BOA * P m 23 Ay Program counter MSB output one B SN pa ne 72@o ws apie 26 po Supplies Voc to the EPROM PaveTour Cf 12 Md sneer phe Pd MSEL Mode select input P10 13 g 30 Bi Pay SO oo dia nye is ae) ree 28 Voo Supplies high-level signal to MSEL Pre, 15 eo vee 2s pps, Note: Pid Ch 16 bors wou = TPP (1) Output drivers on ports 2~5 and 8-11 are mask-optional. Accordingly, mG vecdie dy PP either an open-drain output or a pull-down resistor can be selected. Pie hve va - 25D 8% Vipapis suitable for an output driver with a pull-down resistor. ad q s EPROM: 2732 bad ng @) Ports 2-5 are sultable as FIP segment signal outputs, and ports 8-11 ¥ are suitable for FIP digit signal outputs. ‘po C21 22D P83 cocina] @) Ports 8-11 have high-current drive capability and can drive an LED directly. Pin Identification Pin Functions, .PD7537A/38A and uPD7537A/38A and uPD75CG38E #PD75CG38E eee eee Wo. ‘Symbol Function RESET ja 1 RESET Reset input System reset (input).

2.3 Lt, CL2 Clock pins

4 Vere ‘High-voltage output predriver supply CL1, CL2

5 Vioad High-voltage output option resistor Connection to the ceramic oscillator. CL1is the external supply 7537A/ 38A only clock input. 6-9 P5p-P53 High-voltage 1/0 port 5 Vv 10,12 P25, P22 High-voltage output port 2, and output PRE P24/ PTOUT Port from timer / event counter (PTOUT) Negative power supply for high-voltage output pre- 13-16 P109-P103 High-current, high-voltage !/ 0 port 10 drivers (for ports 2-5, 8-11). 17-20 Prtg-PItg High-voltage, high-current |/O port 11 OT Np Paatve power supply SSCS VLOAD 0D itive power supply aC ee 22-25 PQ9-P93 High-voltage, high-current output port 9 Negative power supply for optional load resistors (pull- 26-29 P89-P83 High-voltage, high-current output port 8 down resistors) of high-voltage output drivers (for ports “ae! COE : 30-33 Palg-PAy High-voltage 1/0 port 4 2-5, 8-11). This pin is only on the ¢PD7537A/38A. 23 Mh 34-37 P3q-P3q High-voltage output port 3 P5g-P5p 38 P03/SI “4-bit input of port 0; or serial data input . 39 P02/SO_ (SI), serial data output (SO), serial clock 4-bit, high-voltage I/O port 5.

40 P0,/SCK 1/0 (SCK), and external interrupt input

41 PO9/ INTO (INTO) or zero-cross detect input (POp). P21-P23 ass ound CS bit, high-voltage output port 2. 3-86

PTOUT Pin Functions, ,PD75CG38E EPROM Output port for the timer/event counter. MSEL P103-P109 Changes the addressing area of the external EPROM. 3 and the on-chip RAM (with a pull-down resistor). Con- 4-bit, high-voltage, high-current I/O port 10. Capable of necting ajumper between socket pins 27 (MSEL) and 28 bit set/reset by SPBL/RPBL instructions. (Vpp) selects .PD7537A mode (2-Kbyte EPROM, 128 x 4- bit RAM). Leaving MSEL open selects pPD7538A mode P113-Ptig (4-Kbyte EPROM, 160 x 4-bit RAM). 4-bit, high-voltage, high-current I/O port 11. Capable of Ag-Ay bit set/reset by SPBL/RPBL instructions. 0 Output the low-order 11 bits of the program counter Vopb (PCg-PCio). Used as EPROM address signals. Positive power supply. P93-P99 When MSEL is high level, Ay; outputs high-level signals. ts ot . When MSEL is open, Ay; outputs the MSB of the PC, 4bit, high-voltage, high-current output port 9. Capable which is used as the most significant address. signal of of bit set/reset by SPBL/RPBL instructions. the 4-Kbyte EPROM 2732 P83-PBo lo-I7 4-bit, high-voltage, high-current output port 8. Capable of bit set/reset by SPBL/RPBL instructions. Input data read from the EPROM. P4g-Pég cE Abit, high-voltage I/O port 4. Outputs the chip enable signal to the EPROM. P33-P3g Vop ie hh. Pin 26 is electrically equivalent to the bottom Vpp pin 4-bit, high-voltage output port 3. andis used to supply Vcc to the EPROM. Pin 28 is elec- P0p-P| trically equivalent to the bottom Vpp pin and is used to 'Og-PO3 supply the high level signal to MSEL. Pin 1 connects to 4-bit input port 0. POg is also used as the zero-cross de- _— pin 21 0f «PD75CG38E. tection input. Vss s! Pin 14 is electrically equivalent to the bottom Vss pin in Serial data input. voltage, and is connected to the EPROM GND pin. Pin 22 is electrically equivalent to the bottom Vss pin and is so used to supply the OE signal to the EPROM. Serial data output. Instruction Set SCK Refer to the User's Manual. The instruction set appears Serial I/O clock. also as subset Ad in the data sheet for the wPD7500 se- " clock. ries of single-chip microcomputers. INTO External interrupt input. Vss Ground. 3-87

Block Diagram, p.PD7537A/38A ia {Flew f5 iy {em Kae ma <3 yA a cS Ess Prout P2, | ¢ rans Pw To] 4096 x 8 Bits (.PD7538A) = Instruction tac [a> PtP at La) een stiGies KD ema Ea Llu OH | 3-88

Block Diagram, ,PD75CG38E PopiINTO P0,/SCK — PO3/S! nto P0180 Vene oe | Ze. Clock CP] TimerEvent [INT t ott, Coot Counter ¢ Oo | ken Port 2 P2;-P 2; s 8 ¢ tes, [a> birbas : 3

5 Pons

we CHEK \\A fd Ge] |e |» i i na Page Leone pw | | | H Instruction Poue ooh perc ct P-p8; | a 0 a 4 oaamenory KY z Sysiem Standby wonsete Pon 0 Gencitr con OS KD ry 105 Pont KAI TEE KS nen cu ci Voo Voc Vss Vs5 RESET Butier Absolute Maximum Ratings Ta=25°C Power supply voltage, Vpp —~0.3Vto +7V Comment: Exposing the device to stresses above those listed in Abso- CC *"~ lute Maximum Ratings could cause permanent damage. The device is Power supply voltage, Vigap (xPD7537A/38A) — Vpp-40VtoVpp +0.3V not meant to be operated under conditions outside the limits de- Power supply voltage, Vere Vop=12V10Vpq 40.3 __Sefibed in the operational sections of the specification. Exposure to ET 0 *_absolute maximum rating conditions for extended periods may affect Input voltage, except ports 4, 5, 10, 11, Vin =0.3Vt0Vpp +0.3V device reliability. Input voltage, ports 4, 5, 10, 1, Vin Vpp~40V to Vpp +0.3V Output voltage, except ports 2-5, 8-11, Vo -0.3VtoVp) +0.3V Capacitance Fr rOO> So = = a1 iNI Output voltage, ports 2-5, 8-11, Vo Vop=40V10 Vpp +0.3v TA= 25°C, Vpp = OV) f= 10 MHz, Unmeasured pins returned to GND Output current high, per pin: PO;, P02; low —i5mA inte Tost ee er raed eter Symbol Ml Max Unit Conditions Output current high, per pin: ports 2-5, 8-11: loy —30mA — a nat ] Pl a Output current high, ports 3, 4, 8, 9 total, tow =55MA—Ghacitance om Output current high, ports 2, 5, 10, 11total, Ion =S5mA Quip’ —=—SCSSsC~‘“‘“‘~*sS:SC*‘ i Ci Output current low, per pin, lo, 15mA Capacitance 35 pF Ports3, 8,9 Output current low, all ports total, Io. mA 79 to 15 pF PO, POp Operating temperature, Topt =10°C to +70°C —eapacitance 35 pF Ports4,5, 10, 11 Storage temperature, Ts7g = 65°C to +150°C 3-89

yuPD7537A/38A! 75CG38E NEC a DC Characteristics PD7537A/38A Ta= - 10°C to +70°C, Vpp = +27Vt06.0V Tas — CIO +7000, Von = +27 oC Limits Test Umits Test Parameter Symbol Min ‘Typ Max Unit —_ Conditions Parameter Symbol Win ‘Typ Max Unit —_Conditions frome int we os Ss Input voltage, Vir 0 0.3Vpp _V__ PortO, RESET Outputleakage lout 3 pA _Vo=Vpo; except tow Woo CSCO gh ports 4, 5, 10, 11 Vis Voo-35 0.3Vp0 Vs Ports4, 5,10, 11 None 80 uA soy te ears 4. input voltage, Vi 0.7 Vpo v V__ Port 0, RESET a high a a Supply current, loot 15 4.0 mA Vpp=5V=10%. ime Voo-' 00 u normal operation foc = 600 kHz Vins 9.7 V0 Vo ~V Pe ea yy Supplycurrent, Inne 700 1800 yA Vpp=5V210%, —_—_ OOOO HALT mode foc = 600 KHz Vpo-0.5 Vop V_— Ports 4, 5, 10, 11; (Note 6) (Note 4) 2IN<Vo0<4.5V 230 700 wA Vpp=3V=10% Output voltage, Vo. 0.4 V PO}, P02: foo = 600 kHz low 4.5V< Vp <6.0V; (Note 4) lop =1.6mA 710 1840 pA Vpp=5V+10%,

0.5 V POs, PO2: fo¢=600 kHz

lg, = 400 yA (Note 5) Output voltage, Von Vpp—2.0 V_ Ports 2-5, 237 730 wA Vpp=3V+10%, high lon= —4mA foc = 600 kHz (Note 1) (Note 5) Voo-2.0 V_ Ports8-11, Supply current, Ips 01 10 yA (Notes4, 6) loq=—10mA STOP mode OA Vg 10% pp=5V = 10% (Note 1) (Note 6) (Note 5) Vpp-2.0 v pans 2-5 7 30 wA Vpp=3V (Note 5) (Note 2) Note: nT () Vpre=Vpo- 9V #1¥. The circuit in figure § isrecommended. lo= —SmA (2) Vere =0V. Vop = 4.5V to 6.0V. (Note 2) @) Vpp =4.5V 0 6.0V. Voo-1.0 v Hana (4) Without zero-cross detector. (Note 3) (5) With zero-cross detector. Yoo 0-6 aki Figure1. Recommended Circuit, «PD7537A/7538A Input leakage = uu -3 pA Vin=0V; POp-P03, current, low (Note 4) luv -40 yA Vin=OV, POp Yoo vey (Note 5) . ns =20 yA Viy=0V; CLI Taaue RO lus =10 pA Vin=Vop-35V: ports 4, 5, 10, 11 uporss7a YPRE ne 7eSnA Input leakage lun 3 uA Viv=Vpp; PO cane current, high (Note 4)-P03 i 40 =Vpp: PO 'uns. 20 HA Vin=Vop; CLI Vss| Tuna 80 = yA Vin=Vop; ports 4, 5.10.11 Output leakage tout =3 pA Vo=0V; PO}, P02 = esos current, low tho =10 yA Vo=Vpp—35V: ports 2-5, 11 3-90

DC Characteristics (cont) uPD75CG38E Ta= - 10°C to +70°C, Vpp= +5V210% Eine Test mite Test Parameter Symbol Min Typ Max Unit Conditions Parameter Symbol Min Typ Max Unit Conditions Inputvoltage, Var 0. 0.3Vpp _V__Port0, RESET Ouiput leakage ILox1 3 uA Vo=Vpp; except low Vue 0 05 Vv Cu current, high ports 4, 5, 10, 11 Vis Voo-35 0.3Vpp V Ports 4,5, 10, 11 "one 80 uA Mori ports 4, py tage. Vint_0-7¥o9_Vop_V_PorO,RESET _—Sppiycurent, toot 10.3.0. mA fcc=400kHz Vine Vop-9.5 Von ¥_ Cut normal operation Ving 0.7 op Yoo _V_ Ports 4, 5, 10, 11 Supply current, Ipo2 460 1230 WA fog =400kHz Output voltage, Vo. 0.4 VV POs, Op; HALT mode low Ig.=1.6mA (Note 3)

05 Ve PO}, PO: Supply current, |pp3 10 40 uA

Ip, =400 pA STOP mode Output voltage, Von Vo 2.0 V Ports 2-5, (WoteS) high loy=—4mA Note: (Note 1) () Vere =Vpp- 9V #1V. The circuit in figure 6 is recommended. Vpp-2.0 V Ports 8-11 @) Vere=0V lon= - 10mA (3) Ports 4,5, 10, 11 are output off or low input. (Note *) Vpp-2.0 v Ports 25. Figure 2. Recommended Circuit, uwPD75CG38E lon=—2mA (Note 2) Vpp-2.0 Vv Ports 8-11, Ion= —5mA Yoo +5v (Note 2) Vpp—1.0 V POs, POs; PDTSCG3BE ADS IEL IgH= —1mA (Note 2) vont input current, ly, =200 yA Viy=0V low (Io-l7) aki Input current, Ii 300 yA Vin=Vop high (MSEL) aov Inputleakage yi =3 yA Viy=0V; PO}-PO3 v current, low ss) hue =40 yA Vin=OV: POg law =20 yA Viv=OV; CLI ¥ . tua -10) yA Vin=Vpp-35V, ports 4, 5, 10, 11 Input leakage =|) 3 vA Vin=Vop: current, high PO;-P03 lune 40 vA_Vin=Vop; POo JuH3 200 WA Vin=Vpp; CLI lung 80 vA Vin=Vpp; ports 4, 5, 10,11 Output leakage owt =3 uA Vo=OV: PO}, Pz Current, !ow ou =10 pA Vp=Vpp-35V; ports 2-5, 8-11 3-91

a Zero-Cross Detection Characteristics AC Characteristics uPD7537A/38A: Ta = — 10°C to +70°C, Vpp =4.5V to6.0V uPD75CG3BE: Ta = ~ 10°C to +70°C, Vpn = +5V+10% uPD7537A/38A — its Test Ta= —1°Cto +70°C, Vpp= +27V106.0V —_“ ahead iid he ena Perameter Symbol Min Typ Max Unit —_ Conditions mits Test Zero-cross Vzx(PP) 1.0 3.0 Vpp AC coupled, Parameter Symbol Win Typ Max Unit Conditions ; - — etection input C= 0.1uF Cycetime ty 3.3 200 4s Vpp=4.5Vt0 voltage (Note 1) 6.0V Zero-cross. Vax £100 mV 5OHzto60Hz sine 20 w a “ PO, 1 0 610 KHZ Vpp=4.5V Terocross OS 1000 -Hz feu BOv detection input a frequency 0 210 kHz frequency eee POpinput rise tpoR 01 4s , time Zero-Cross Detection Waveform i POp input fall tpgg 01 ys time Vinx we POp input pulse tog, 2.3 us /\\._|7\\ width, low, high tpox “pgp as Vqp=4 6Vi0 AC Input a Nei VzxtP-?) _ 6.0V V/i \\/S SCK cycle time 3.0 S Input: Vpp=4.5V H 1 y' KCY us eye ij I 1 1 33 ws Output; I i ! \\ Vp9=4.5¥ to ! Hl ! | oO reese” I | 8.0 us Input Sional 95 us Output a Meter rinetcn signal selay rome lowsonighananigrorowiarstonsorine ac | SCK pulse ty, 4.0 us_ Input input signal respectively, However itis possible that he zero-cross detection width, low Ws Output leads low-to-ighandiorhigh-to-low traneition(s) of the AC mput signal Hs Outpul sores} §CK pulse tkH 13 wS Input; Vpp=4.5V width, high 106.0V 4.45 us Output: Vpp=4.5V to 6.0V Siset-uptime tsi 300 ns (torising-edge of SCK) Siholdtime tks; 450 as {after rising- edge of SCK) edge of SOR SO output delay. tkso 850s Vpp=4.5Vt0 time (after 6.0V falling-edge of ——m sO an 200 ns INTOpuise tig. 10 us width, high, low tio waath, nigh Ww hoe RESET pulse tay, 10 us width, high, low tase eee Note: () toy =2l fgg oF Zig. 3-92

AC Characteristics (cont) Oscillation Characteristics uPD75CG38E HPD7537A/38A Ta= — 10°C to +70°C, Vpp = +5V+10% Ta = — 10°C to +70°C, Vpp =2.7V to6.0V LUmits Test Umits Test Parameter Symbol Min Typ Max Unit Conditions Parameter Symbol Min Typ Max Unit Conditions a Cycletime gy 4.0 200 us System clock foc 390-400 410) KHz (Note 2) (Note 1) oscillation 7537A — Vp =4.0 10 6.0 POp event input fpo 0 500 KHz frequency foc 390-600 C610F kHz Vpp=4.5t06.0V frequency (Note 1) 7538A ; POginput rise tpoR 02 us Oscillation stable tgg «20 ms (Note 3) time time (Note 1) POg input fall por 02 us System clock — Ig 0 610 kHz Vpp=4.5V to time CLI input 6.0V POp input pulse tpoy, 0.8 1s tides” 10 210 -kH2 width, high, low tpg, ve SCKeycle time tkcy 3.0 HS Input CL1 input i tor O1 us utp Grint fat toe ot as SCK pulse tke 18 vs Output time width tow erinputputse tgy 20 50 ys SCKpuise ky. xs input width, low width, high input puis ign 07 50 ws Vpp=45Vt0 Si set-up time — tsi 300 ns width, high 6.0V i a Note: oe) Ceramic resonator: CSB400P (MURATA) oF KBR-400B (KYO-CERA) is Stholdtime tks, 450 ns recommended (see figure 3). {after rising-edge of (2) Oscillation is only guaranteed at 3V < Vpn < 4.5V. SCK) (3) After Vpp reaches 4.5V. SO output delay tkso 850 ns (4) External clock (see figure 4). time (after {alling-edge of pPD75CG38E SCK) Ta = - 10°C to +70°C, Vop =5V + 10% INTOpulse tio, «10 s Umits Test width, high, low tio Parameter © Symbol Min Typ Max Unit — Conditions RESET pulse tag. 10 us Systemclock foc 390 400 410 kHz width, high, low tas, oscillation Data input delay taco 700 ns frequency time from (Note 1) address Oscillation stable tog 20 ms After Vpp reaches Data input delay toe 700 ns time (Note 1) 4.5V time from CE System clock — fg, 10 500 KHZ Input hold time thy 0 ns CLI input atter address frequency ——— es iiitte?) () tey=2/f¢g or 2/fe CLiinput rise — tor O1 us time AC Waveform Measurement Points (Except CL1) CLt input fall tor O1 us CLtinput pulse toy. 0.8 50 us cccorsea} Note: (1) Ceramic resonator. CSB400P (MURATA) is recommended; C = 300pF (see figure 3). External clock (see figure 4). 2 igi 3-93

Figure 3, Recommended Circuit, uPD7537A/7538A Data Retention Mode Timing

1 HALT Operating

cut cuz | : ; ‘+ Data Retention Mode = Yoo °I T° ‘ ~p00r “tsar, | = = Execution of ~~ segn1057 STOP Instruction | RESET f \\ | Figure 4, Recommended Circuit, ~PD75CG38E 08, } cu cuz »uPD75CG38E EPROM Interface A4-Kbyte EPROM (2732) plugs into socket pins on top of : the uPD75CG38E. A high input to MSEL selects the uPD7537A mode and fixes the A output high level in or- cmos der to access the upper 2-Kbytes of the 4-Kbyte EPROM. yoorossa When MSEL is open, uPD7538A mode is selected. All PROM addresses can be accessed because Aq func- Stop Mode Low Voltage Data Retention tions as the MSB of the address. Figure 5 shows the ad- Characteristics dress control unit. Figures 6 and 7 show the uPD75CG38E connected with the 2732. uPD7537A/38A Figure 8 shows the EPROM read timing. Data is read Ta= — 10°C to +70°C, Vpn =27V 106.0V into the instruction buffer at the end of the T4 state. The ‘Limits Test chip enable (CE) signal is made active during 2 states Parameter Symbol Min Typ Max Unit Conditions (T3, T4) in order to decrease the power consumption of ee Dataretention Vppor 2.0 60. Vv the EPROM. Sp et Fg Address Control Unit Datarretention Ippo D110 pA Vopoa=2Vv igure 5. ress Control Un! supply current (Note 1) (ie?) sera bar DH RESET set-up tsps. us Yop (28) time ° Oscillation stable tos 20 ms After Vpp reaches to Address Decoder o<] Mets time 45V ‘of Data Memory ow —— On-chip pul-dows resistor uPD75CG38E Ta= - 10°C to +70°C, Vpp =5V 210% Yss Ss SW on: .PD7S3TA Mode Limits Teet SW off: PD7S38A Mode Parameter © Symbol Min Typ Max Unit —_ Conditions eae —_—_Ooe Dataretention Vopr 2.0 55 OV supply voltage Data retention — IppoR 7 30 yA Vppor=2V supply current RESET set-up tsps 0 Hs time Oscillation stable tos 20 ms After Vpp reaches time 4.5V Note: (1) Without zero-cross detector. Q With zero-cross detector. 3-94

Figure 6. Connection with the 2732 (uPD7537A Mode) Figure 7. Connection with the 2732 (uPD7538A Mode) ° Figure 8. EPROM Read Timing

1 Machine Cyete +l

yPD7537A/38A!75CG38E NEC a Timing Waveforms EPROM (uPD75CG38E only) Serial interface b—— ker 4 Romany beter —+ tkH—+4 | taco / = bd sees! tsik | {st : tee ti i 49.0010794 ''kSO] t-te ——— -—tear— ton Interrupt Input Lt Input | YOL- WOH: s.001668 1849+ Ce | painted | Reset Input Pg Input \\ test —+] = —-tasx—— ‘or — ‘tpor 500-150 3-96

NEC yuPD7537A/38A/ 75CG38E Differences Among the yPD7537AI38A/CG38E yPDTSCG36E —_PD7E37A {PO7536A Program memory 4Kbyte EPROM On-chip 2Kbyte On-chip 4 Kbyte (2732) ROM ROM connectable on top Data memory 160x4 128x4 1604 (RAM) High-voltage —Allopen-drain On-chip load resistor or open drain output lines outputs output (bit by bit, mask optional) Vioao pin No Yes Zero-cross Yes Mask optional detection Package 42-pin ceramic 42-pin plastic DIP piggyback DIP 42-pin plastic bottom pin shrink DIP compatible with uPD7537A/ 38A Power supply 5 2.7V 10 6.0V 3-97