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INTERFACE SERIES 55460/75460 CIRCUITS DUAL PERIPHERAL DRIVERS BULLETIN NO. OL-S 12425, DECEMBER 1976-REVISED AUGUST 1977 PERIPHERAL DRIVERS FOR HIGH-VOLTAGE, HIGH-CURRENT DRIVER APPLICATIONS performance © Characterized for Use to 300 mA @ High-Voltage Outputs SUMMARY OF SERIES 55460/75460 = pecwmmiccripe evi [ss agra Conducting 300 mA) COMPLETE CIRCUIT © MadhemSpeed Gultahing a [anscast | AND | a ease-of-design “ eames | sane Circu ‘ . on | © Circuit Flexibility for Veried Applications =< 'aygssasa {won [| vd Choles of Lage Function A wereaaa_[ ano? | @ TTL- or DTL-Compatible Diode-Clamped . [onresst [AND |agP_} Inputs « [enreasa [wan | a. © Standard Supply Voltages _jenreaes {OR aa? | [Non © Available in Plastic and Ceramic Packages v[onresse | per "With output transistor base connected externally (2 description output of gets Series 55460/75460 dual peripheral drivers are functionally interchangeable with Series 554506/764508 and Series 65460/76460 peripheral drivers, but are designed for use in systems that require higher breakdown voltages than either of those series can provide at the expense of slightly slower switching speeds. Typical applications include logic buffers, power drivers, relay drivers, lamp drivers, MOS drivers, line drivers, and memory drivers, Series 55460 drivers are cheracterized tor operation over the full militery temperature range of —65°C to 125°C; Series 75460 drivers are characterized for operation from 0°C to 70°C, “The SN'S5460 and SN76460 are unique general-purpose devices each featuring two standard Series 54/74 TTL gates and two uncommitted, high-current, high-voltage, n-p-7 transistors, These devices offer the syste designer the flexibility of tailoring the circuit to the application. The SN65461/SN75461, SN55462/SN75462, SN55463/SN75463, and SN56464/SN75464 are dual peripheral AND, NAND, OR, and NOR drivers, respectively, (assuming positive logic) with the output of the gates internally connected 10 the bases of the n-p-n output transistors, CONTENTS PAGE Datinitive Specifications ET 1780 TEXAS INSTRUMENTS 9 IMCORPORATED
‘absolute maximum ratings over operating Hooal es absolute maximum ratings over operating free-air temperature range (unless otherwise noted) SNES«GT SN75467 ‘SN5S5462 ‘SN75462 ‘'SN55463 ‘SN75463 UNIT SNS5464 SN75466 | Swen vosse, Vee wee Nowe (apy voles as as ts as [towererivervorage weeNow a) 8 | es ss | oc-sosvbstrare vortge a0 ao [ Getectortosubatrate vonage ag a [Selector bve voltage go [ Getectoremitier vos weer a ao | Gelectoremitervorage Gee Nowe a ts | ep [ Emitvecbese vonage OT 8 [ Ottsrete output woitge es | GeninvoutconwstororourpureurentueeNows) | aad | 400 | 400] a0 [ ma] | esi coletor or eutpur eurent iw € 10s, duly evele BON, weNowe si 800 | 600} 00 | 800 ma] a Continuous total dissipation at (or below) [aSpeckege [Toso Sd as [ P package i000] [Oeweting ees tenserturernee id Bo 128] -BH TOE] OWT | Ow Te] | Storoge tempereture range d= 10 150 | 05 to 150] -05 10 150 [es wg TO] [ te temperature 116 oh rom eve or GD seconds [ser IGpactane | 00 | a0 | 300 | 00 [7c] [teed temperature 1/16 inch from ca fr 10 seconas | Nor Package | 260 | 260 | 260 | 260 [7c] 6. For operation above 25°C free-air temperature, refer to Dissipation Derating Curves in the Thermal information Section, which Sarton page 11, In tha J and 40 packages, SNBE4EO thrown SNBS46A chip are aloy moumtads SNTBGG0 werai ese recommended operating conditions (see Note 7) | senies s5460 “T Senies 76060 _| [MIN "NOM MAX [MIN NOM MAX | Supply volte, Voc [es 558 [475s sas |v | ‘Operating free-er wermpareture, Ta TE wl owt] NOTE 7: For SNBE4BO anc SN76460 oni, the substrate (ain 8} must shways beat the mottnagetve device voltage ‘or proper operetion 877
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schematic ‘SN55460....J SN75460...J OR N ‘ce DUAL-IN-LINE PACKAGE (TOP VIEW) Veo 2A 2Y 28 2 2E SUB te wlfalfelfn olf s |e s . ii AED EE S TA WwW 1c ie GND ial ry 2y 2B positive logic: Y = AG (gate only) a a C= AG (gate and transistor) ono electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TTL gates [___swseaco YT _sN76460 | PAI R INDITIONST RAMETE! TEST CONDITH MIN TYP? MAX | MIN TYPE MAX Vint _High-evel input voltage a SO Vi Lowel input wot es 3 ee a Vik Tron dome velo [veormin, —yeaitma [ta PV Vec=MIN, Vi = OBV. High-level output volta ri 2 Vou Highevel output voltage yee soo uA 24 33 4 33 Veo=MiN, Vin =2V, owevel output volt Vou Lowsevel ourput voltage Noone ma v input a [inet AT VegMax, Wi=55V input voltage [input S| re 2 ee 2 ec ee eee los _ Short<ireuit output current ® Vee = MAX [=e 35-55 [=18 a5 5 | ma | TH Supply current, outputs high Voc = MAX, Vi=0 [28 a [28 aT ma | [iccu Suppiy current, outoutslow ‘| Voo= MAX, ViséV [Ta [ma | 1 For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. TAN typical values at Voc = 5 V, Ta * 28°C. ‘Snot more than one output should be shorted at a time, ee 1276 Texas INSTRUMENTS 81 INCORPORATED 20ST OFFICE BOX 228012 © DALLAS, TEXAS 75265
_—— electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) output transistors | a TEST CONDITI it ViBRicBo Collector Base Breakdowm Voltage | ic = 10048, te = 0 [oo oT allector- Emitter v =10mA, Ig= or Collector-Emitter vi Ie=100HA, Age = 5002 v MiBRIEBO Emitter Base Breakdown Voltage | le = 100HA, Ic = 0 re ee | Vee" SV, ig = 100 mA Ta= 25°C Vee =3V, ig =300mA, h Static Forward Current Ta 25°C FE Transfer Ratio VcE=3V. ic¢=100mA, Tas MIN Vee =3V, ig = 300mA; Ta=MIN $e=10mA,_ Ic = 100mA [08s 2 [as | vi Base-Emitter V. Be inter Voteage Tg=30mA, ig = 300 mA a Es OE V Collector-Emitter Tp=10mA, Ig = 100mA 02508 V CE(set) Saturation Voltage ig = 30mA, Ic =300mA 045 08 045 07 For conditions shown ax MIN or MAX, use the appropriate value specified under recommended operating conditions. Fal typical values are at Voc = 6 V, Ta = 25°C. NOTES: These parameters must be measured using pulse techniques. ty = 300 us. duty cycle & 2% switching characteristics, Vcc = 5 V, Ta = 25°C ‘TTL gates [PARAMETER TEST CONDITIONS MIN TYP Max [UNIT] Propagation delay time, ‘LH low-to-highevel output cL = 180F. RL =4002, See Figure?
4 Propagation delay time, i ore t * ‘eure
PHL high-to4ow-evel output output transistors PARAMETER TEST CONDITIONS? MIN TyP_ MAX [UNIT | [x Oeley time ig=200mA. tg isp #20mA, tu yeaoma|___10 |» | ea aie: EO Vpe(ott)"—-1V, CL=15pF, RL = 602, See Figure 2 es ia a Voltage and current values shown are nominal; exact values vary lightly with transistor parameters gates and transistors combined [PARAMETER [TEST CONDITIONS [WIN TVP_MAX TPLH Propagation delay time, low-to-high-level output [4565 | ns | TPHL Propagation delay time, high-to-lowlavel output Ig =200mA, CL=15pF, [3580] me | TTLH ___ Transition time, lowto-high-level output RL =509, See Figues [10 20 | mi _| TTHL Transition time, high-to-low-level output [100 Ts | i ap Vs=30V, Ic 300mA, i wstput voltage after avitchi Vs" » VoH High-evel output voltage after switching Rag" 80002, Se Figo VSI Vv ———— 1180
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logic SN76461...JGORP FUNCTION TABLE DUAL-IN-LINE PACKAGE (TOP VIEW) (EACH DRIVER) ps Ae ee a GU] LL | Uton stare) a J LH] Clon stated D HUT Lton stated tH [fot tte [ Ee H = high evel, L = Low level OTC schematic (each driver) rE vee electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) [——snssast_ J susaet Ps W" st ‘UNIT ARAMETER Test conoimions' tag aye? Wak [MIN TYP WAX Vini High-level input voltage a OO | [Vi towievetinpurvorge P| Thiago oF Vege win ==temA | Vec= MIN, Vin = 2V, 'oH High-evel output current ven easy uA Vec=MIN, Vi = O8V, Voo= MN Vi = BV, 02s os| 025 oa JO. ~ 100 mi Voi Lowdevel output volt v for to pur voltage Vec = MIN, ViL=08V, 05 08 os o7 Jou = 300 ma : : i Voo=Max, vizssv [TT ma [Tig —Fiohsevelinpuc coment | Ve = WAX, vinzav [AO [a0 aa Tooi_Supply eurent, outputs igh Voo=WaX, wiesv [8 TT ma | Tall typical values are at Vcc “5 V. Ta = 25 C. switching characteristics, Vcc = 5 V, TA= 25°C [__anameten TEST CONDITIONS [MIN TYP MAX [UNIT | LH _ Propagation delay ime, low-to-high evel output [30 55 | ws | TPHL Propagation delay time, high-toJowdevel output lo~200ma, cL=15eF, [28 40 | ms | TTLH Transition time, low-to-high evel output RL=50%, SeoFigues [8 20 | vs | TTHL _Trensition time, hightolowlevel output [3020 | ns_| Vs=30V, Io = 300 mA, Von High-level output voltage after witching aay Vg-10 oe 1180 Texas INSTRUMENTS 83 INCORPORATED F0ST OFFICE BOX 226012 # DALLAS, TEXAS 75265
8N78462... JG ORP logic DUAL-IN-LINE PACKAGE (TOP VIEW) FUNCTION TABLE {sr eifs] (EACH DRIVER) uJ fa ey vy) D Lt | A ot sate) L HLH (oft state) D> HL] H (off state) H__H | & (on state) CII lt He nigh tevel, L= tow level a a me schematic (each driver) vee a m ft ES ES Resistor values shown ore hominal electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) a AMET STC PARAMETER TEST CONDITIONS | Vie Hiohievel inputvorige eC [Vin towiewelnpus vottage a [ix Teper etme vote Veg Ne PA - Veo= MIN, vi, = OB, ton High-level output current ee sy Veo = MIN, Tiv, cc Via 025 os ve Lowdevel output voltage Lou = 100 mA bo Vcc = MIN, Vin =2V, os os Jou = 300 mA 2 |" __tnput current at meximum input voltage | Veo=MAX VieSSV [tT SSS | [ti High-ovel input current Voc WAX, Vie?av [OSC [tin “Lowievel input eurnt | Veo sMAXVizoav | -1a 16 | 11-16 | ma | [icon Supply eurentcurpushih | Vec= WAX, vyeOV | _13._ 7 |] 137 T ma] ecu Supply current, outputs [ow [Wee =WAX, visev [ee [or 76 [ma | AI typical values are at Veg = 5 V, Ta = 25 C. switching characteristics, Vcc = 5 V, Ta = 25°C [PARAMETER TEST CONDITIONS [WIN _T¥P_MAX [UNIT] [me lo=200ma, cL =18eF, [30 60] ms _| FL +50%, See Figured [1328 [as] Vou High-level Itage after switchin Vs =30V, 'o = 300ma, Vv [OH High-level output voltage after switching See Figure 4 m\\ 1180 ry TEXAS INSTRUMENTS INCORPORATED POST OFFICE 80X 228012 # DALLAS, TEXAS 75265
logic 'SN75463 ...JGORP- og) DUAL-IN-LINE PACKAGE (TOP VIEW) FUNCTION TABLE Moc 3 2k a (eacH RIVER) Pees) [a ey yy) Toe [tten sa > HL | H (off state) > He high tavel, L = low love! CIC schematic (each driver) vee rE = Ho + electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS’ [jain_TyPs WAX [MIN TYPE MAX| a eC [vic tewiewtinputvoteg PT ort [vig Taper ciimp vlioge | Weg WIN ye tema [=a ae ne rs { V Vege MIN Vin #2V, oH Highevel output curent yee, .ow-level out OL ~ v Vou Lowievel output voltage 1 aa, toe 300 mA [i inp eoventatmeimuminparvonom —[Veg=MAX, viesev | [tf ma | [in wighieweinouteurent—___—Vec= MAX, Wiszav [ao [aot a | [iit towdeva input current | Veg=WAX,_visdav [1 -a8 [i te [ma | icon Suppiy evant, outputehign | Veg=MAX, viesy fe TB ma | [icc Suppl earent,ovipuistow—[VogMAX, vino | 8876 [ sa 78 mA | Haul typical volucc are at Voge = 5 V. TA" 25-C. switching characteristics, Vcc = 5 V, TA = 25°C [___PanameTen =i; ST CONDITIONS [WIN TYP wax [UNIT] 20 65 | m | l= 200ma, cy=iseF, [2s 40 [| Fy +80, SeeFignes [8 [ee | Ver mV, 19 = OFA, | — Vow Highevel ouput voltae after switching wey, Vs-10 v a 1100 Texas INSTRUMENTS 85
. SN55464 1G - logic SN75464.... JGORP FUNCTION TABLE DUAL.IN-LINE PACKAGE (TOP VIEW) | (EACH DRIVER) ve ae [ae vy) fs Uoys) LLP A oft sta) tH] Clon stated ale HL} Lonstated H__H] L (on state) > H = high love, L = low leva Z
8 ED ED)
Positive loge: Y= A+B schematic (each driver) ee electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER Test conortionst | __SNssaea__[sn7eaea “ STEONOITIONS [aun ret wax [iw _tvP#_ wax Vink High-level input vottage a Se | Vit__ Low-level input voltage [oe Vike Input elm verge Voc=MIN,We=t@ma [2-18 |e tv Vec= MIN, Vi, =0BV, 'oH High-level output current Von =28V Voc =MIN, Vin =2V, tou = 100 ma ovelevel output vol v VoL Lowievel output voltage Veo= MIN, Vin =2V- oso? lor = 300 mA ° Mocs Max, Vies8V00 Pt ta] in Hihteel input curent Voo=WAK,Wistav [a] aot ua] Tiy___Cow-evel input current [Veo= MAX, Vi =04V [ais [= Tm | TeGH_ Supply eurent outputs high [Veo =Wax, VizOv [ia a8 [a9 | ma] Tecu Supply current, outpute low Voc= WAX, vizsv | 67-85 | 785 [ma | For conditions shown as MIN of MAX, use the appropriate value specified under recommended operating conditions. Tall typical values are at Veo = 5 V, Ta = 25°C. switching characteristics, Voc = 5 V, Ta = 25°C | _ parameter rest conpirions [mi tye max [unit] TPLH Propegation delay time, low-to-highlovel output [4065 | as | PHL Propegation delay time, high-to-lowlevel output tg *200mA, CL =15pF, [3080] ns] {TLH Transition time, lowso-high-level output FL=800, SeeFigues [8 20 | me | STHL_Trensition time, high-to-dow-level output [020 | ws | AZ ‘High-level nt atte itchir Vs =30V, 'o ~ 300 ma, Vs-10 mv (OW High-level output voltage after switching Sata s LL 1180
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PARAMETER MEASUREMENT INFORMATION ant ‘ Oa! | fass / “461 \\ vA i _— austen ‘2 Nowe mf iy — “as2 ouvrur a son Slice i, GENERATOR encur wr “AG (see Nowe AD Ter “462 yew \\ “63 jou i “464 ' we | fax von us 1 h Vi aay H our en of ; ee vo oe ae Test CIRCUIT VOLTAGE WAVEFORMS NOTES: A. The pulse generator nes the following charactartice: PAR = 1 MH2, Zou ~ 50°92 8. When testing SNSB460 or SN76460, connect output Y to transistor bess end ground the substrate termina. C. GL includes probe and lip eupucltance, FIGURE 3-SWITCHING TIMES OF COMPLETE ORIVERS Vss20¥ ' 4 ee pb ctom 1 t 1 | INPUT SR | | Fear ov wor 2av $v wo N H 2mH "461 al Nox of pra on Sty at a2 4 ee oF fe ct0.m oureur rn jf gy PULSE wNPuT 1 | Froow Coal cenenaron we fisy rv! (See ot A (Gee nowel
25 Jono fave vom
i \\ / J i ourrut ody + + f-_— voy Test ciRcUIT VOLTAGE WAVEFORMS NOTES: A. The pulse gonarator has the following characteristics: PAR = 12.5 KH, Zou * 50 2 8 When testing SNBE46O or SN75460, connect output ¥ to transistor bewe with « SOUR. resistor {rom there to ground, and ground the substrate terminal. €. G[ includes probe and tp capacitance. FIGURE 4—LATCH-UP TEST OF COMPLETE DRIVERS ———— 1276
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