HUF75345G3 ONSEMI | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 16
Technical content
Features
- 75 A, 55 V
- Simulation Models − Temperature Compensated PSPICE/C0116 and SABER® Models − Thermal Impedance SPICE and SABER Models
- Peak Current vs Pulse Width Curve
- UIS Rating Curve
- These Devices are Pb−Free TO−247−3 CASE 340CK See detailed ordering and shipping information on page 2 of this data sheet.
ORDERING INFORMATION
www.onsemi.com $Y = ON Semiconductor Logo &Z = Assembly Plant Code &3 = Data Code (Year & Week) &K = Lot 75345X = Specific Device Code X = G/P/S MARKING DIAGRAM VDSS RDS(ON) MAX I D MAX
55 V 7 m/C0087 75 A
$Y&Z&3&K 75345X G S D TO−220−3 CASE 340AT D2PAK−3 CASE 418AJ G D S GDS DRAIN (TAB) DRAIN (FLANGE) DRAIN (FLANGE) G S
HUF75345G3, HUF75345P3, HUF75345S3S www.onsemi.com PACKAGE MARKING AND ORDERING INFORMATION Part Number Package Brand HUF75345G3 TO−247−3 75345G HUF75345P3 TO−220−3 75345P HUF75345S3ST D2PAK−3 75345S MOSFET MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted) Symbol Parameter Value Unit VDSS Drain to Source Voltage (Note 1) 55 V VDGR Drain to Gate Voltage (RGS = 20 k/C0087) (Note 1) 55 V VGS Gate to Source Voltage ±20 V ID Drain Current − Continuous (Figure 2) 75 A IDM Drain Current − Pulsed Figure 4 EAS Pulsed Avalanche Rating Figure 6 PD Power Dissipation (TC = 25°C) 325 W − Derate Above 25°C 2.17 W/°C TJ, TSTG Operating and Storage Temperature −55 to +175 °C TL Maximum Temperature for Soldering Leads at 0.063 in (1.6 mm) from Case for 10 s 300 °C Tpkg Maximum Temperature for Soldering Leads Package Body for 10 s 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. T J = 25°C to 150°C
HUF75345G3, HUF75345P3, HUF75345S3S www.onsemi.com ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min. Typ. Max. Unit OFF STATE CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage ID = 250 /C0109A, VGS = 0 V (Figure 11) 55 V IDSS Zero Gate Voltage Drain Current VDS = 50 V, VGS =0V 1 /C0109A VDS =4 5V , VGS =0V , TC = 150/C0095C 250 IGSS Gate to Source Leakage Current VGS = ±20 V ±100 nA ON STATE CHARACTERISTICS VGS(TH) Gate to Source Threshold Voltage VGS =V DS, ID = 250 /C0109A (Figure 10) 2 4.0 V RDS(ON) Drain to Source On Resistance ID = 75 A, VGS = 10 V (Figure 9) 0.006 0.007 /C0087 THERMAL CHARACTERISTICS R/C0113JC Thermal Resistance Junction to Case (Figure 3) 0.46 /C0095C/W R/C0113JA Thermal Resistance Junction to AmbientTO−247 30 /C0095C/W Thermal Resistance Junction to AmbientTO−220, D2PAK 62 /C0095C/W SWITCHING CHARACTERISTICS (VGS = 10 V) tON Turn-On Time VDD = 3 0V , ID = 75 A, RL = 0.4 /C0087, VGS = 10 V, RGS = 2.5 /C0087 195 ns td(ON) Turn-On Delay Time 14 ns tr Rise Time 118 ns td(OFF) Turn-Off Delay Time 42 ns tf Fall Time 26 ns tOFF Turn-Off Time 98 ns GATE CHARGE CHARACTERISTICS Qg(tot) Total Gate Charge VGS = 0 V to 20 V, VDD =3 0V , ID = 75 A, RL = 0.4 /C0087/C0044 Ig(REF) = 1.0 mA (Figure 13) 220 275 nC Qg(10) Gate Charge at 10 V VGS = 0 V to 10 V, VDD =3 0V , ID = 75 A, RL = 0.4 /C0087/C0044 Ig(REF) = 1.0 mA (Figure 13) 125 165 nC Qg(th) Threshold Gate Charge VGS = 0 V to 2 V, VDD =3 0V , ID = 75 A, RL = 0.4 /C0087/C0044 Ig(REF) = 1.0 mA (Figure 13) 6.8 10 nC Qgs Gate to Source Gate Charge VDD =3 0V , ID = 75 A, RL = 0.4 /C0087/C0044 Ig(REF) = 1.0 mA (Figure 13) 14 nC Qgd Gate to Drain “Miller” Charge 58 nC CAPACITANCE CHARACTERISTICS Ciss Input Capacitance VDS =2 5V , VGS = 0 V, f = 1 Mhz (Figure 12) 4000 pF Coss Output Capacitance 1450 pF Crss Reverse Transfer Capacitance 450 pF SOURCE TO DRAIN DIODE CHARACTERISTICS VSD Source to Drain Diode Voltage ISD =7 5A 1.25 V trr Reverse Recovery Time ISD = 75 A, dlSD/dt = 100 A//C0109s 55 ns QRR Reverse Recovered Charge ISD = 75 A, dlSD/dt = 100 A//C0109s 80 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.
HUF75345G3, HUF75345P3, HUF75345S3S www.onsemi.com .SUBCKT HUF75345 2 1 3 ; rev 3 Feb 99 CA 12 8 5.55e−9 CB 15 14 5.55e−9 CIN 6 8 3.45e−9 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 56.7 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 IT 8 17 1 LDRAIN 2 5 1e−9 LGATE 1 9 2.6e−9 LSOURCE 3 7 1.1e−9 KGA TE LSOURCE LGATE 0.0085 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 1e−4 RGA TE 9 20 0.36 RLDRAIN 2 5 10 RLGA TE 1 9 26 RLSOURCE 3 7 11 RSLC1 5 51 RSLCMOD 1e−6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 3.15e−3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBA T 22 19 DC 1 ESLC 51 50 V ALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e−6*500),3.5))} .MODEL DBREAKMOD D (RS = 2.8e−2 IKF = 30 TRS1 = −4.0e−3 TRS2 = 1.0e−6) .MODEL MMEDMOD NMOS (VTO = 2.93 KP = 13.75 IS = 1e−30 N = 10 TOX = 1 L = 1u W = 1u RG = 0.36) .MODEL MSTROMOD NMOS (VTO = 3.23 KP = 96 IS = 1e−30 N = 10 TOX = 1 L = 1u W = 1u Lambda = 0.06) .MODEL MWEAKMOD NMOS (VTO = 2.35 KP =0.02 IS = 1e−30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.6) .MODEL RBREAKMOD RES (TC1 = 8.0e−4 TC2 = 4.0e−6) .MODEL RDRAINMOD RES (TC1 = 1.5e−1 TC2 = 6.5e−4)
William J. Hepp and C. Frank Wheatley. Figure 20. PSPICE Electrical Model
HUF75345G3, HUF75345P3, HUF75345S3S www.onsemi.com REV 3 February 1999 template huf75345 n2, n1, n3 electrical n2, n1, n3 var i iscl d..model dbreakmod = () m..model mmedmod = (type=_n, vto = 2.93, kp = 13.75, is = 1e−30, tox = 1) m..model mstrongmod = (type=_n, vto = 3.23, kp = 96, is=1e−30,tox=1, lambda = 0.06) m..model mweakmod = (type=_n, vto = 2.35, kp = 0.02, is = 1e−30, tox = 1) sw_vcsp..model s1amod = (ron = 1e−5, roff = 0.1, von = −9, voff = −4) sw_vcsp..model s1bmod = (ron = 1e−5, roff = 0.1, von = −4, voff = −9) sw_vcsp..model s2amod = (ron = 1e−5, roff = 0.1, von = 0, voff = 0.5) sw_vcsp..model s2bmod = (ron = 1e−5, roff = 0.1, von = 0.5, voff = 0) c.ca n12 n8 = 5.55e−9 c.cb n15 n14 = 5.55e−9 c.cin n6 n8 = 3.45e−9 d.dbody n7 n71 = model=dbodymod d.dbreak n72 n11 = model=dbreakmod d.dplcap n10 n5 = model=dplcapmod i.it n8 n17 = 1 l.ldrain n2 n5 = 1e−9 l.lgate n1 n9 = 2.6e−9 l.lsource n3 n7 = 1.1e−9 m.mmed n16 n6 n8 n8 = model=mmedmod, l = 1u, w = 1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l = 1u, w = 1u m.mweak n16 n21 n8 n8 = model=mweakmod, l = 1u, w = 1u res.rbreak n17 n18 = 1, tc1 = 8e−4, tc2 = 4e−6 res.rdbody n71 n5 = 1.4e−3, tc1 = 2.75e−3, tc2 = 5e−6 res.rdbreak n72 n5 = 2.8e−2, tc1 = −4e−3, tc2 = 1e−6 res.rdrain n50 n16 = 1e−4, tc1 = 1.5e−1, tc2 = 6.5e−4 res.rgate n9 n20 = 0.36 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 26 res.rlsource n3 n7 = 11 res.rslc1 n5 n51 = 1e−6, tc1 = 1e− 4, tc2 = 1.05e−6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 3.15e−3, tc1 = 1e−3, tc2 = 0 res.rvtemp n18 n19 = 1, tc1 = −2.75e−3, tc2 = 1.45e−6 res.rvthres n22 n8 = 1, tc1 = −1.5e−3, tc2 = −2.6e−5 spe.ebreak n11 n7 n17 n18 = 56.7 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1
Figure 21. SABER Electrical Model
Figure 22. Thermal Model PSPICE is a trademark of MicroSim Corporation. Saber is a registered trademark of Sabremark Limited Partnership.
TO−220−3LD CASE 340AT ISSUE A DATE 03 OCT 2017 Scale 1:1 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON13818GDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TO−220−3LD © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
TO−247−3LD SHORT LEAD CASE 340CK ISSUE A DATE 31 JAN 2019 XXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week ZZ = Assembly Lot Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “/C0071”, may or may not be present. Some products may not follow the Generic Marking. GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXX XXXXXXX E D (3X) b (2X) b2 (2X) e Q L
0.25 M BA M
A A c B S P 213 2 DIM MILLIMETERS MIN NOM MAX A 4.58 4.70 4.82 A1 2.20 2.40 2.60 A2 1.40 1.50 1.60 b 1.17 1.26 1.35 b2 1.53 1.65 1.77 b4 2.42 2.54 2.66 c 0.51 0.61 0.71 D 20.32 20.57 20.82 D1 13.08 ~ ~ D2 0.51 0.93 1.35 E 15.37 15.62 15.87 E1 12.81 ~ ~ E2 4.96 5.08 5.20 e ~ 5.56 ~ L 15.75 16.00 16.25 L1 3.69 3.81 3.93 P 3.51 3.58 3.65 P1 6.60 6.80 7.00 Q 5.34 5.46 5.58 S 5.34 5.46 5.58 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON13851GDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TO−247−3LD SHORT LEAD © Semiconductor Components Industries, LLC, 2018 www.onsemi.com
D2PAK−3 (TO−263, 3−LEAD) CASE 418AJ ISSUE F DATE 11 MAR 2021SCALE 1:1 XX XXXXXXXXX AWLYWWG GENERIC MARKING DIAGRAMS* XXXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week W = Week Code (SSG) M = Month Code (SSG) G = Pb −Free Package AKA = Polarity Indicator IC Standard XXXXXXXXG AYWW *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ /C0071”, may or may not be present. Some products may not follow the Generic Marking. Rectifier AYWW XXXXXXXXG AKA SSG XXXXXX XXYMW MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON56370EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1D2PAK−3 (TO−263, 3−LEAD) © Semiconductor Components Industries, LLC, 2018 www.onsemi.com
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