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Rev. A, November 2002©2002 Fairchild Semiconductor Corporation Abstract - Peak-current-mode (PCM) half-bridge push-pull power converters are inherently unstable as a result of volt-seconds circuit asymmetry [1], [2]. A proposed approach [3] is sensitive to circuit asymmetry and overload operation. A new PCM half-bridge converter with transformer isolation is proposed. The proposed converter uses an auxiliary winding and two diodes with a modified current sense to obtain pulse-by-pulse PCM control that is effective under both normal and fault operating modes. Therefore, the possibility of magnetic saturation due to cir- cuit operation asymmetry is eliminated. The auxiliary transformer winding consists of a small gauge wire having the same number of turns as the primary winding. Operation of a 120W design was verified and has been deployed on the space station program. I. Introduction The half-bridge push-pull converter is an attractive topology in applications having high bus voltages at intermedi- ate power levels. Important criteria are that the design be amenable to fabrication while remaining economical. An operating limitation of this topology is its inherent instability when PCM feedback is used for control [1], [2], [4], [5] due to charge asymmetry from - Mismatched switching propagation delays - Even-order sub-harmonic oscillation of a feedback loop [5] - Power transformer construction asymmetry - Differences in C1 and C2 coupling capacitor values II. Uncompensated Balancing Winding Operation A voltage balancing winding enhancement was introduced in [3] and is shown in Figure 1. The balancing winding is implemented using a small gauge coupled winding in the power transformer, T 1b, having the same number of turns as the primary winding. Although this circuit is a significant topology improvement (a half-bridge push-pull PCM topology cannot be implemented without a balancing winding), an instability mode remains. Balancing winding T 1b is connected between the center points of coupling capacitors C1 and C2, and the junction point of diodes D1 and D2 with polarity shown in Figure 1. The balancing winding conducts to charge the lower voltage capacitor when the opposing transistor from the loop having the higher voltage capacitor conducts. In the Application Note 7531 Implementing A Primary Side Peak-Current-Mode Half-Bridge Converter Alain Laprade Ian Edward Jon Gladish Victor Reginato Fairchild Semiconductor Corp EMS Technologies
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Rev. A, November 2002©2002 Fairchild Semiconductor Corporation During current limit mode, instability is prevented because the balancing winding conduction resonates to zero before Q1 turns-off. Power transformer volt-seconds balance is achieved, preventing operational instability and transformer saturation. The balancing diode will have a slight, but negligible effect in offsetting the centering of the transformer B-H curve. VI. Simulations And Discussion Expression (2) provides an analytical representation of the balancing winding current waveform from Figure 6. Expression (3) provides an analytical representation of the coupling capacitor voltage being charged by the balanc- ing winding and the primary current. Circuit parasitics are included. These expressions are valid during balancing winding current conduction 0 < t < τb, where τb is the winding current conduction time. () () +−⋅= +−= +⋅+⋅τ⋅ δ⋅−= ⋅+τ δ⋅⋅ rr 2CL rra ba2C1CL I23K 2C1C Ia2Ir baL 12K bL IrV2VV1K c c a1i2Cdin (2) Circuit parameters are defined as: r1 = MOSFET R ds(on) = 0.16 r2 = balancing winding resistance = 0.168 C1 = 8.3µF C2 = 8.5µF L = balancing winding leakage inductance = 0.73µH V in = bus voltage = 120V Vd = balancing winding resistance = 0.84V VC1i = capacitor voltage before Q1 conduction = 61.2V VC2i = capacitor voltage before Q1 conduction = 58.8V δI = output ripple current reflected to the primary winding during τc = 1.05A Ia = initial primary current at transistor turn-on = 4.77A τc = duration of duty cycle = 4.19µs () () () () () ⋅+ ⋅ ⋅⋅ t ba tbsinb abtbcosa2ea2 3Ketbsinb atbcos12Ktbsine1K)t(i 22 ta tata where () () () () ⋅+τ δ⋅⋅− τ⋅+⋅+ ⋅−⋅δ⋅ +⋅⋅ +⋅⋅ I2Ira ba2C1C a3bI ba2CL 2iV ba2CL IrV2VVZ a c c 2222c22 a1i2Cdin () ()() () () ()() () ()() () () () () ()() () ()() Z tbcosbtbsina bab eba tbsinbtbcosa ba ea2 t ba ta2 ba2C1C2CL tbcosbtbsina ba e b a tbsinbtbcosa ba et ba2CL 2C1C I2Ir tbcosbtbsina ba e 2CLb IrV2VV tItIa 2C1C 1)t(v 222 at22 222 at c at at a c at a1i2Cdin c ⋅⋅⋅ +⋅τ⋅+⋅⋅ +⋅⋅ ⋅+τ ⋅δ+⋅⋅ where (3)
Rev. A, November 2002©2002 Fairchild Semiconductor Corporation This design has been verified in a 120W power supply in the space station program. The power supply has been deployed and is in service. VIII. Conclusion An economical and easily implemented method for designing a PCM half-bridge push-pull power converter with transformer isolation has been described. This design has proven itself to be both rugged and reliable, eliminating the instance of transformer saturation under both normal and fault operating modes. Excellent correlation between the analytical expressions and the Spice simulation was achieved. IX. Acknowledgement The authors wish to thank EMS Technologies Canada Limited for their support in preparing this paper. Thanks are also extended to Ron H. Randall for his editorial assistance in the preparation of this document. X. References [1] Shi-Ping Hsu, A. Brown, L. Rensink, R. Middlebrook; "Modeling and Analysis of Switching DC-to-DC Converters in Constant-Frequency Current-Programmed Mode"; PESC ’79 Record (IEEE Publication 79CH1461-3 AES); pp. 284-301. [2] R. Redl, I. Novak; "Instabilities in Current-Mode Controlled Switching Voltage Regulators"; PESC ’81 Record (IEEE Publication 81CH1652-7 AES); pp. 17-28. [3] Design Review: A 300W, 300KHz Current-Mode Half-bridge Power Supply with Multiple Outputs using Cou- pled Inductors; Unitrode Power Supply Design Seminar; SEM-800, Topic A1. [4] Current mode control, Unitrode Power Supply Design Seminar, SEM 400 Topic 1. [5] Unitrode Application Note U-97; "Modeling, Analysis And Compensation Of The Current-Mode Converter". Time 8us 9us 10us 11us 12us 13us
1 I(LT1a) 2 -I(LT1b)
2.0A 4.0A 6.0A 7.0A1 200mA 400mA 600mA2 Maximum = 405.825 mA Figure 12 Spice simulation results
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